Welcome! Log In Create A New Profile

Advanced

[RFC][PATCH 00/29] Disintegrate and kill asm/system.h

Posted by David Howells 
David Howells
[RFC][PATCH 00/29] Disintegrate and kill asm/system.h
March 07, 2012 08:50PM
Here are a bunch of patches to disintegrate asm/system.h into a set of separate
bits to relieve the problem of circular inclusion dependencies.

The reason for this is that I recently encountered a circular dependency
problem that came about when I produced some patches to optimise get_order() by
rewriting it to use ilog2(). This uses bitops - and on the SH arch
asm/bitops.h drags in asm-generic/get_order.h by a circuituous route involving
asm/system.h.

The main difficulty seems to be asm/system.h. It holds a number of low level
bits with no/few dependencies that are commonly used (eg. memory barriers) and
a number of bits with more dependencies that aren't used in many places
(eg. switch_to()).

These patches break asm/system.h up into the following core pieces:

(1) asm/barrier.h

Move memory barriers here. This already done for MIPS and Alpha.

(2) asm/switch_to.h

Move switch_to() and related stuff here.

(3) asm/exec.h

Move arch_align_stack() here. Other process execution related bits
could perhaps go here from asm/processor.h.

(4) asm/atomic.h

Move xchg() and cmpxchg() here as they're full word atomic ops and
frequently used by atomic_xchg() and atomic_cmpxchg().

(5) asm/bug.h

Move die() and related bits.

(6) asm/auxvec.h

Move AT_VECTOR_SIZE_ARCH here.

Other arch headers are created as needed on a per-arch basis.

These patches are somewhat inside-out. They start by removing all the
inclusions of asm/system.h and then patching up the core files to include the
right headers and then patching up each arch. Whilst that's the easiest for
actually performing this task (as I can use the compiler to find breakages more
easily), it does mean that the patchset is not bisectable as all arches will be
broken for a greater or lesser span.

I'm not sure what's the best way to get around that. Possibly by rearranging
things so each arch's asm/system.h is split up, leaving just a file with a
bunch of #includes - and then delete them all later. That might not work,
however, as it may lead to circular deps until asm/system.h is no longer used.

It could also be done somewhat stepwise - for instance, all the barriers can be
extracted in one go.

Note: I don't have cross compilers for all arches, so for some of them I've
done the disintegration, but I haven't gone through and added the missing
#includes.

Further note: Some of the arches have lots of configurations (eg. ARM, MIPS).
I've compiled *some* of these configs, but by no means all. It's likely some
of the uncompiled ones will break for lack of appropriate #inclusions.

David
---
David Howells (29):
Disintegrate asm/system.h for Xtensa
Disintegrate asm/system.h for X86
Disintegrate asm/system.h for Unicore32
Disintegrate asm/system.h for Tile
Disintegrate asm/system.h for Sparc
Disintegrate asm/system.h for SH
Disintegrate asm/system.h for Score
Disintegrate asm/system.h for S390
Disintegrate asm/system.h for PowerPC
Disintegrate asm/system.h for PA-RISC
Disintegrate asm/system.h for OpenRISC
Disintegrate asm/system.h for MN10300
Disintegrate asm/system.h for MIPS
Disintegrate asm/system.h for Microblaze
Disintegrate asm/system.h for M68K
Disintegrate asm/system.h for M32R
Disintegrate asm/system.h for IA64
Disintegrate asm/system.h for Hexagon
Disintegrate asm/system.h for H8300
Disintegrate asm/system.h for FRV
Disintegrate asm/system.h for CRIS
Disintegrate asm/system.h for C6X
Disintegrate asm/system.h for Blackfin
Disintegrate asm/system.h for AVR32
Disintegrate asm/system.h for ARM
Disintegrate asm/system.h on all arches
Disintegrate asm/system.h on all arches
Remove all #inclusions of asm/system.h
Move all declarations of free_initmem() to linux/mm.h


arch/alpha/boot/bootp.c | 1
arch/alpha/boot/bootpz.c | 1
arch/alpha/boot/head.S | 1
arch/alpha/boot/main.c | 1
arch/alpha/include/asm/atomic.h | 68 ++
arch/alpha/include/asm/auxvec.h | 2
arch/alpha/include/asm/core_lca.h | 2
arch/alpha/include/asm/core_mcpcia.h | 1
arch/alpha/include/asm/core_t2.h | 1
arch/alpha/include/asm/elf.h | 1
arch/alpha/include/asm/exec.h | 6
arch/alpha/include/asm/fpu.h | 2
arch/alpha/include/asm/io.h | 1
arch/alpha/include/asm/irqflags.h | 2
arch/alpha/include/asm/mce.h | 83 +++
arch/alpha/include/asm/mmu_context.h | 1
arch/alpha/include/asm/pal.h | 112 ++++
arch/alpha/include/asm/pgtable.h | 1
arch/alpha/include/asm/setup.h | 36 +
arch/alpha/include/asm/special_insns.h | 41 +
arch/alpha/include/asm/spinlock.h | 1
arch/alpha/include/asm/switch_to.h | 14 +
arch/alpha/include/asm/system.h | 354 -------------
arch/alpha/include/asm/xchg.h | 2
arch/alpha/kernel/core_apecs.c | 1
arch/alpha/kernel/core_cia.c | 1
arch/alpha/kernel/core_t2.c | 1
arch/alpha/kernel/err_impl.h | 2
arch/alpha/kernel/head.S | 6
arch/alpha/kernel/irq.c | 1
arch/alpha/kernel/irq_alpha.c | 1
arch/alpha/kernel/osf_sys.c | 1
arch/alpha/kernel/process.c | 1
arch/alpha/kernel/ptrace.c | 1
arch/alpha/kernel/setup.c | 1
arch/alpha/kernel/sys_alcor.c | 1
arch/alpha/kernel/sys_cabriolet.c | 1
arch/alpha/kernel/sys_dp264.c | 1
arch/alpha/kernel/sys_eb64p.c | 1
arch/alpha/kernel/sys_eiger.c | 1
arch/alpha/kernel/sys_jensen.c | 1
arch/alpha/kernel/sys_marvel.c | 1
arch/alpha/kernel/sys_miata.c | 1
arch/alpha/kernel/sys_mikasa.c | 2
arch/alpha/kernel/sys_nautilus.c | 1
arch/alpha/kernel/sys_noritake.c | 2
arch/alpha/kernel/sys_rawhide.c | 1
arch/alpha/kernel/sys_ruffian.c | 1
arch/alpha/kernel/sys_rx164.c | 1
arch/alpha/kernel/sys_sable.c | 1
arch/alpha/kernel/sys_sio.c | 1
arch/alpha/kernel/sys_sx164.c | 2
arch/alpha/kernel/sys_takara.c | 1
arch/alpha/kernel/sys_titan.c | 1
arch/alpha/kernel/sys_wildfire.c | 1
arch/alpha/kernel/traps.c | 1
arch/alpha/kernel/vmlinux.lds.S | 2
arch/alpha/lib/stacktrace.c | 1
arch/alpha/mm/fault.c | 1
arch/alpha/mm/init.c | 2
arch/alpha/oprofile/common.c | 1
arch/alpha/oprofile/op_model_ev4.c | 1
arch/alpha/oprofile/op_model_ev5.c | 1
arch/alpha/oprofile/op_model_ev6.c | 1
arch/alpha/oprofile/op_model_ev67.c | 1
arch/arm/common/via82c505.c | 1
arch/arm/include/asm/atomic.h | 290 ++++++++++
arch/arm/include/asm/barrier.h | 64 ++
arch/arm/include/asm/bitops.h | 2
arch/arm/include/asm/bug.h | 30 +
arch/arm/include/asm/compiler.h | 15 +
arch/arm/include/asm/cr_reg.h | 85 +++
arch/arm/include/asm/div64.h | 2
arch/arm/include/asm/dma.h | 1
arch/arm/include/asm/domain.h | 2
arch/arm/include/asm/exec.h | 6
arch/arm/include/asm/io.h | 1
arch/arm/include/asm/mmu.h | 7
arch/arm/include/asm/processor.h | 1
arch/arm/include/asm/switch_to.h | 16 +
arch/arm/include/asm/system.h | 543 --------------------
arch/arm/include/asm/system_info.h | 27 +
arch/arm/include/asm/system_misc.h | 35 +
arch/arm/include/asm/uaccess.h | 2
arch/arm/kernel/armksyms.c | 1
arch/arm/kernel/elf.c | 1
arch/arm/kernel/entry-armv.S | 1
arch/arm/kernel/fiq.c | 1
arch/arm/kernel/head-nommu.S | 1
arch/arm/kernel/head.S | 2
arch/arm/kernel/hw_breakpoint.c | 1
arch/arm/kernel/irq.c | 1
arch/arm/kernel/machine_kexec.c | 1
arch/arm/kernel/process.c | 1
arch/arm/kernel/ptrace.c | 1
arch/arm/kernel/setup.c | 4
arch/arm/kernel/sleep.S | 1
arch/arm/kernel/traps.c | 2
arch/arm/mach-clps711x/p720t-leds.c | 1
arch/arm/mach-ebsa110/core.c | 1
arch/arm/mach-ebsa110/leds.c | 1
arch/arm/mach-footbridge/dc21285.c | 1
arch/arm/mach-footbridge/ebsa285-leds.c | 1
arch/arm/mach-footbridge/netwinder-leds.c | 1
arch/arm/mach-imx/dma-v1.c | 1
arch/arm/mach-integrator/core.c | 1
arch/arm/mach-integrator/leds.c | 1
arch/arm/mach-integrator/pci.c | 1
arch/arm/mach-integrator/pci_v3.c | 1
arch/arm/mach-iop33x/uart.c | 1
arch/arm/mach-ixp2000/core.c | 1
arch/arm/mach-ixp2000/enp2611.c | 1
arch/arm/mach-ixp2000/ixdp2400.c | 1
arch/arm/mach-ixp2000/ixdp2800.c | 1
arch/arm/mach-ixp2000/ixdp2x00.c | 1
arch/arm/mach-ixp2000/ixdp2x01.c | 1
arch/arm/mach-ixp2000/pci.c | 1
arch/arm/mach-ixp23xx/core.c | 1
arch/arm/mach-ixp23xx/espresso.c | 1
arch/arm/mach-ixp23xx/ixdp2351.c | 1
arch/arm/mach-ixp23xx/pci.c | 1
arch/arm/mach-ixp23xx/roadrunner.c | 1
arch/arm/mach-ixp4xx/common-pci.c | 1
arch/arm/mach-ixp4xx/goramo_mlr.c | 1
arch/arm/mach-msm/board-sapphire.c | 1
arch/arm/mach-mxs/system.c | 1
arch/arm/mach-omap1/leds-h2p2-debug.c | 1
arch/arm/mach-omap1/leds-innovator.c | 1
arch/arm/mach-omap1/leds-osk.c | 1
arch/arm/mach-omap1/mux.c | 1
arch/arm/mach-omap1/time.c | 1
arch/arm/mach-omap1/timer32k.c | 1
arch/arm/mach-omap2/mux.c | 1
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 1
arch/arm/mach-omap2/sleep44xx.S | 1
arch/arm/mach-orion5x/ls-chl-setup.c | 1
arch/arm/mach-orion5x/ls_hgl-setup.c | 1
arch/arm/mach-orion5x/lsmini-setup.c | 1
arch/arm/mach-pnx4008/core.c | 1
arch/arm/mach-pnx4008/dma.c | 1
arch/arm/mach-pnx4008/irq.c | 1
arch/arm/mach-pnx4008/time.c | 1
arch/arm/mach-pxa/corgi.c | 1
arch/arm/mach-pxa/generic.c | 1
arch/arm/mach-pxa/leds-idp.c | 1
arch/arm/mach-pxa/leds-lubbock.c | 1
arch/arm/mach-pxa/leds-mainstone.c | 1
arch/arm/mach-pxa/poodle.c | 1
arch/arm/mach-realview/core.c | 1
arch/arm/mach-sa1100/dma.c | 1
arch/arm/mach-sa1100/generic.c | 1
arch/arm/mach-sa1100/leds-assabet.c | 1
arch/arm/mach-sa1100/leds-badge4.c | 1
arch/arm/mach-sa1100/leds-cerf.c | 1
arch/arm/mach-sa1100/leds-hackkit.c | 1
arch/arm/mach-sa1100/leds-lart.c | 1
arch/arm/mach-sa1100/pm.c | 1
arch/arm/mach-shark/leds.c | 1
arch/arm/mach-shmobile/cpuidle.c | 1
arch/arm/mach-shmobile/pm-r8a7779.c | 1
arch/arm/mach-shmobile/pm-sh7372.c | 1
arch/arm/mach-shmobile/suspend.c | 1
arch/arm/mach-tegra/cpu-tegra.c | 1
arch/arm/mach-versatile/core.c | 1
arch/arm/mach-versatile/pci.c | 1
arch/arm/mach-vexpress/hotplug.c | 1
arch/arm/mm/alignment.c | 3
arch/arm/mm/cache-xsc3l2.c | 1
arch/arm/mm/fault.c | 3
arch/arm/mm/flush.c | 1
arch/arm/mm/idmap.c | 1
arch/arm/mm/ioremap.c | 2
arch/arm/mm/mmu.c | 2
arch/arm/mm/pgd.c | 1
arch/arm/mm/proc-fa526.S | 1
arch/arm/nwfpe/fpa11.c | 1
arch/arm/plat-iop/i2c.c | 1
arch/arm/plat-iop/pci.c | 1
arch/arm/plat-mxc/system.c | 1
arch/arm/plat-omap/debug-leds.c | 1
arch/arm/plat-omap/dma.c | 1
arch/arm/plat-omap/mux.c | 1
arch/arm/plat-pxa/dma.c | 1
arch/arm/plat-s3c24xx/dma.c | 1
arch/arm/plat-samsung/cpu.c | 1
arch/arm/plat-samsung/time.c | 1
arch/arm/vfp/vfpmodule.c | 2
arch/avr32/include/asm/atomic.h | 102 ++++
arch/avr32/include/asm/barrier.h | 27 +
arch/avr32/include/asm/bitops.h | 1
arch/avr32/include/asm/bug.h | 5
arch/avr32/include/asm/exec.h | 13
arch/avr32/include/asm/special_insns.h | 13
arch/avr32/include/asm/switch_to.h | 46 ++
arch/avr32/include/asm/system.h | 178 ------
arch/avr32/mach-at32ap/cpufreq.c | 1
arch/avr32/oprofile/op_model_avr32.c | 1
arch/blackfin/include/asm/atomic.h | 122 ++++
arch/blackfin/include/asm/barrier.h | 46 ++
arch/blackfin/include/asm/exec.h | 1
arch/blackfin/include/asm/irq_handler.h | 1
arch/blackfin/include/asm/special_insns.h | 13
arch/blackfin/include/asm/switch_to.h | 39 +
arch/blackfin/include/asm/system.h | 192 -------
arch/blackfin/kernel/asm-offsets.c | 1
arch/blackfin/kernel/ipipe.c | 1
arch/blackfin/kernel/kgdb_test.c | 1
arch/blackfin/kernel/process.c | 1
arch/blackfin/kernel/ptrace.c | 1
arch/blackfin/kernel/reboot.c | 1
arch/blackfin/kernel/setup.c | 1
arch/blackfin/kernel/trace.c | 1
arch/blackfin/kernel/traps.c | 1
arch/c6x/include/asm/atomic.h | 68 ++
arch/c6x/include/asm/barrier.h | 25 +
arch/c6x/include/asm/bitops.h | 1
arch/c6x/include/asm/bug.h | 19 +
arch/c6x/include/asm/processor.h | 9
arch/c6x/include/asm/setup.h | 1
arch/c6x/include/asm/special_insns.h | 64 ++
arch/c6x/include/asm/switch_to.h | 31 +
arch/c6x/include/asm/system.h | 168 ------
arch/c6x/kernel/soc.c | 1
arch/cris/arch-v10/drivers/ds1302.c | 1
arch/cris/arch-v10/drivers/gpio.c | 1
arch/cris/arch-v10/drivers/i2c.c | 1
arch/cris/arch-v10/drivers/pcf8563.c | 1
arch/cris/arch-v10/drivers/sync_serial.c | 1
arch/cris/arch-v10/kernel/debugport.c | 1
arch/cris/arch-v10/kernel/dma.c | 1
arch/cris/arch-v10/kernel/io_interface_mux.c | 1
arch/cris/arch-v10/kernel/process.c | 1
arch/cris/arch-v10/kernel/ptrace.c | 1
arch/cris/arch-v10/kernel/setup.c | 1
arch/cris/arch-v10/kernel/signal.c | 1
arch/cris/arch-v10/kernel/traps.c | 1
arch/cris/arch-v32/drivers/i2c.c | 1
arch/cris/arch-v32/drivers/mach-a3/gpio.c | 1
arch/cris/arch-v32/drivers/mach-fs/gpio.c | 1
arch/cris/arch-v32/kernel/debugport.c | 1
arch/cris/arch-v32/kernel/fasttimer.c | 1
arch/cris/arch-v32/kernel/ptrace.c | 1
arch/cris/arch-v32/mach-a3/dma.c | 1
arch/cris/arch-v32/mach-fs/dma.c | 1
arch/cris/include/arch-v10/arch/elf.h | 2
arch/cris/include/arch-v32/arch/elf.h | 2
arch/cris/include/asm/atomic.h | 47 ++
arch/cris/include/asm/barrier.h | 23 +
arch/cris/include/asm/bitops.h | 1
arch/cris/include/asm/exec.h | 6
arch/cris/include/asm/processor.h | 11
arch/cris/include/asm/switch_to.h | 12
arch/cris/include/asm/system.h | 89 ---
arch/cris/kernel/irq.c | 1
arch/cris/kernel/process.c | 1
arch/cris/kernel/ptrace.c | 1
arch/cris/kernel/setup.c | 1
arch/cris/kernel/traps.c | 1
arch/cris/mm/fault.c | 1
arch/frv/include/asm/atomic.h | 99 ++++
arch/frv/include/asm/barrier.h | 27 +
arch/frv/include/asm/bug.h | 2
arch/frv/include/asm/exec.h | 17 +
arch/frv/include/asm/special_insns.h | 17 +
arch/frv/include/asm/switch_to.h | 35 +
arch/frv/include/asm/system.h | 158 ------
arch/frv/kernel/debug-stub.c | 1
arch/frv/kernel/gdb-io.c | 1
arch/frv/kernel/gdb-stub.c | 1
arch/frv/kernel/irq-mb93091.c | 1
arch/frv/kernel/irq-mb93093.c | 1
arch/frv/kernel/irq-mb93493.c | 1
arch/frv/kernel/irq.c | 1
arch/frv/kernel/process.c | 1
arch/frv/kernel/ptrace.c | 1
arch/frv/kernel/traps.c | 1
arch/frv/mm/fault.c | 1
arch/frv/mm/init.c | 1
arch/frv/mm/kmap.c | 1
arch/h8300/include/asm/atomic.h | 54 ++
arch/h8300/include/asm/barrier.h | 26 +
arch/h8300/include/asm/bitops.h | 1
arch/h8300/include/asm/bug.h | 4
arch/h8300/include/asm/exec.h | 6
arch/h8300/include/asm/processor.h | 5
arch/h8300/include/asm/switch_to.h | 50 ++
arch/h8300/include/asm/system.h | 140 -----
arch/h8300/kernel/irq.c | 1
arch/h8300/kernel/process.c | 1
arch/h8300/kernel/ptrace.c | 1
arch/h8300/kernel/traps.c | 1
arch/h8300/mm/fault.c | 1
arch/h8300/mm/init.c | 1
arch/h8300/mm/kmap.c | 1
arch/h8300/mm/memory.c | 1
arch/hexagon/include/asm/atomic.h | 79 +++
arch/hexagon/include/asm/barrier.h | 41 +
arch/hexagon/include/asm/bitops.h | 1
arch/hexagon/include/asm/exec.h | 28 +
arch/hexagon/include/asm/switch_to.h | 34 +
arch/hexagon/include/asm/system.h | 126 -----
arch/hexagon/kernel/ptrace.c | 1
arch/hexagon/kernel/vm_events.c | 1
arch/ia64/dig/setup.c | 1
arch/ia64/hp/sim/boot/bootloader.c | 1
arch/ia64/hp/sim/simeth.c | 1
arch/ia64/include/asm/acpi.h | 1
arch/ia64/include/asm/atomic.h | 1
arch/ia64/include/asm/auxvec.h | 2
arch/ia64/include/asm/barrier.h | 68 ++
arch/ia64/include/asm/exec.h | 14 +
arch/ia64/include/asm/futex.h | 1
arch/ia64/include/asm/io.h | 1
arch/ia64/include/asm/pci.h | 8
arch/ia64/include/asm/pgtable.h | 1
arch/ia64/include/asm/processor.h | 8
arch/ia64/include/asm/sal.h | 1
arch/ia64/include/asm/setup.h | 28 +
arch/ia64/include/asm/sn/pda.h | 1
arch/ia64/include/asm/spinlock.h | 1
arch/ia64/include/asm/switch_to.h | 87 +++
arch/ia64/include/asm/system.h | 203 -------
arch/ia64/include/asm/uv/uv.h | 1
arch/ia64/kernel/acpi.c | 1
arch/ia64/kernel/fsys.S | 1
arch/ia64/kernel/gate.S | 1
arch/ia64/kernel/gate.lds.S | 1
arch/ia64/kernel/head.S | 1
arch/ia64/kernel/iosapic.c | 1
arch/ia64/kernel/irq_ia64.c | 1
arch/ia64/kernel/ivt.S | 1
arch/ia64/kernel/machvec.c | 1
arch/ia64/kernel/mca.c | 1
arch/ia64/kernel/mca_drv.c | 1
arch/ia64/kernel/patch.c | 1
arch/ia64/kernel/pci-dma.c | 1
arch/ia64/kernel/perfmon.c | 1
arch/ia64/kernel/ptrace.c | 1
arch/ia64/kernel/setup.c | 1
arch/ia64/kernel/smp.c | 1
arch/ia64/kernel/smpboot.c | 1
arch/ia64/kernel/time.c | 1
arch/ia64/kernel/uncached.c | 1
arch/ia64/kernel/unwind.c | 1
arch/ia64/kernel/vmlinux.lds.S | 1
arch/ia64/mm/fault.c | 1
arch/ia64/mm/init.c | 1
arch/ia64/oprofile/backtrace.c | 1
arch/ia64/pci/pci.c | 1
arch/ia64/sn/kernel/setup.c | 1
arch/ia64/sn/kernel/sn2/prominfo_proc.c | 1
arch/ia64/sn/kernel/sn2/sn2_smp.c | 1
arch/ia64/sn/kernel/sn2/timer.c | 1
arch/ia64/sn/kernel/tiocx.c | 1
arch/ia64/xen/xensetup.S | 1
arch/m32r/include/asm/atomic.h | 210 ++++++++
arch/m32r/include/asm/barrier.h | 92 +++
arch/m32r/include/asm/bitops.h | 3
arch/m32r/include/asm/dcache_clear.h | 29 +
arch/m32r/include/asm/exec.h | 14 +
arch/m32r/include/asm/local.h | 1
arch/m32r/include/asm/spinlock.h | 1
arch/m32r/include/asm/switch_to.h | 51 ++
arch/m32r/include/asm/system.h | 367 -------------
arch/m32r/kernel/ptrace.c | 1
arch/m32r/kernel/traps.c | 1
arch/m32r/mm/fault-nommu.c | 1
arch/m32r/mm/fault.c | 1
arch/m32r/platforms/m32104ut/setup.c | 1
arch/m32r/platforms/m32700ut/setup.c | 1
arch/m32r/platforms/mappi/setup.c | 1
arch/m32r/platforms/mappi2/setup.c | 1
arch/m32r/platforms/mappi3/setup.c | 1
arch/m32r/platforms/oaks32r/setup.c | 1
arch/m32r/platforms/opsput/setup.c | 1
arch/m32r/platforms/usrv/setup.c | 1
arch/m68k/amiga/amisound.c | 1
arch/m68k/amiga/config.c | 1
arch/m68k/apollo/config.c | 1
arch/m68k/atari/ataints.c | 1
arch/m68k/atari/atasound.c | 1
arch/m68k/atari/config.c | 1
arch/m68k/bvme6000/config.c | 1
arch/m68k/bvme6000/rtc.c | 1
arch/m68k/hp300/time.c | 1
arch/m68k/include/asm/atomic.h | 125 ++++-
arch/m68k/include/asm/barrier.h | 20 +
arch/m68k/include/asm/exec.h | 6
arch/m68k/include/asm/sun3xflop.h | 1
arch/m68k/include/asm/switch_to.h | 41 +
arch/m68k/include/asm/system.h | 193 -------
arch/m68k/kernel/ints.c | 1
arch/m68k/kernel/irq.c | 1
arch/m68k/kernel/process_mm.c | 1
arch/m68k/kernel/process_no.c | 1
arch/m68k/kernel/ptrace_mm.c | 1
arch/m68k/kernel/ptrace_no.c | 1
arch/m68k/kernel/traps.c | 1
arch/m68k/kernel/vectors.c | 1
arch/m68k/mac/config.c | 1
arch/m68k/mac/misc.c | 1
arch/m68k/mm/fault.c | 1
arch/m68k/mm/init_mm.c | 1
arch/m68k/mm/init_no.c | 1
arch/m68k/mm/kmap.c | 1
arch/m68k/mm/memory.c | 1
arch/m68k/mm/motorola.c | 1
arch/m68k/mm/sun3mmu.c | 1
arch/m68k/mvme147/config.c | 1
arch/m68k/mvme16x/config.c | 1
arch/m68k/mvme16x/rtc.c | 1
arch/m68k/platform/68328/config.c | 1
arch/m68k/platform/68328/timers.c | 1
arch/m68k/platform/68360/config.c | 1
arch/m68k/platform/68EZ328/config.c | 1
arch/m68k/platform/68VZ328/config.c | 1
arch/m68k/q40/config.c | 1
arch/m68k/q40/q40ints.c | 1
arch/m68k/sun3/intersil.c | 1
arch/m68k/sun3/mmu_emu.c | 1
arch/m68k/sun3/prom/console.c | 1
arch/m68k/sun3x/config.c | 1
arch/m68k/sun3x/time.c | 1
arch/microblaze/include/asm/atomic.h | 36 +
arch/microblaze/include/asm/barrier.h | 26 +
arch/microblaze/include/asm/exec.h | 14 +
arch/microblaze/include/asm/processor.h | 11
arch/microblaze/include/asm/setup.h | 6
arch/microblaze/include/asm/switch_to.h | 24 +
arch/microblaze/include/asm/system.h | 97 ----
arch/microblaze/kernel/cpu/pvr.c | 1
arch/microblaze/kernel/microblaze_ksyms.c | 1
arch/microblaze/kernel/process.c | 1
arch/microblaze/kernel/prom.c | 1
arch/microblaze/kernel/setup.c | 1
arch/microblaze/kernel/timer.c | 1
arch/microblaze/kernel/traps.c | 1
arch/microblaze/lib/memcpy.c | 1
arch/microblaze/mm/fault.c | 1
arch/mips/cavium-octeon/setup.c | 1
arch/mips/cavium-octeon/smp.c | 1
arch/mips/dec/ecc-berr.c | 1
arch/mips/dec/kn01-berr.c | 1
arch/mips/dec/kn02xa-berr.c | 1
arch/mips/dec/wbflush.c | 1
arch/mips/emma/markeins/irq.c | 1
arch/mips/fw/arc/misc.c | 1
arch/mips/include/asm/atomic.h | 125 ++++-
arch/mips/include/asm/dma.h | 1
arch/mips/include/asm/exec.h | 17 +
arch/mips/include/asm/mach-au1x00/au1000_dma.h | 1
arch/mips/include/asm/processor.h | 7
arch/mips/include/asm/setup.h | 11
arch/mips/include/asm/switch_to.h | 85 +++
arch/mips/include/asm/system.h | 235 --------
arch/mips/include/asm/txx9/jmr3927.h | 1
arch/mips/kernel/cpu-bugs64.c | 1
arch/mips/kernel/cpu-probe.c | 1
arch/mips/kernel/irq-rm7000.c | 1
arch/mips/kernel/irq-rm9000.c | 1
arch/mips/kernel/irq.c | 1
arch/mips/kernel/irq_cpu.c | 1
arch/mips/kernel/mips-mt.c | 1
arch/mips/kernel/process.c | 1
arch/mips/kernel/ptrace.c | 1
arch/mips/kernel/ptrace32.c | 1
arch/mips/kernel/rtlx.c | 1
arch/mips/kernel/setup.c | 1
arch/mips/kernel/signal.c | 1
arch/mips/kernel/signal32.c | 1
arch/mips/kernel/signal_n32.c | 1
arch/mips/kernel/smp-bmips.c | 1
arch/mips/kernel/smp-cmp.c | 1
arch/mips/kernel/smp-mt.c | 1
arch/mips/kernel/smp.c | 1
arch/mips/kernel/smtc-proc.c | 1
arch/mips/kernel/smtc.c | 1
arch/mips/kernel/spram.c | 1
arch/mips/kernel/syscall.c | 1
arch/mips/kernel/traps.c | 1
arch/mips/kernel/unaligned.c | 1
arch/mips/kernel/vpe.c | 1
arch/mips/lasat/reset.c | 1
arch/mips/math-emu/dsemul.c | 1
arch/mips/mipssim/sim_smtc.c | 1
arch/mips/mm/c-octeon.c | 1
arch/mips/mm/c-r3k.c | 1
arch/mips/mm/c-r4k.c | 1
arch/mips/mm/c-tx39.c | 1
arch/mips/mm/fault.c | 1
arch/mips/mm/page.c | 1
arch/mips/mm/sc-ip22.c | 1
arch/mips/mm/sc-mips.c | 1
arch/mips/mm/sc-r5k.c | 1
arch/mips/mm/tlb-r3k.c | 1
arch/mips/mm/tlb-r4k.c | 1
arch/mips/mm/tlb-r8k.c | 1
arch/mips/mm/tlbex.c | 1
arch/mips/mti-malta/malta-init.c | 1
arch/mips/netlogic/common/irq.c | 1
arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c | 1
arch/mips/pmc-sierra/msp71xx/msp_irq_per.c | 1
arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c | 1
arch/mips/pmc-sierra/yosemite/irq.c | 1
arch/mips/pmc-sierra/yosemite/prom.c | 1
arch/mips/powertv/asic/irq_asic.c | 1
arch/mips/powertv/init.c | 1
arch/mips/rb532/irq.c | 1
arch/mips/sgi-ip22/ip22-berr.c | 1
arch/mips/sgi-ip22/ip22-reset.c | 1
arch/mips/sgi-ip22/ip28-berr.c | 1
arch/mips/sgi-ip27/ip27-irq.c | 1
arch/mips/sgi-ip27/ip27-reset.c | 1
arch/mips/sgi-ip32/ip32-irq.c | 1
arch/mips/sgi-ip32/ip32-reset.c | 1
arch/mips/sibyte/bcm1480/irq.c | 1
arch/mips/sibyte/common/sb_tbprof.c | 1
arch/mips/sibyte/sb1250/bus_watcher.c | 1
arch/mips/sibyte/sb1250/irq.c | 1
arch/mips/sni/reset.c | 1
arch/mips/vr41xx/common/irq.c | 1
arch/mips/vr41xx/common/pmu.c | 1
arch/mn10300/include/asm/barrier.h | 35 +
arch/mn10300/include/asm/dma.h | 1
arch/mn10300/include/asm/exec.h | 16 +
arch/mn10300/include/asm/switch_to.h | 49 ++
arch/mn10300/include/asm/system.h | 102 ----
arch/mn10300/kernel/entry.S | 1
arch/mn10300/kernel/fpu.c | 1
arch/mn10300/kernel/gdb-io-serial.c | 1
arch/mn10300/kernel/gdb-io-ttysm.c | 1
arch/mn10300/kernel/gdb-stub.c | 1
arch/mn10300/kernel/mn10300-serial.c | 1
arch/mn10300/kernel/mn10300-watchdog.c | 1
arch/mn10300/kernel/process.c | 1
arch/mn10300/kernel/ptrace.c | 1
arch/mn10300/kernel/setup.c | 1
arch/mn10300/kernel/smp-low.S | 2
arch/mn10300/kernel/smp.c | 1
arch/mn10300/kernel/traps.c | 1
arch/mn10300/lib/bitops.c | 1
arch/mn10300/mm/fault.c | 1
arch/mn10300/mm/init.c | 1
arch/mn10300/mm/misalignment.c | 1
arch/mn10300/mm/pgtable.c | 1
arch/mn10300/mm/tlb-smp.c | 1
arch/mn10300/proc-mn2ws0050/proc-init.c | 1
arch/openrisc/include/asm/system.h | 35 -
arch/openrisc/kernel/idle.c | 1
arch/openrisc/kernel/process.c | 1
arch/openrisc/kernel/prom.c | 1
arch/openrisc/kernel/ptrace.c | 1
arch/openrisc/kernel/setup.c | 1
arch/openrisc/kernel/traps.c | 1
arch/openrisc/mm/init.c | 1
arch/openrisc/mm/tlb.c | 1
arch/parisc/include/asm/atomic.h | 1
arch/parisc/include/asm/barrier.h | 35 +
arch/parisc/include/asm/delay.h | 2
arch/parisc/include/asm/dma.h | 1
arch/parisc/include/asm/exec.h | 6
arch/parisc/include/asm/ldcw.h | 48 ++
arch/parisc/include/asm/processor.h | 2
arch/parisc/include/asm/psw.h | 41 +
arch/parisc/include/asm/special_insns.h | 40 +
arch/parisc/include/asm/spinlock.h | 1
arch/parisc/include/asm/switch_to.h | 12
arch/parisc/include/asm/system.h | 165 ------
arch/parisc/include/asm/thread_info.h | 1
arch/parisc/include/asm/timex.h | 1
arch/parisc/include/asm/uaccess.h | 1
arch/parisc/kernel/cache.c | 1
arch/parisc/kernel/firmware.c | 1
arch/parisc/kernel/pci.c | 1
arch/parisc/kernel/ptrace.c | 1
arch/parisc/kernel/smp.c | 1
arch/parisc/kernel/traps.c | 1
arch/parisc/lib/bitops.c | 1
arch/powerpc/include/asm/atomic.h | 300 +++++++++++
arch/powerpc/include/asm/auxvec.h | 2
arch/powerpc/include/asm/barrier.h | 68 ++
arch/powerpc/include/asm/bug.h | 11
arch/powerpc/include/asm/cache.h | 16 +
arch/powerpc/include/asm/debug.h | 56 ++
arch/powerpc/include/asm/dma.h | 1
arch/powerpc/include/asm/exec.h | 9
arch/powerpc/include/asm/hw_breakpoint.h | 2
arch/powerpc/include/asm/irq.h | 1
arch/powerpc/include/asm/processor.h | 30 +
arch/powerpc/include/asm/reg_booke.h | 5
arch/powerpc/include/asm/rtas.h | 2
arch/powerpc/include/asm/setup.h | 24 +
arch/powerpc/include/asm/switch_to.h | 65 ++
arch/powerpc/include/asm/system.h | 554 --------------------
arch/powerpc/kernel/align.c | 2
arch/powerpc/kernel/cputable.c | 1
arch/powerpc/kernel/crash.c | 2
arch/powerpc/kernel/idle.c | 1
arch/powerpc/kernel/irq.c | 1
arch/powerpc/kernel/kprobes.c | 1
arch/powerpc/kernel/lparcfg.c | 1
arch/powerpc/kernel/ppc_ksyms.c | 2
arch/powerpc/kernel/process.c | 3
arch/powerpc/kernel/prom.c | 1
arch/powerpc/kernel/prom_init.c | 1
arch/powerpc/kernel/ptrace.c | 2
arch/powerpc/kernel/ptrace32.c | 2
arch/powerpc/kernel/rtas.c | 1
arch/powerpc/kernel/setup-common.c | 1
arch/powerpc/kernel/setup_32.c | 1
arch/powerpc/kernel/setup_64.c | 1
arch/powerpc/kernel/signal.c | 1
arch/powerpc/kernel/signal_32.c | 1
arch/powerpc/kernel/signal_64.c | 1
arch/powerpc/kernel/smp.c | 2
arch/powerpc/kernel/softemu8xx.c | 1
arch/powerpc/kernel/swsusp.c | 2
arch/powerpc/kernel/swsusp_64.c | 1
arch/powerpc/kernel/sys_ppc32.c | 1
arch/powerpc/kernel/sysfs.c | 1
arch/powerpc/kernel/traps.c | 3
arch/powerpc/kernel/vdso.c | 1
arch/powerpc/kvm/book3s_hv.c | 1
arch/powerpc/lib/alloc.c | 2
arch/powerpc/lib/copyuser_power7_vmx.c | 1
arch/powerpc/mm/44x_mmu.c | 1
arch/powerpc/mm/fault.c | 2
arch/powerpc/mm/hash_utils_64.c | 1
arch/powerpc/mm/init_32.c | 1
arch/powerpc/mm/init_64.c | 1
arch/powerpc/mm/numa.c | 2
arch/powerpc/mm/pgtable_32.c | 1
arch/powerpc/mm/pgtable_64.c | 1
arch/powerpc/oprofile/common.c | 1
arch/powerpc/oprofile/op_model_7450.c | 1
arch/powerpc/oprofile/op_model_cell.c | 1
arch/powerpc/oprofile/op_model_fsl_emb.c | 1
arch/powerpc/oprofile/op_model_power4.c | 1
arch/powerpc/oprofile/op_model_rs64.c | 1
arch/powerpc/platforms/82xx/pq2.c | 1
arch/powerpc/platforms/83xx/km83xx.c | 1
arch/powerpc/platforms/83xx/mpc832x_mds.c | 1
arch/powerpc/platforms/83xx/mpc834x_itx.c | 1
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1
arch/powerpc/platforms/83xx/mpc836x_mds.c | 1
arch/powerpc/platforms/83xx/sbc834x.c | 1
arch/powerpc/platforms/85xx/corenet_ds.c | 1
arch/powerpc/platforms/85xx/ksi8560.c | 1
arch/powerpc/platforms/85xx/mpc8536_ds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 1
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 1
arch/powerpc/platforms/85xx/p1010rdb.c | 1
arch/powerpc/platforms/85xx/p1023_rds.c | 1
arch/powerpc/platforms/85xx/p2041_rdb.c | 1
arch/powerpc/platforms/85xx/p3041_ds.c | 1
arch/powerpc/platforms/85xx/p4080_ds.c | 1
arch/powerpc/platforms/85xx/p5020_ds.c | 1
arch/powerpc/platforms/85xx/sbc8548.c | 1
arch/powerpc/platforms/85xx/sbc8560.c | 1
arch/powerpc/platforms/85xx/socrates.c | 1
arch/powerpc/platforms/85xx/stx_gp3.c | 1
arch/powerpc/platforms/85xx/tqm85xx.c | 1
arch/powerpc/platforms/85xx/xes_mpc85xx.c | 1
arch/powerpc/platforms/86xx/gef_ppc9a.c | 1
arch/powerpc/platforms/86xx/gef_sbc310.c | 1
arch/powerpc/platforms/86xx/gef_sbc610.c | 1
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 1
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 1
arch/powerpc/platforms/86xx/pic.c | 1
arch/powerpc/platforms/86xx/sbc8641d.c | 1
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 1
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 1
arch/powerpc/platforms/8xx/tqm8xx_setup.c | 1
arch/powerpc/platforms/cell/smp.c | 1
arch/powerpc/platforms/embedded6xx/c2k.c | 1
arch/powerpc/platforms/embedded6xx/holly.c | 1
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 1
arch/powerpc/platforms/embedded6xx/prpmc2800.c | 1
arch/powerpc/platforms/embedded6xx/storcenter.c | 1
arch/powerpc/platforms/fsl_uli1575.c | 1
arch/powerpc/platforms/iseries/dt.c | 1
arch/powerpc/platforms/iseries/lpevents.c | 1
arch/powerpc/platforms/iseries/setup.c | 1
arch/powerpc/platforms/iseries/smp.c | 1
arch/powerpc/platforms/iseries/viopath.c | 1
arch/powerpc/platforms/maple/setup.c | 1
arch/powerpc/platforms/maple/time.c | 1
arch/powerpc/platforms/pasemi/setup.c | 2
arch/powerpc/platforms/powermac/bootx_init.c | 1
arch/powerpc/platforms/powermac/cpufreq_32.c | 2
arch/powerpc/platforms/powermac/nvram.c | 1
arch/powerpc/platforms/powermac/setup.c | 1
arch/powerpc/platforms/powermac/time.c | 1
arch/powerpc/platforms/powernv/smp.c | 1
arch/powerpc/platforms/ps3/mm.c | 1
arch/powerpc/platforms/pseries/dtl.c | 2
arch/powerpc/platforms/pseries/hotplug-cpu.c | 1
arch/powerpc/platforms/pseries/processor_idle.c | 1
arch/powerpc/platforms/pseries/ras.c | 1
arch/powerpc/platforms/pseries/smp.c | 1
arch/powerpc/platforms/wsp/chroma.c | 1
arch/powerpc/platforms/wsp/psr2.c | 1
arch/powerpc/sysdev/cpm_common.c | 1
arch/powerpc/sysdev/fsl_soc.c | 1
arch/powerpc/sysdev/msi_bitmap.c | 1
arch/powerpc/sysdev/tsi108_dev.c | 1
arch/powerpc/xmon/xmon.c | 1
arch/s390/crypto/crypt_s390.h | 1
arch/s390/include/asm/atomic.h | 2
arch/s390/include/asm/barrier.h | 35 +
arch/s390/include/asm/ctl_reg.h | 76 +++
arch/s390/include/asm/elf.h | 1
arch/s390/include/asm/exec.h | 12
arch/s390/include/asm/facility.h | 29 +
arch/s390/include/asm/mmu.h | 14 +
arch/s390/include/asm/mmu_context.h | 1
arch/s390/include/asm/processor.h | 16 +
arch/s390/include/asm/setup.h | 14 +
arch/s390/include/asm/sigp.h | 9
arch/s390/include/asm/smp.h | 1
arch/s390/include/asm/switch_to.h | 100 ++++
arch/s390/include/asm/system.h | 281 ----------
arch/s390/include/asm/uaccess.h | 6
arch/s390/kernel/compat_signal.c | 1
arch/s390/kernel/cpcmd.c | 1
arch/s390/kernel/dis.c | 1
arch/s390/kernel/early.c | 1
arch/s390/kernel/machine_kexec.c | 1
arch/s390/kernel/process.c | 2
arch/s390/kernel/ptrace.c | 2
arch/s390/kernel/setup.c | 2
arch/s390/kernel/signal.c | 1
arch/s390/kernel/smp.c | 1
arch/s390/kernel/suspend.c | 2
arch/s390/kernel/traps.c | 1
arch/s390/kernel/vdso.c | 2
arch/s390/kvm/kvm-s390.c | 2
arch/s390/mm/fault.c | 2
arch/s390/mm/init.c | 2
arch/s390/mm/maccess.c | 2
arch/s390/mm/pgtable.c | 1
arch/s390/oprofile/hwsampler.c | 1
arch/score/include/asm/atomic.h | 43 ++
arch/score/include/asm/barrier.h | 16 +
arch/score/include/asm/bug.h | 10
arch/score/include/asm/exec.h | 6
arch/score/include/asm/switch_to.h | 13
arch/score/include/asm/system.h | 90 ---
arch/sh/boards/mach-microdev/irq.c | 1
arch/sh/include/asm/atomic-irq.h | 2
arch/sh/include/asm/atomic.h | 54 ++
arch/sh/include/asm/auxvec.h | 2
arch/sh/include/asm/barrier.h | 54 ++
arch/sh/include/asm/bitops.h | 1
arch/sh/include/asm/bl_bit.h | 10
arch/sh/include/asm/bl_bit_32.h | 33 +
arch/sh/include/asm/bl_bit_64.h | 38 +
arch/sh/include/asm/bug.h | 5
arch/sh/include/asm/cache_insns.h | 11
arch/sh/include/asm/cache_insns_32.h | 19 +
arch/sh/include/asm/cache_insns_64.h | 23 +
arch/sh/include/asm/exec.h | 10
arch/sh/include/asm/futex-irq.h | 1
arch/sh/include/asm/io.h | 1
arch/sh/include/asm/processor.h | 15 +
arch/sh/include/asm/ptrace.h | 1
arch/sh/include/asm/setup.h | 1
arch/sh/include/asm/switch_to.h | 19 +
arch/sh/include/asm/switch_to_32.h | 134 +++++
arch/sh/include/asm/switch_to_64.h | 35 +
arch/sh/include/asm/system.h | 184 -------
arch/sh/include/asm/system_32.h | 236 ---------
arch/sh/include/asm/system_64.h | 79 ---
arch/sh/include/asm/traps.h | 20 +
arch/sh/include/asm/traps_32.h | 68 ++
arch/sh/include/asm/traps_64.h | 24 +
arch/sh/include/asm/uaccess.h | 14 +
arch/sh/kernel/cpu/init.c | 2
arch/sh/kernel/cpu/irq/imask.c | 1
arch/sh/kernel/cpu/sh2a/opcode_helper.c | 1
arch/sh/kernel/cpu/sh4/fpu.c | 1
arch/sh/kernel/hw_breakpoint.c | 1
arch/sh/kernel/idle.c | 2
arch/sh/kernel/io_trapped.c | 1
arch/sh/kernel/process_32.c | 1
arch/sh/kernel/process_64.c | 1
arch/sh/kernel/ptrace_32.c | 1
arch/sh/kernel/ptrace_64.c | 2
arch/sh/kernel/reboot.c | 2
arch/sh/kernel/signal_32.c | 1
arch/sh/kernel/smp.c | 1
arch/sh/kernel/traps.c | 2
arch/sh/kernel/traps_32.c | 3
arch/sh/kernel/traps_64.c | 1
arch/sh/math-emu/math.c | 1
arch/sh/mm/fault_32.c | 2
arch/sh/mm/fault_64.c | 1
arch/sh/mm/flush-sh4.c | 1
arch/sh/mm/pmb.c | 1
arch/sh/mm/tlb-pteaex.c | 1
arch/sh/mm/tlb-sh3.c | 1
arch/sh/mm/tlb-sh4.c | 1
arch/sh/mm/tlbflush_64.c | 1
arch/sparc/include/asm/atomic_32.h | 98 ++++
arch/sparc/include/asm/atomic_64.h | 138 +++++
arch/sparc/include/asm/auxio_32.h | 1
arch/sparc/include/asm/barrier.h | 8
arch/sparc/include/asm/barrier_32.h | 15 +
arch/sparc/include/asm/barrier_64.h | 56 ++
arch/sparc/include/asm/bug.h | 3
arch/sparc/include/asm/cacheflush_32.h | 9
arch/sparc/include/asm/cacheflush_64.h | 10
arch/sparc/include/asm/cpu_type.h | 34 +
arch/sparc/include/asm/exec.h | 6
arch/sparc/include/asm/floppy_32.h | 1
arch/sparc/include/asm/futex_64.h | 1
arch/sparc/include/asm/io_32.h | 1
arch/sparc/include/asm/io_64.h | 1
arch/sparc/include/asm/irqflags_32.h | 1
arch/sparc/include/asm/mmu_context_64.h | 1
arch/sparc/include/asm/ns87303.h | 1
arch/sparc/include/asm/perfctr.h | 23 +
arch/sparc/include/asm/pgtable_32.h | 2
arch/sparc/include/asm/pgtable_64.h | 1
arch/sparc/include/asm/processor.h | 3
arch/sparc/include/asm/processor_64.h | 3
arch/sparc/include/asm/ptrace.h | 4
arch/sparc/include/asm/setup.h | 16 +
arch/sparc/include/asm/switch_to.h | 8
arch/sparc/include/asm/switch_to_32.h | 106 ++++
arch/sparc/include/asm/switch_to_64.h | 73 +++
arch/sparc/include/asm/system.h | 8
arch/sparc/include/asm/system_32.h | 284 ----------
arch/sparc/include/asm/system_64.h | 331 ------------
arch/sparc/include/asm/timer_32.h | 3
arch/sparc/include/asm/uaccess_64.h | 1
arch/sparc/kernel/auxio_32.c | 1
arch/sparc/kernel/devices.c | 2
arch/sparc/kernel/irq.h | 1
arch/sparc/kernel/irq_64.c | 1
arch/sparc/kernel/kgdb_32.c | 1
arch/sparc/kernel/module.c | 1
arch/sparc/kernel/muldiv.c | 1
arch/sparc/kernel/nmi.c | 1
arch/sparc/kernel/pcr.c | 1
arch/sparc/kernel/perf_event.c | 2
arch/sparc/kernel/process_32.c | 2
arch/sparc/kernel/process_64.c | 1
arch/sparc/kernel/ptrace_32.c | 2
arch/sparc/kernel/ptrace_64.c | 1
arch/sparc/kernel/reboot.c | 2
arch/sparc/kernel/setup_32.c | 2
arch/sparc/kernel/setup_64.c | 2
arch/sparc/kernel/signal32.c | 1
arch/sparc/kernel/signal_32.c | 1
arch/sparc/kernel/signal_64.c | 2
arch/sparc/kernel/sigutil_32.c | 1
arch/sparc/kernel/sigutil_64.c | 1
arch/sparc/kernel/sparc_ksyms_64.c | 2
arch/sparc/kernel/time_32.c | 1
arch/sparc/kernel/traps_32.c | 1
arch/sparc/kernel/traps_64.c | 2
arch/sparc/kernel/unaligned_32.c | 1
arch/sparc/kernel/unaligned_64.c | 2
arch/sparc/kernel/visemul.c | 2
arch/sparc/math-emu/math_64.c | 1
arch/sparc/mm/btfixup.c | 1
arch/sparc/mm/fault_32.c | 1
arch/sparc/mm/init_32.c | 1
arch/sparc/mm/init_64.c | 1
arch/sparc/mm/init_64.h | 2
arch/sparc/mm/loadmmu.c | 1
arch/sparc/mm/tsb.c | 1
arch/sparc/prom/console_32.c | 1
arch/sparc/prom/console_64.c | 1
arch/sparc/prom/misc_32.c | 1
arch/sparc/prom/misc_64.c | 1
arch/sparc/prom/p1275.c | 1
arch/sparc/prom/ranges.c | 1
arch/tile/include/asm/atomic.h | 1
arch/tile/include/asm/barrier.h | 140 +++++
arch/tile/include/asm/bitops_32.h | 1
arch/tile/include/asm/bitops_64.h | 1
arch/tile/include/asm/cacheflush.h | 11
arch/tile/include/asm/exec.h | 20 +
arch/tile/include/asm/pgtable.h | 1
arch/tile/include/asm/setup.h | 21 +
arch/tile/include/asm/spinlock_32.h | 1
arch/tile/include/asm/switch_to.h | 72 +++
arch/tile/include/asm/system.h | 261 ---------
arch/tile/include/asm/timex.h | 2
arch/tile/include/asm/unaligned.h | 15 +
arch/tile/kernel/process.c | 1
arch/tile/kernel/regs_32.S | 1
arch/tile/kernel/regs_64.S | 1
arch/tile/mm/fault.c | 1
arch/tile/mm/init.c | 1
arch/tile/mm/pgtable.c | 1
arch/um/include/asm/fixmap.h | 1
arch/unicore32/include/asm/atomic.h | 58 ++
arch/unicore32/include/asm/barrier.h | 28 +
arch/unicore32/include/asm/bug.h | 32 +
arch/unicore32/include/asm/cr.h | 49 ++
arch/unicore32/include/asm/exec.h | 15 +
arch/unicore32/include/asm/io.h | 1
arch/unicore32/include/asm/pgtable.h | 3
arch/unicore32/include/asm/setup.h | 16 +
arch/unicore32/include/asm/switch_to.h | 30 +
arch/unicore32/include/asm/system.h | 161 ------
arch/unicore32/include/asm/uaccess.h | 1
arch/unicore32/kernel/dma.c | 1
arch/unicore32/kernel/head.S | 1
arch/unicore32/kernel/hibernate.c | 1
arch/unicore32/kernel/irq.c | 1
arch/unicore32/kernel/ksyms.c | 1
arch/unicore32/kernel/process.c | 1
arch/unicore32/kernel/traps.c | 1
arch/unicore32/mm/fault.c | 1
arch/unicore32/mm/flush.c | 1
arch/x86/ia32/ia32_aout.c | 1
arch/x86/include/asm/apic.h | 1
arch/x86/include/asm/auxvec.h | 7
arch/x86/include/asm/barrier.h | 113 ++++
arch/x86/include/asm/bug.h | 4
arch/x86/include/asm/cacheflush.h | 1
arch/x86/include/asm/elf.h | 1
arch/x86/include/asm/exec.h | 1
arch/x86/include/asm/futex.h | 1
arch/x86/include/asm/i387.h | 1
arch/x86/include/asm/local.h | 1
arch/x86/include/asm/mc146818rtc.h | 1
arch/x86/include/asm/page_types.h | 1
arch/x86/include/asm/processor.h | 31 +
arch/x86/include/asm/segment.h | 58 ++
arch/x86/include/asm/special_insns.h | 199 +++++++
arch/x86/include/asm/stackprotector.h | 1
arch/x86/include/asm/switch_to.h | 129 +++++
arch/x86/include/asm/system.h | 523 -------------------
arch/x86/include/asm/tlbflush.h | 2
arch/x86/include/asm/virtext.h | 1
arch/x86/kernel/acpi/cstate.c | 1
arch/x86/kernel/apm_32.c | 1
arch/x86/kernel/cpu/mcheck/p5.c | 1
arch/x86/kernel/cpu/mcheck/therm_throt.c | 1
arch/x86/kernel/cpu/mcheck/winchip.c | 1
arch/x86/kernel/cpu/mtrr/generic.c | 1
arch/x86/kernel/cpuid.c | 1
arch/x86/kernel/i8259.c | 1
arch/x86/kernel/irqinit.c | 1
arch/x86/kernel/kgdb.c | 1
arch/x86/kernel/ldt.c | 1
arch/x86/kernel/machine_kexec_32.c | 1
arch/x86/kernel/mca_32.c | 1
arch/x86/kernel/module.c | 1
arch/x86/kernel/msr.c | 1
arch/x86/kernel/paravirt.c | 1
arch/x86/kernel/pci-calgary_64.c | 1
arch/x86/kernel/process.c | 1
arch/x86/kernel/process_32.c | 2
arch/x86/kernel/process_64.c | 2
arch/x86/kernel/ptrace.c | 1
arch/x86/kernel/setup.c | 1
arch/x86/kernel/tce_64.c | 1
arch/x86/kernel/tls.c | 1
arch/x86/kernel/traps.c | 1
arch/x86/mm/init.c | 1
arch/x86/mm/init_32.c | 1
arch/x86/mm/init_64.c | 1
arch/x86/mm/pgtable_32.c | 1
arch/x86/power/hibernate_32.c | 1
arch/xtensa/include/asm/atomic.h | 112 ++++
arch/xtensa/include/asm/barrier.h | 29 +
arch/xtensa/include/asm/bitops.h | 1
arch/xtensa/include/asm/exec.h | 14 +
arch/xtensa/include/asm/setup.h | 2
arch/xtensa/include/asm/switch_to.h | 22 +
arch/xtensa/include/asm/system.h | 184 -------
arch/xtensa/kernel/process.c | 1
arch/xtensa/kernel/ptrace.c | 1
arch/xtensa/kernel/setup.c | 1
arch/xtensa/kernel/traps.c | 19 +
arch/xtensa/mm/fault.c | 1
arch/xtensa/mm/tlb.c | 1
drivers/acpi/processor_driver.c | 1
drivers/atm/eni.c | 1
drivers/atm/firestream.c | 1
drivers/atm/horizon.c | 1
drivers/atm/idt77105.c | 1
drivers/atm/iphase.c | 1
drivers/atm/suni.c | 1
drivers/atm/zatm.c | 1
drivers/block/floppy.c | 1
drivers/block/hd.c | 1
drivers/block/nbd.c | 1
drivers/block/xd.c | 1
drivers/bluetooth/bt3c_cs.c | 1
drivers/bluetooth/btuart_cs.c | 1
drivers/bluetooth/dtl1_cs.c | 1
drivers/char/apm-emulation.c | 1
drivers/char/ds1302.c | 1
drivers/char/efirtc.c | 1
drivers/char/genrtc.c | 1
drivers/char/hpet.c | 1
drivers/char/ipmi/ipmi_devintf.c | 1
drivers/char/ipmi/ipmi_msghandler.c | 1
drivers/char/ipmi/ipmi_si_intf.c | 1
drivers/char/lp.c | 1
drivers/char/mbcs.c | 1
drivers/char/mspec.c | 1
drivers/char/mwave/3780i.c | 1
drivers/char/nvram.c | 1
drivers/char/nwflash.c | 1
drivers/char/pcmcia/synclink_cs.c | 1
drivers/char/rtc.c | 1
drivers/char/sonypi.c | 1
drivers/char/xilinx_hwicap/xilinx_hwicap.c | 1
drivers/cpufreq/omap-cpufreq.c | 1
drivers/cpufreq/powernow-k7.c | 1
drivers/firewire/core-cdev.c | 1
drivers/firewire/core-device.c | 1
drivers/firewire/core-topology.c | 1
drivers/firewire/ohci.c | 1
drivers/firewire/sbp2.c | 1
drivers/i2c/busses/i2c-acorn.c | 1
drivers/ide/ide-cs.c | 1
drivers/ide/qd65xx.c | 1
drivers/infiniband/hw/ehca/ehca_reqs.c | 1
drivers/input/joydev.c | 1
drivers/input/joystick/amijoy.c | 1
drivers/input/mouse/amimouse.c | 1
drivers/input/mouse/atarimouse.c | 1
drivers/input/serio/hp_sdc.c | 1
drivers/input/serio/maceps2.c | 1
drivers/input/serio/rpckbd.c | 1
drivers/input/serio/sa1111ps2.c | 1
drivers/isdn/hardware/avm/avm_cs.c | 1
drivers/isdn/hisax/avma1_cs.c | 1
drivers/isdn/hisax/elsa_cs.c | 1
drivers/isdn/hisax/sedlbauer_cs.c | 1
drivers/isdn/hisax/teles_cs.c | 1
drivers/isdn/i4l/isdn_bsdcomp.c | 1
drivers/isdn/pcbit/layer2.c | 1
drivers/macintosh/macio-adb.c | 1
drivers/macintosh/therm_adt746x.c | 1
drivers/macintosh/therm_pm72.c | 1
drivers/macintosh/therm_windtunnel.c | 1
drivers/macintosh/via-cuda.c | 1
drivers/macintosh/via-macii.c | 1
drivers/macintosh/via-pmu.c | 1
drivers/macintosh/via-pmu68k.c | 1
drivers/macintosh/windfarm_lm75_sensor.c | 1
drivers/macintosh/windfarm_pm121.c | 1
drivers/macintosh/windfarm_pm81.c | 1
drivers/macintosh/windfarm_pm91.c | 1
drivers/macintosh/windfarm_smu_controls.c | 1
drivers/macintosh/windfarm_smu_sensors.c | 1
drivers/media/dvb/dvb-core/dmxdev.c | 1
drivers/media/dvb/firewire/firedtv-fw.c | 1
drivers/media/dvb/ttpci/av7110.c | 1
drivers/media/media-devnode.c | 1
drivers/media/video/ivtv/ivtv-driver.h | 1
drivers/media/video/v4l2-common.c | 1
drivers/media/video/v4l2-dev.c | 1
drivers/message/i2o/i2o_scsi.c | 1
drivers/mfd/mcp-core.c | 1
drivers/mfd/mcp-sa11x0.c | 1
drivers/misc/sgi-gru/gru_instructions.h | 1
drivers/misc/sgi-xp/xp.h | 1
drivers/mmc/card/block.c | 1
drivers/mtd/devices/pmc551.c | 1
drivers/mtd/devices/slram.c | 1
drivers/mtd/maps/pcmciamtd.c | 1
drivers/mtd/nand/bcm_umi_nand.c | 1
drivers/net/appletalk/cops.c | 1
drivers/net/appletalk/ltpc.c | 1
drivers/net/arcnet/com20020_cs.c | 1
drivers/net/bonding/bond_main.c | 1
drivers/net/can/slcan.c | 1
drivers/net/cris/eth_v10.c | 1
drivers/net/ethernet/3com/3c574_cs.c | 1
drivers/net/ethernet/3com/3c589_cs.c | 1
drivers/net/ethernet/8390/3c503.c | 1
drivers/net/ethernet/8390/ac3200.c | 1
drivers/net/ethernet/8390/apne.c | 1
drivers/net/ethernet/8390/ax88796.c | 1
drivers/net/ethernet/8390/axnet_cs.c | 1
drivers/net/ethernet/8390/e2100.c | 1
drivers/net/ethernet/8390/es3210.c | 1
drivers/net/ethernet/8390/etherh.c | 1
drivers/net/ethernet/8390/hp-plus.c | 1
drivers/net/ethernet/8390/hp.c | 1
drivers/net/ethernet/8390/lib8390.c | 1
drivers/net/ethernet/8390/lne390.c | 1
drivers/net/ethernet/8390/mac8390.c | 1
drivers/net/ethernet/8390/ne-h8300.c | 1
drivers/net/ethernet/8390/ne.c | 1
drivers/net/ethernet/8390/ne2.c | 1
drivers/net/ethernet/8390/ne2k-pci.c | 1
drivers/net/ethernet/8390/ne3210.c | 1
drivers/net/ethernet/8390/pcnet_cs.c | 1
drivers/net/ethernet/8390/smc-mca.c | 1
drivers/net/ethernet/8390/smc-ultra.c | 1
drivers/net/ethernet/8390/smc-ultra32.c | 1
drivers/net/ethernet/8390/stnic.c | 1
drivers/net/ethernet/8390/wd.c | 1
drivers/net/ethernet/8390/zorro8390.c | 1
drivers/net/ethernet/alteon/acenic.c | 1
drivers/net/ethernet/amd/7990.c | 1
drivers/net/ethernet/amd/am79c961a.c | 1
drivers/net/ethernet/amd/amd8111e.c | 1
drivers/net/ethernet/amd/declance.c | 1
drivers/net/ethernet/amd/hplance.c | 1
drivers/net/ethernet/amd/mvme147.c | 1
drivers/net/ethernet/amd/nmclan_cs.c | 1
drivers/net/ethernet/amd/sunlance.c | 1
drivers/net/ethernet/broadcom/tg3.c | 1
drivers/net/ethernet/cirrus/cs89x0.c | 1
drivers/net/ethernet/cirrus/mac89x0.c | 1
drivers/net/ethernet/dlink/de600.c | 1
drivers/net/ethernet/dlink/de620.c | 1
drivers/net/ethernet/fujitsu/at1700.c | 1
drivers/net/ethernet/fujitsu/eth16i.c | 1
drivers/net/ethernet/fujitsu/fmvj18x_cs.c | 1
drivers/net/ethernet/i825xx/3c507.c | 1
drivers/net/ethernet/i825xx/3c527.c | 1
drivers/net/ethernet/i825xx/eepro.c | 1
drivers/net/ethernet/i825xx/eexpress.c | 1
drivers/net/ethernet/i825xx/ether1.c | 1
drivers/net/ethernet/i825xx/znet.c | 1
drivers/net/ethernet/korina.c | 1
drivers/net/ethernet/marvell/mv643xx_eth.c | 1
drivers/net/ethernet/marvell/pxa168_eth.c | 1
drivers/net/ethernet/natsemi/jazzsonic.c | 1
drivers/net/ethernet/natsemi/macsonic.c | 1
drivers/net/ethernet/natsemi/ns83820.c | 1
drivers/net/ethernet/neterion/s2io.c | 1
drivers/net/ethernet/nvidia/forcedeth.c | 1
drivers/net/ethernet/realtek/atp.c | 1
drivers/net/ethernet/realtek/r8169.c | 1
drivers/net/ethernet/seeq/ether3.c | 1
drivers/net/ethernet/seeq/seeq8005.c | 1
drivers/net/ethernet/smsc/smc91c92_cs.c | 1
drivers/net/ethernet/sun/cassini.c | 1
drivers/net/ethernet/sun/sunbmac.c | 1
drivers/net/ethernet/sun/sungem.c | 1
drivers/net/ethernet/sun/sunhme.c | 1
drivers/net/ethernet/sun/sunqe.c | 1
drivers/net/ethernet/tundra/tsi108_eth.c | 1
drivers/net/ethernet/xircom/xirc2ps_cs.c | 1
drivers/net/hamradio/6pack.c | 1
drivers/net/hamradio/baycom_par.c | 1
drivers/net/hamradio/bpqether.c | 1
drivers/net/hamradio/mkiss.c | 1
drivers/net/hamradio/scc.c | 1
drivers/net/hamradio/yam.c | 1
drivers/net/hippi/rrunner.c | 1
drivers/net/irda/donauboe.c | 1
drivers/net/loopback.c | 1
drivers/net/plip/plip.c | 1
drivers/net/slip/slhc.c | 1
drivers/net/slip/slip.c | 1
drivers/net/tokenring/3c359.c | 1
drivers/net/tokenring/abyss.c | 1
drivers/net/tokenring/ibmtr_cs.c | 1
drivers/net/tokenring/lanstreamer.c | 1
drivers/net/tokenring/madgemc.c | 1
drivers/net/tokenring/olympic.c | 1
drivers/net/tokenring/proteon.c | 1
drivers/net/tokenring/skisa.c | 1
drivers/net/tokenring/smctr.c | 1
drivers/net/tokenring/tms380tr.c | 1
drivers/net/tokenring/tmspci.c | 1
drivers/net/tun.c | 1
drivers/net/wan/dlci.c | 1
drivers/net/wan/dscc4.c | 1
drivers/net/wan/hd64570.c | 1
drivers/net/wan/hd64572.c | 1
drivers/net/wan/lapbether.c | 1
drivers/net/wan/sdla.c | 1
drivers/net/wan/x25_asy.c | 1
drivers/net/wireless/airo.c | 1
drivers/net/wireless/airo_cs.c | 1
drivers/net/wireless/atmel.c | 1
drivers/net/wireless/atmel_cs.c | 1
drivers/net/wireless/prism54/islpci_mgt.c | 1
drivers/net/wireless/ray_cs.c | 1
drivers/net/wireless/wl3501_cs.c | 1
drivers/nubus/nubus.c | 1
drivers/parisc/dino.c | 1
drivers/parisc/iosapic.c | 1
drivers/parisc/lba_pci.c | 1
drivers/pcmcia/cs.c | 1
drivers/pcmcia/i82092.c | 1
drivers/pcmcia/i82365.c | 1
drivers/pcmcia/m32r_cfc.c | 1
drivers/pcmcia/m32r_pcc.c | 1
drivers/pcmcia/m8xx_pcmcia.c | 1
drivers/pcmcia/pd6729.c | 1
drivers/pcmcia/pxa2xx_base.c | 1
drivers/pcmcia/sa11xx_base.c | 1
drivers/pcmcia/soc_common.c | 1
drivers/pcmcia/socket_sysfs.c | 1
drivers/pcmcia/tcic.c | 1
drivers/pcmcia/xxs1500_ss.c | 1
drivers/pnp/pnpbios/bioscalls.c | 1
drivers/pnp/pnpbios/core.c | 1
drivers/s390/char/sclp_cmd.c | 1
drivers/s390/cio/crw.c | 1
drivers/s390/crypto/ap_bus.c | 2
drivers/sbus/char/flash.c | 1
drivers/sbus/char/openprom.c | 1
drivers/sbus/char/uctrl.c | 1
drivers/scsi/53c700.c | 1
drivers/scsi/BusLogic.c | 1
drivers/scsi/advansys.c | 1
drivers/scsi/aha152x.c | 1
drivers/scsi/aha1542.c | 1
drivers/scsi/aha1740.c | 1
drivers/scsi/arcmsr/arcmsr_hba.c | 1
drivers/scsi/arm/acornscsi.c | 1
drivers/scsi/arm/cumana_1.c | 1
drivers/scsi/arm/oak.c | 1
drivers/scsi/atp870u.c | 1
drivers/scsi/dtc.c | 1
drivers/scsi/fd_mcs.c | 1
drivers/scsi/fdomain.c | 1
drivers/scsi/g_NCR5380.c | 1
drivers/scsi/gdth.c | 1
drivers/scsi/ibmmca.c | 1
drivers/scsi/in2000.c | 1
drivers/scsi/mac53c94.c | 1
drivers/scsi/mac_scsi.c | 1
drivers/scsi/mesh.c | 1
drivers/scsi/ncr53c8xx.c | 1
drivers/scsi/nsp32.c | 1
drivers/scsi/osst.c | 1
drivers/scsi/pas16.c | 1
drivers/scsi/qla1280.c | 1
drivers/scsi/qlogicpti.c | 1
drivers/scsi/st.c | 1
drivers/scsi/sun3_scsi.c | 1
drivers/scsi/sun3_scsi_vme.c | 1
drivers/scsi/sym53c416.c | 1
drivers/scsi/t128.c | 1
drivers/scsi/u14-34f.c | 1
drivers/scsi/ultrastor.c | 1
drivers/scsi/wd7000.c | 1
drivers/spi/spi-omap-uwire.c | 1
drivers/staging/comedi/drivers.c | 1
drivers/staging/comedi/drivers/cb_pcidas64.c | 1
drivers/staging/comedi/drivers/mite.c | 1
drivers/staging/crystalhd/crystalhd_lnx.h | 1
drivers/staging/crystalhd/crystalhd_misc.h | 1
drivers/staging/et131x/et131x.c | 1
drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c | 1
drivers/staging/media/go7007/go7007-driver.c | 1
drivers/staging/media/go7007/go7007-i2c.c | 1
drivers/staging/media/go7007/go7007-v4l2.c | 1
drivers/staging/media/go7007/snd-go7007.c | 1
drivers/staging/media/lirc/lirc_serial.c | 1
drivers/staging/media/lirc/lirc_sir.c | 1
drivers/staging/panel/panel.c | 1
drivers/staging/sbe-2t3e3/io.c | 1
.../tidspbridge/include/dspbridge/host_os.h | 1
drivers/staging/wlags49_h2/wl_cs.c | 1
drivers/staging/wlags49_h2/wl_main.c | 3
drivers/staging/wlags49_h2/wl_netdev.c | 3
drivers/staging/wlags49_h2/wl_pci.c | 1
drivers/staging/wlags49_h2/wl_util.c | 3
drivers/telephony/phonedev.c | 1
drivers/tty/amiserial.c | 1
drivers/tty/isicom.c | 1
drivers/tty/moxa.c | 1
drivers/tty/mxser.c | 1
drivers/tty/n_hdlc.c | 1
drivers/tty/n_tty.c | 1
drivers/tty/pty.c | 1
drivers/tty/serial/68328serial.c | 1
drivers/tty/serial/8250/serial_cs.c | 1
drivers/tty/serial/crisv10.c | 2
drivers/tty/serial/dz.c | 1
drivers/tty/serial/icom.c | 1
drivers/tty/serial/msm_serial_hs.c | 1
drivers/tty/serial/sunhv.c | 1
drivers/tty/serial/sunsab.c | 1
drivers/tty/serial/sunsu.c | 1
drivers/tty/serial/sunzilog.c | 1
drivers/tty/serial/zs.c | 1
drivers/tty/synclink.c | 1
drivers/tty/synclink_gt.c | 1
drivers/tty/synclinkmp.c | 1
drivers/tty/tty_io.c | 1
drivers/tty/tty_ioctl.c | 1
drivers/tty/vt/vt.c | 1
drivers/usb/gadget/amd5536udc.c | 1
drivers/usb/gadget/at91_udc.c | 1
drivers/usb/gadget/dummy_hcd.c | 1
drivers/usb/gadget/fsl_udc_core.c | 1
drivers/usb/gadget/goku_udc.c | 1
drivers/usb/gadget/langwell_udc.c | 1
drivers/usb/gadget/mv_udc_core.c | 1
drivers/usb/gadget/net2272.c | 1
drivers/usb/gadget/net2280.c | 1
drivers/usb/gadget/omap_udc.c | 1
drivers/usb/gadget/printer.c | 1
drivers/usb/gadget/pxa25x_udc.c | 1
drivers/usb/gadget/rndis.c | 1
drivers/usb/gadget/s3c2410_udc.c | 1
drivers/usb/host/ehci-hcd.c | 1
drivers/usb/host/isp116x-hcd.c | 1
drivers/usb/host/isp1362-hcd.c | 1
drivers/usb/host/ohci-hcd.c | 1
drivers/usb/host/oxu210hp-hcd.c | 1
drivers/usb/host/sl811-hcd.c | 1
drivers/usb/host/u132-hcd.c | 1
drivers/usb/host/uhci-hcd.c | 1
drivers/video/amifb.c | 1
drivers/video/bt431.h | 1
drivers/video/bt455.h | 1
drivers/video/console/fbcon.c | 1
drivers/video/console/newport_con.c | 1
drivers/video/cyber2000fb.c | 1
drivers/video/dnfb.c | 1
drivers/video/neofb.c | 1
drivers/video/pmag-ba-fb.c | 1
drivers/video/pmagb-b-fb.c | 1
drivers/video/q40fb.c | 1
drivers/video/savage/savagefb_driver.c | 1
drivers/virtio/config.c | 1
drivers/watchdog/advantechwdt.c | 1
drivers/watchdog/alim7101_wdt.c | 1
drivers/watchdog/booke_wdt.c | 1
drivers/watchdog/eurotechwdt.c | 1
drivers/watchdog/ib700wdt.c | 1
drivers/watchdog/it87_wdt.c | 1
drivers/watchdog/machzwd.c | 1
drivers/watchdog/pc87413_wdt.c | 1
drivers/watchdog/sbc60xxwdt.c | 1
drivers/watchdog/sbc7240_wdt.c | 1
drivers/watchdog/sbc8360.c | 1
drivers/watchdog/sbc_fitpc2_wdt.c | 1
drivers/watchdog/sc520_wdt.c | 1
drivers/watchdog/smsc37b787_wdt.c | 1
drivers/watchdog/w83627hf_wdt.c | 1
drivers/watchdog/w83697hf_wdt.c | 1
drivers/watchdog/w83697ug_wdt.c | 1
drivers/watchdog/w83877f_wdt.c | 1
drivers/watchdog/w83977f_wdt.c | 1
drivers/watchdog/wdt.c | 1
drivers/watchdog/wdt977.c | 1
drivers/watchdog/wdt_pci.c | 1
fs/binfmt_aout.c | 1
fs/binfmt_elf.c | 1
fs/binfmt_elf_fdpic.c | 1
fs/binfmt_flat.c | 1
fs/coda/inode.c | 1
fs/coda/psdev.c | 1
fs/coda/upcall.c | 1
fs/eventpoll.c | 1
fs/exec.c | 1
fs/jbd2/commit.c | 1
fs/jbd2/journal.c | 1
fs/ncpfs/file.c | 1
fs/ncpfs/inode.c | 1
fs/ncpfs/mmap.c | 1
fs/nfs/client.c | 1
fs/nfs/direct.c | 1
fs/nfs/file.c | 1
fs/nfs/getroot.c | 1
fs/nfs/inode.c | 1
fs/nfs/read.c | 1
fs/nfs/super.c | 1
fs/proc/inode.c | 1
fs/reiserfs/journal.c | 1
fs/ufs/inode.c | 1
fs/ufs/super.c | 1
fs/xfs/xfs_buf.h | 1
include/acpi/platform/aclinux.h | 1
include/asm-generic/atomic.h | 1
include/asm-generic/bitops/atomic.h | 2
include/linux/cnt32_to_63.h | 1
include/linux/debug_locks.h | 1
include/linux/efi.h | 1
include/linux/ide.h | 1
include/linux/interrupt.h | 1
include/linux/llist.h | 2
include/linux/lsm_audit.h | 1
include/linux/mm.h | 2
include/linux/mtd/map.h | 1
include/linux/parport.h | 1
include/linux/rwsem.h | 1
include/linux/sched.h | 1
include/linux/skbuff.h | 1
include/linux/spinlock.h | 2
include/linux/stop_machine.h | 1
include/linux/tty.h | 1
include/linux/wait.h | 1
init/main.c | 1
kernel/debug/debug_core.c | 1
kernel/debug/kdb/kdb_bt.c | 1
kernel/dma.c | 1
kernel/kexec.c | 1
kernel/rwsem.c | 1
kernel/sched/core.c | 1
kernel/signal.c | 2
kernel/sysctl.c | 4
lib/llist.c | 1
lib/raid6/altivec.uc | 1
net/802/fc.c | 1
net/802/fddi.c | 1
net/802/hippi.c | 1
net/802/tr.c | 1
net/atm/clip.c | 1
net/ax25/af_ax25.c | 1
net/ax25/ax25_addr.c | 1
net/ax25/ax25_dev.c | 1
net/ax25/ax25_ds_in.c | 1
net/ax25/ax25_ds_subr.c | 1
net/ax25/ax25_ds_timer.c | 1
net/ax25/ax25_iface.c | 1
net/ax25/ax25_in.c | 1
net/ax25/ax25_ip.c | 1
net/ax25/ax25_out.c | 1
net/ax25/ax25_route.c | 1
net/ax25/ax25_std_in.c | 1
net/ax25/ax25_std_subr.c | 1
net/ax25/ax25_std_timer.c | 1
net/ax25/ax25_subr.c | 1
net/ax25/ax25_timer.c | 1
net/ax25/ax25_uid.c | 1
net/bluetooth/bnep/sock.c | 1
net/bluetooth/cmtp/sock.c | 1
net/bluetooth/hci_conn.c | 1
net/bluetooth/hci_core.c | 1
net/bluetooth/hci_event.c | 1
net/bluetooth/hci_sock.c | 1
net/bluetooth/l2cap_core.c | 1
net/bluetooth/rfcomm/sock.c | 1
net/bluetooth/sco.c | 1
net/core/datagram.c | 1
net/core/dev.c | 1
net/core/filter.c | 1
net/core/gen_estimator.c | 1
net/core/rtnetlink.c | 1
net/core/scm.c | 1
net/core/skbuff.c | 1
net/core/sock.c | 1
net/core/utils.c | 1
net/decnet/af_decnet.c | 1
net/decnet/dn_dev.c | 1
net/decnet/dn_nsp_in.c | 1
net/decnet/dn_nsp_out.c | 1
net/econet/af_econet.c | 1
net/ethernet/eth.c | 1
net/ipv4/af_inet.c | 1
net/ipv4/arp.c | 1
net/ipv4/devinet.c | 1
net/ipv4/fib_frontend.c | 1
net/ipv4/fib_semantics.c | 1
net/ipv4/fib_trie.c | 1
net/ipv4/icmp.c | 1
net/ipv4/igmp.c | 1
net/ipv4/ip_input.c | 1
net/ipv4/ip_output.c | 1
net/ipv4/ipmr.c | 1
net/ipv4/ping.c | 1
net/ipv4/route.c | 1
net/ipv4/udp.c | 1
net/ipv6/af_inet6.c | 1
net/ipv6/icmp.c | 1
net/ipv6/ip6mr.c | 1
net/irda/irlan/irlan_client.c | 1
net/irda/irlan/irlan_common.c | 1
net/irda/irlan/irlan_provider.c | 1
net/irda/timer.c | 1
net/lapb/lapb_iface.c | 1
net/lapb/lapb_in.c | 1
net/lapb/lapb_out.c | 1
net/lapb/lapb_subr.c | 1
net/lapb/lapb_timer.c | 1
net/netfilter/ipvs/ip_vs_app.c | 1
net/netfilter/ipvs/ip_vs_proto.c | 1
net/netfilter/nfnetlink.c | 1
net/netrom/af_netrom.c | 1
net/netrom/nr_dev.c | 1
net/netrom/nr_in.c | 1
net/netrom/nr_out.c | 1
net/netrom/nr_route.c | 1
net/netrom/nr_subr.c | 1
net/netrom/nr_timer.c | 1
net/openvswitch/datapath.c | 1
net/packet/af_packet.c | 1
net/rose/af_rose.c | 1
net/rose/rose_dev.c | 1
net/rose/rose_in.c | 1
net/rose/rose_link.c | 1
net/rose/rose_out.c | 1
net/rose/rose_route.c | 1
net/rose/rose_subr.c | 1
net/rose/rose_timer.c | 1
net/sunrpc/clnt.c | 1
security/selinux/include/avc.h | 1
sound/oss/os.h | 1
sound/oss/vidc.c | 1
sound/oss/waveartist.c | 1
sound/pci/asihpi/hpios.h | 1
sound/pci/aw2/aw2-saa7146.c | 1
1510 files changed, 7259 insertions(+), 7757 deletions(-)
create mode 100644 arch/alpha/include/asm/exec.h
create mode 100644 arch/alpha/include/asm/mce.h
create mode 100644 arch/alpha/include/asm/special_insns.h
create mode 100644 arch/alpha/include/asm/switch_to.h
delete mode 100644 arch/alpha/include/asm/system.h
create mode 100644 arch/arm/include/asm/barrier.h
create mode 100644 arch/arm/include/asm/compiler.h
create mode 100644 arch/arm/include/asm/cr_reg.h
create mode 100644 arch/arm/include/asm/exec.h
create mode 100644 arch/arm/include/asm/switch_to.h
delete mode 100644 arch/arm/include/asm/system.h
create mode 100644 arch/arm/include/asm/system_info.h
create mode 100644 arch/arm/include/asm/system_misc.h
create mode 100644 arch/avr32/include/asm/barrier.h
create mode 100644 arch/avr32/include/asm/exec.h
create mode 100644 arch/avr32/include/asm/special_insns.h
create mode 100644 arch/avr32/include/asm/switch_to.h
delete mode 100644 arch/avr32/include/asm/system.h
create mode 100644 arch/blackfin/include/asm/barrier.h
create mode 100644 arch/blackfin/include/asm/exec.h
create mode 100644 arch/blackfin/include/asm/special_insns.h
create mode 100644 arch/blackfin/include/asm/switch_to.h
delete mode 100644 arch/blackfin/include/asm/system.h
create mode 100644 arch/c6x/include/asm/atomic.h
create mode 100644 arch/c6x/include/asm/barrier.h
create mode 100644 arch/c6x/include/asm/bug.h
create mode 100644 arch/c6x/include/asm/special_insns.h
create mode 100644 arch/c6x/include/asm/switch_to.h
delete mode 100644 arch/c6x/include/asm/system.h
create mode 100644 arch/cris/include/asm/barrier.h
create mode 100644 arch/cris/include/asm/exec.h
create mode 100644 arch/cris/include/asm/switch_to.h
delete mode 100644 arch/cris/include/asm/system.h
create mode 100644 arch/frv/include/asm/barrier.h
create mode 100644 arch/frv/include/asm/exec.h
create mode 100644 arch/frv/include/asm/special_insns.h
create mode 100644 arch/frv/include/asm/switch_to.h
delete mode 100644 arch/frv/include/asm/system.h
create mode 100644 arch/h8300/include/asm/barrier.h
create mode 100644 arch/h8300/include/asm/exec.h
create mode 100644 arch/h8300/include/asm/switch_to.h
delete mode 100644 arch/h8300/include/asm/system.h
create mode 100644 arch/hexagon/include/asm/barrier.h
create mode 100644 arch/hexagon/include/asm/exec.h
create mode 100644 arch/hexagon/include/asm/switch_to.h
delete mode 100644 arch/hexagon/include/asm/system.h
create mode 100644 arch/ia64/include/asm/barrier.h
create mode 100644 arch/ia64/include/asm/exec.h
create mode 100644 arch/ia64/include/asm/switch_to.h
delete mode 100644 arch/ia64/include/asm/system.h
create mode 100644 arch/m32r/include/asm/barrier.h
create mode 100644 arch/m32r/include/asm/dcache_clear.h
create mode 100644 arch/m32r/include/asm/exec.h
create mode 100644 arch/m32r/include/asm/switch_to.h
delete mode 100644 arch/m32r/include/asm/system.h
create mode 100644 arch/m68k/include/asm/barrier.h
create mode 100644 arch/m68k/include/asm/exec.h
create mode 100644 arch/m68k/include/asm/switch_to.h
delete mode 100644 arch/m68k/include/asm/system.h
create mode 100644 arch/microblaze/include/asm/barrier.h
create mode 100644 arch/microblaze/include/asm/exec.h
create mode 100644 arch/microblaze/include/asm/switch_to.h
delete mode 100644 arch/microblaze/include/asm/system.h
create mode 100644 arch/mips/include/asm/exec.h
create mode 100644 arch/mips/include/asm/switch_to.h
delete mode 100644 arch/mips/include/asm/system.h
create mode 100644 arch/mn10300/include/asm/barrier.h
create mode 100644 arch/mn10300/include/asm/exec.h
create mode 100644 arch/mn10300/include/asm/switch_to.h
delete mode 100644 arch/mn10300/include/asm/system.h
delete mode 100644 arch/openrisc/include/asm/system.h
create mode 100644 arch/parisc/include/asm/barrier.h
create mode 100644 arch/parisc/include/asm/exec.h
create mode 100644 arch/parisc/include/asm/ldcw.h
create mode 100644 arch/parisc/include/asm/special_insns.h
create mode 100644 arch/parisc/include/asm/switch_to.h
delete mode 100644 arch/parisc/include/asm/system.h
create mode 100644 arch/powerpc/include/asm/barrier.h
create mode 100644 arch/powerpc/include/asm/debug.h
create mode 100644 arch/powerpc/include/asm/exec.h
create mode 100644 arch/powerpc/include/asm/switch_to.h
delete mode 100644 arch/powerpc/include/asm/system.h
create mode 100644 arch/s390/include/asm/barrier.h
create mode 100644 arch/s390/include/asm/ctl_reg.h
create mode 100644 arch/s390/include/asm/exec.h
create mode 100644 arch/s390/include/asm/facility.h
create mode 100644 arch/s390/include/asm/switch_to.h
delete mode 100644 arch/s390/include/asm/system.h
create mode 100644 arch/score/include/asm/barrier.h
create mode 100644 arch/score/include/asm/exec.h
create mode 100644 arch/score/include/asm/switch_to.h
delete mode 100644 arch/score/include/asm/system.h
create mode 100644 arch/sh/include/asm/barrier.h
create mode 100644 arch/sh/include/asm/bl_bit.h
create mode 100644 arch/sh/include/asm/bl_bit_32.h
create mode 100644 arch/sh/include/asm/bl_bit_64.h
create mode 100644 arch/sh/include/asm/cache_insns.h
create mode 100644 arch/sh/include/asm/cache_insns_32.h
create mode 100644 arch/sh/include/asm/cache_insns_64.h
create mode 100644 arch/sh/include/asm/exec.h
create mode 100644 arch/sh/include/asm/switch_to.h
create mode 100644 arch/sh/include/asm/switch_to_32.h
create mode 100644 arch/sh/include/asm/switch_to_64.h
delete mode 100644 arch/sh/include/asm/system.h
delete mode 100644 arch/sh/include/asm/system_32.h
delete mode 100644 arch/sh/include/asm/system_64.h
create mode 100644 arch/sh/include/asm/traps.h
create mode 100644 arch/sh/include/asm/traps_32.h
create mode 100644 arch/sh/include/asm/traps_64.h
create mode 100644 arch/sparc/include/asm/barrier.h
create mode 100644 arch/sparc/include/asm/barrier_32.h
create mode 100644 arch/sparc/include/asm/barrier_64.h
create mode 100644 arch/sparc/include/asm/cpu_type.h
create mode 100644 arch/sparc/include/asm/exec.h
create mode 100644 arch/sparc/include/asm/switch_to.h
create mode 100644 arch/sparc/include/asm/switch_to_32.h
create mode 100644 arch/sparc/include/asm/switch_to_64.h
delete mode 100644 arch/sparc/include/asm/system.h
delete mode 100644 arch/sparc/include/asm/system_32.h
delete mode 100644 arch/sparc/include/asm/system_64.h
create mode 100644 arch/tile/include/asm/barrier.h
create mode 100644 arch/tile/include/asm/exec.h
create mode 100644 arch/tile/include/asm/switch_to.h
delete mode 100644 arch/tile/include/asm/system.h
create mode 100644 arch/unicore32/include/asm/atomic.h
create mode 100644 arch/unicore32/include/asm/barrier.h
create mode 100644 arch/unicore32/include/asm/bug.h
create mode 100644 arch/unicore32/include/asm/cr.h
create mode 100644 arch/unicore32/include/asm/exec.h
create mode 100644 arch/unicore32/include/asm/setup.h
create mode 100644 arch/unicore32/include/asm/switch_to.h
delete mode 100644 arch/unicore32/include/asm/system.h
create mode 100644 arch/x86/include/asm/barrier.h
create mode 100644 arch/x86/include/asm/exec.h
create mode 100644 arch/x86/include/asm/special_insns.h
create mode 100644 arch/x86/include/asm/switch_to.h
delete mode 100644 arch/x86/include/asm/system.h
create mode 100644 arch/xtensa/include/asm/barrier.h
create mode 100644 arch/xtensa/include/asm/exec.h
create mode 100644 arch/xtensa/include/asm/switch_to.h
delete mode 100644 arch/xtensa/include/asm/system.h

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 04/29] Disintegrate asm/system.h on all arches
March 07, 2012 09:00PM
asm/system.h is a cause of circular dependency problems because it contains
commonly used primitive stuff like barrier definitions and uncommonly used
stuff like switch_to() that might require MMU definitions.

Disintegrate asm/system.h on all arches into the following common segments:

(1) asm/barrier.h

Memory barrier stuff - already done for MIPS and Alpha.

(2) asm/atomic.h

Move xchg() and cmpxchg() here as they're atomic ops.

(3) asm/bug.h

Move die() and similar here.

(4) asm/arch_hooks.h

Move common arch hooks here (such as default_idle()).

(5) asm/elf.h

Move AT_VECTOR_SIZE_ARCH here.

(6) asm/switch_to.h

Move switch_to() here.

Signed-off-by: David Howells <[email protected]>
---

arch/alpha/include/asm/atomic.h | 67 ++++++
arch/alpha/include/asm/auxvec.h | 2
arch/alpha/include/asm/core_lca.h | 1
arch/alpha/include/asm/core_mcpcia.h | 1
arch/alpha/include/asm/elf.h | 1
arch/alpha/include/asm/exec.h | 6 +
arch/alpha/include/asm/fpu.h | 2
arch/alpha/include/asm/irqflags.h | 1
arch/alpha/include/asm/mce.h | 83 ++++++++
arch/alpha/include/asm/pal.h | 112 ++++++++++
arch/alpha/include/asm/pgtable.h | 1
arch/alpha/include/asm/setup.h | 36 +++
arch/alpha/include/asm/special_insns.h | 41 ++++
arch/alpha/include/asm/switch_to.h | 14 +
arch/alpha/include/asm/system.h | 354 --------------------------------
arch/alpha/include/asm/xchg.h | 2
arch/alpha/kernel/core_apecs.c | 1
arch/alpha/kernel/core_cia.c | 1
arch/alpha/kernel/core_t2.c | 1
arch/alpha/kernel/err_impl.h | 2
arch/alpha/kernel/head.S | 5
arch/alpha/kernel/irq_alpha.c | 1
arch/alpha/kernel/sys_mikasa.c | 1
arch/alpha/kernel/sys_noritake.c | 1
arch/alpha/kernel/sys_sx164.c | 1
arch/alpha/kernel/traps.c | 1
arch/alpha/kernel/vmlinux.lds.S | 2
arch/alpha/mm/init.c | 1
28 files changed, 384 insertions(+), 358 deletions(-)
create mode 100644 arch/alpha/include/asm/exec.h
create mode 100644 arch/alpha/include/asm/mce.h
create mode 100644 arch/alpha/include/asm/special_insns.h
create mode 100644 arch/alpha/include/asm/switch_to.h
delete mode 100644 arch/alpha/include/asm/system.h

diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index bd4eabd..f62251e 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -168,6 +168,73 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
return result;
}

+/*
+ * Atomic exchange routines.
+ */
+
+#define __ASM__MB
+#define ____xchg(type, args...) __xchg ## type ## _local(args)
+#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
+#include <asm/xchg.h>
+
+#define xchg_local(ptr,x) \
+ ({ \
+ __typeof__(*(ptr)) _x_ = (x); \
+ (__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
+ sizeof(*(ptr))); \
+ })
+
+#define cmpxchg_local(ptr, o, n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, \
+ sizeof(*(ptr))); \
+ })
+
+#define cmpxchg64_local(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg_local((ptr), (o), (n)); \
+ })
+
+#ifdef CONFIG_SMP
+#undef __ASM__MB
+#define __ASM__MB "\tmb\n"
+#endif
+#undef ____xchg
+#undef ____cmpxchg
+#define ____xchg(type, args...) __xchg ##type(args)
+#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
+#include <asm/xchg.h>
+
+#define xchg(ptr,x) \
+ ({ \
+ __typeof__(*(ptr)) _x_ = (x); \
+ (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
+ sizeof(*(ptr))); \
+ })
+
+#define cmpxchg(ptr, o, n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr)));\
+ })
+
+#define cmpxchg64(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg((ptr), (o), (n)); \
+ })
+
+#undef __ASM__MB
+#undef ____cmpxchg
+
+#define __HAVE_ARCH_CMPXCHG 1
+
#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))

diff --git a/arch/alpha/include/asm/auxvec.h b/arch/alpha/include/asm/auxvec.h
index e96fe88..a3a579d 100644
--- a/arch/alpha/include/asm/auxvec.h
+++ b/arch/alpha/include/asm/auxvec.h
@@ -21,4 +21,6 @@
#define AT_L2_CACHESHAPE 36
#define AT_L3_CACHESHAPE 37

+#define AT_VECTOR_SIZE_ARCH 4 /* entries in ARCH_DLINFO */
+
#endif /* __ASM_ALPHA_AUXVEC_H */
diff --git a/arch/alpha/include/asm/core_lca.h b/arch/alpha/include/asm/core_lca.h
index 69d60fe..8ee6c51 100644
--- a/arch/alpha/include/asm/core_lca.h
+++ b/arch/alpha/include/asm/core_lca.h
@@ -2,6 +2,7 @@
#define __ALPHA_LCA__H__

#include <asm/compiler.h>
+#include <asm/mce.h>

/*
* Low Cost Alpha (LCA) definitions (these apply to 21066 and 21068,
diff --git a/arch/alpha/include/asm/core_mcpcia.h b/arch/alpha/include/asm/core_mcpcia.h
index 9f67a05..ad44bef 100644
--- a/arch/alpha/include/asm/core_mcpcia.h
+++ b/arch/alpha/include/asm/core_mcpcia.h
@@ -7,6 +7,7 @@

#include <linux/types.h>
#include <asm/compiler.h>
+#include <asm/mce.h>

/*
* MCPCIA is the internal name for a core logic chipset which provides
diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h
index da5449e..968d999 100644
--- a/arch/alpha/include/asm/elf.h
+++ b/arch/alpha/include/asm/elf.h
@@ -2,6 +2,7 @@
#define __ASM_ALPHA_ELF_H

#include <asm/auxvec.h>
+#include <asm/special_insns.h>

/* Special values for the st_other field in the symbol table. */

diff --git a/arch/alpha/include/asm/exec.h b/arch/alpha/include/asm/exec.h
new file mode 100644
index 0000000..4a5a41f
--- /dev/null
+++ b/arch/alpha/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef __ALPHA_EXEC_H
+#define __ALPHA_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __ALPHA_EXEC_H */
diff --git a/arch/alpha/include/asm/fpu.h b/arch/alpha/include/asm/fpu.h
index ecb17a7..db00f78 100644
--- a/arch/alpha/include/asm/fpu.h
+++ b/arch/alpha/include/asm/fpu.h
@@ -1,6 +1,8 @@
#ifndef __ASM_ALPHA_FPU_H
#define __ASM_ALPHA_FPU_H

+#include <asm/special_insns.h>
+
/*
* Alpha floating-point control register defines:
*/
diff --git a/arch/alpha/include/asm/irqflags.h b/arch/alpha/include/asm/irqflags.h
index afb3be3..ffb1726 100644
--- a/arch/alpha/include/asm/irqflags.h
+++ b/arch/alpha/include/asm/irqflags.h
@@ -1,6 +1,7 @@
#ifndef __ALPHA_IRQFLAGS_H
#define __ALPHA_IRQFLAGS_H

+#include <asm/pal.h>

#define IPL_MIN 0
#define IPL_SW0 1
diff --git a/arch/alpha/include/asm/mce.h b/arch/alpha/include/asm/mce.h
new file mode 100644
index 0000000..660285b
--- /dev/null
+++ b/arch/alpha/include/asm/mce.h
@@ -0,0 +1,83 @@
+#ifndef __ALPHA_MCE_H
+#define __ALPHA_MCE_H
+
+/*
+ * This is the logout header that should be common to all platforms
+ * (assuming they are running OSF/1 PALcode, I guess).
+ */
+struct el_common {
+ unsigned int size; /* size in bytes of logout area */
+ unsigned int sbz1 : 30; /* should be zero */
+ unsigned int err2 : 1; /* second error */
+ unsigned int retry : 1; /* retry flag */
+ unsigned int proc_offset; /* processor-specific offset */
+ unsigned int sys_offset; /* system-specific offset */
+ unsigned int code; /* machine check code */
+ unsigned int frame_rev; /* frame revision */
+};
+
+/* Machine Check Frame for uncorrectable errors (Large format)
+ * --- This is used to log uncorrectable errors such as
+ * double bit ECC errors.
+ * --- These errors are detected by both processor and systems.
+ */
+struct el_common_EV5_uncorrectable_mcheck {
+ unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */
+ unsigned long paltemp[24]; /* PAL TEMP REGS. */
+ unsigned long exc_addr; /* Address of excepting instruction*/
+ unsigned long exc_sum; /* Summary of arithmetic traps. */
+ unsigned long exc_mask; /* Exception mask (from exc_sum). */
+ unsigned long pal_base; /* Base address for PALcode. */
+ unsigned long isr; /* Interrupt Status Reg. */
+ unsigned long icsr; /* CURRENT SETUP OF EV5 IBOX */
+ unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity
+ <12> set TAG parity*/
+ unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1:
+ <2> Data error in bank 0
+ <3> Data error in bank 1
+ <4> Tag error in bank 0
+ <5> Tag error in bank 1 */
+ unsigned long va; /* Effective VA of fault or miss. */
+ unsigned long mm_stat; /* Holds the reason for D-stream
+ fault or D-cache parity errors */
+ unsigned long sc_addr; /* Address that was being accessed
+ when EV5 detected Secondary cache
+ failure. */
+ unsigned long sc_stat; /* Helps determine if the error was
+ TAG/Data parity(Secondary Cache)*/
+ unsigned long bc_tag_addr; /* Contents of EV5 BC_TAG_ADDR */
+ unsigned long ei_addr; /* Physical address of any transfer
+ that is logged in EV5 EI_STAT */
+ unsigned long fill_syndrome; /* For correcting ECC errors. */
+ unsigned long ei_stat; /* Helps identify reason of any
+ processor uncorrectable error
+ at its external interface. */
+ unsigned long ld_lock; /* Contents of EV5 LD_LOCK register*/
+};
+
+struct el_common_EV6_mcheck {
+ unsigned int FrameSize; /* Bytes, including this field */
+ unsigned int FrameFlags; /* <31> = Retry, <30> = Second Error */
+ unsigned int CpuOffset; /* Offset to CPU-specific info */
+ unsigned int SystemOffset; /* Offset to system-specific info */
+ unsigned int MCHK_Code;
+ unsigned int MCHK_Frame_Rev;
+ unsigned long I_STAT; /* EV6 Internal Processor Registers */
+ unsigned long DC_STAT; /* (See the 21264 Spec) */
+ unsigned long C_ADDR;
+ unsigned long DC1_SYNDROME;
+ unsigned long DC0_SYNDROME;
+ unsigned long C_STAT;
+ unsigned long C_STS;
+ unsigned long MM_STAT;
+ unsigned long EXC_ADDR;
+ unsigned long IER_CM;
+ unsigned long ISUM;
+ unsigned long RESERVED0;
+ unsigned long PAL_BASE;
+ unsigned long I_CTL;
+ unsigned long PCTX;
+};
+
+
+#endif /* __ALPHA_MCE_H */
diff --git a/arch/alpha/include/asm/pal.h b/arch/alpha/include/asm/pal.h
index 9b4ba0d..6699ee5 100644
--- a/arch/alpha/include/asm/pal.h
+++ b/arch/alpha/include/asm/pal.h
@@ -48,4 +48,116 @@
#define PAL_retsys 61
#define PAL_rti 63

+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+extern void halt(void) __attribute__((noreturn));
+#define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt))
+
+#define imb() \
+__asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory")
+
+#define draina() \
+__asm__ __volatile__ ("call_pal %0 #draina" : : "i" (PAL_draina) : "memory")
+
+#define __CALL_PAL_R0(NAME, TYPE) \
+extern inline TYPE NAME(void) \
+{ \
+ register TYPE __r0 __asm__("$0"); \
+ __asm__ __volatile__( \
+ "call_pal %1 # " #NAME \
+ :"=r" (__r0) \
+ :"i" (PAL_ ## NAME) \
+ :"$1", "$16", "$22", "$23", "$24", "$25"); \
+ return __r0; \
+}
+
+#define __CALL_PAL_W1(NAME, TYPE0) \
+extern inline void NAME(TYPE0 arg0) \
+{ \
+ register TYPE0 __r16 __asm__("$16") = arg0; \
+ __asm__ __volatile__( \
+ "call_pal %1 # "#NAME \
+ : "=r"(__r16) \
+ : "i"(PAL_ ## NAME), "0"(__r16) \
+ : "$1", "$22", "$23", "$24", "$25"); \
+}
+
+#define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \
+extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
+{ \
+ register TYPE0 __r16 __asm__("$16") = arg0; \
+ register TYPE1 __r17 __asm__("$17") = arg1; \
+ __asm__ __volatile__( \
+ "call_pal %2 # "#NAME \
+ : "=r"(__r16), "=r"(__r17) \
+ : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
+ : "$1", "$22", "$23", "$24", "$25"); \
+}
+
+#define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \
+extern inline RTYPE NAME(TYPE0 arg0) \
+{ \
+ register RTYPE __r0 __asm__("$0"); \
+ register TYPE0 __r16 __asm__("$16") = arg0; \
+ __asm__ __volatile__( \
+ "call_pal %2 # "#NAME \
+ : "=r"(__r16), "=r"(__r0) \
+ : "i"(PAL_ ## NAME), "0"(__r16) \
+ : "$1", "$22", "$23", "$24", "$25"); \
+ return __r0; \
+}
+
+#define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \
+extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
+{ \
+ register RTYPE __r0 __asm__("$0"); \
+ register TYPE0 __r16 __asm__("$16") = arg0; \
+ register TYPE1 __r17 __asm__("$17") = arg1; \
+ __asm__ __volatile__( \
+ "call_pal %3 # "#NAME \
+ : "=r"(__r16), "=r"(__r17), "=r"(__r0) \
+ : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
+ : "$1", "$22", "$23", "$24", "$25"); \
+ return __r0; \
+}
+
+__CALL_PAL_W1(cflush, unsigned long);
+__CALL_PAL_R0(rdmces, unsigned long);
+__CALL_PAL_R0(rdps, unsigned long);
+__CALL_PAL_R0(rdusp, unsigned long);
+__CALL_PAL_RW1(swpipl, unsigned long, unsigned long);
+__CALL_PAL_R0(whami, unsigned long);
+__CALL_PAL_W2(wrent, void*, unsigned long);
+__CALL_PAL_W1(wripir, unsigned long);
+__CALL_PAL_W1(wrkgp, unsigned long);
+__CALL_PAL_W1(wrmces, unsigned long);
+__CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long);
+__CALL_PAL_W1(wrusp, unsigned long);
+__CALL_PAL_W1(wrvptptr, unsigned long);
+
+/*
+ * TB routines..
+ */
+#define __tbi(nr,arg,arg1...) \
+({ \
+ register unsigned long __r16 __asm__("$16") = (nr); \
+ register unsigned long __r17 __asm__("$17"); arg; \
+ __asm__ __volatile__( \
+ "call_pal %3 #__tbi" \
+ :"=r" (__r16),"=r" (__r17) \
+ :"0" (__r16),"i" (PAL_tbi) ,##arg1 \
+ :"$0", "$1", "$22", "$23", "$24", "$25"); \
+})
+
+#define tbi(x,y) __tbi(x,__r17=(y),"1" (__r17))
+#define tbisi(x) __tbi(1,__r17=(x),"1" (__r17))
+#define tbisd(x) __tbi(2,__r17=(x),"1" (__r17))
+#define tbis(x) __tbi(3,__r17=(x),"1" (__r17))
+#define tbiap() __tbi(-1, /* no second argument */)
+#define tbia() __tbi(-2, /* no second argument */)
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ */
+
#endif /* __ALPHA_PAL_H */
diff --git a/arch/alpha/include/asm/pgtable.h b/arch/alpha/include/asm/pgtable.h
index de98a73..81a4342 100644
--- a/arch/alpha/include/asm/pgtable.h
+++ b/arch/alpha/include/asm/pgtable.h
@@ -15,6 +15,7 @@
#include <asm/page.h>
#include <asm/processor.h> /* For TASK_SIZE */
#include <asm/machvec.h>
+#include <asm/setup.h>

struct mm_struct;
struct vm_area_struct;
diff --git a/arch/alpha/include/asm/setup.h b/arch/alpha/include/asm/setup.h
index 2e023a4..b50014b 100644
--- a/arch/alpha/include/asm/setup.h
+++ b/arch/alpha/include/asm/setup.h
@@ -3,4 +3,40 @@

#define COMMAND_LINE_SIZE 256

+/*
+ * We leave one page for the initial stack page, and one page for
+ * the initial process structure. Also, the console eats 3 MB for
+ * the initial bootloader (one of which we can reclaim later).
+ */
+#define BOOT_PCB 0x20000000
+#define BOOT_ADDR 0x20000000
+/* Remove when official MILO sources have ELF support: */
+#define BOOT_SIZE (16*1024)
+
+#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
+#define KERNEL_START_PHYS 0x300000 /* Old bootloaders hardcoded this. */
+#else
+#define KERNEL_START_PHYS 0x1000000 /* required: Wildfire/Titan/Marvel */
+#endif
+
+#define KERNEL_START (PAGE_OFFSET+KERNEL_START_PHYS)
+#define SWAPPER_PGD KERNEL_START
+#define INIT_STACK (PAGE_OFFSET+KERNEL_START_PHYS+0x02000)
+#define EMPTY_PGT (PAGE_OFFSET+KERNEL_START_PHYS+0x04000)
+#define EMPTY_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x08000)
+#define ZERO_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x0A000)
+
+#define START_ADDR (PAGE_OFFSET+KERNEL_START_PHYS+0x10000)
+
+/*
+ * This is setup by the secondary bootstrap loader. Because
+ * the zero page is zeroed out as soon as the vm system is
+ * initialized, we need to copy things out into a more permanent
+ * place.
+ */
+#define PARAM ZERO_PGE
+#define COMMAND_LINE ((char*)(PARAM + 0x0000))
+#define INITRD_START (*(unsigned long *) (PARAM+0x100))
+#define INITRD_SIZE (*(unsigned long *) (PARAM+0x108))
+
#endif
diff --git a/arch/alpha/include/asm/special_insns.h b/arch/alpha/include/asm/special_insns.h
new file mode 100644
index 0000000..88d3452
--- /dev/null
+++ b/arch/alpha/include/asm/special_insns.h
@@ -0,0 +1,41 @@
+#ifndef __ALPHA_SPECIAL_INSNS_H
+#define __ALPHA_SPECIAL_INSNS_H
+
+enum implver_enum {
+ IMPLVER_EV4,
+ IMPLVER_EV5,
+ IMPLVER_EV6
+};
+
+#ifdef CONFIG_ALPHA_GENERIC
+#define implver() \
+({ unsigned long __implver; \
+ __asm__ ("implver %0" : "=r"(__implver)); \
+ (enum implver_enum) __implver; })
+#else
+/* Try to eliminate some dead code. */
+#ifdef CONFIG_ALPHA_EV4
+#define implver() IMPLVER_EV4
+#endif
+#ifdef CONFIG_ALPHA_EV5
+#define implver() IMPLVER_EV5
+#endif
+#if defined(CONFIG_ALPHA_EV6)
+#define implver() IMPLVER_EV6
+#endif
+#endif
+
+enum amask_enum {
+ AMASK_BWX = (1UL << 0),
+ AMASK_FIX = (1UL << 1),
+ AMASK_CIX = (1UL << 2),
+ AMASK_MAX = (1UL << 8),
+ AMASK_PRECISE_TRAP = (1UL << 9),
+};
+
+#define amask(mask) \
+({ unsigned long __amask, __input = (mask); \
+ __asm__ ("amask %1,%0" : "=r"(__amask) : "rI"(__input)); \
+ __amask; })
+
+#endif /* __ALPHA_SPECIAL_INSNS_H */
diff --git a/arch/alpha/include/asm/switch_to.h b/arch/alpha/include/asm/switch_to.h
new file mode 100644
index 0000000..44c0d4f
--- /dev/null
+++ b/arch/alpha/include/asm/switch_to.h
@@ -0,0 +1,14 @@
+#ifndef __ALPHA_SWITCH_TO_H
+#define __ALPHA_SWITCH_TO_H
+
+
+struct task_struct;
+extern struct task_struct *alpha_switch_to(unsigned long, struct task_struct *);
+
+#define switch_to(P,N,L) \
+ do { \
+ (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \
+ check_mmu_context(); \
+ } while (0)
+
+#endif /* __ALPHA_SWITCH_TO_H */
diff --git a/arch/alpha/include/asm/system.h b/arch/alpha/include/asm/system.h
deleted file mode 100644
index 9f78e69..0000000
--- a/arch/alpha/include/asm/system.h
+++ /dev/null
@@ -1,354 +0,0 @@
-#ifndef __ALPHA_SYSTEM_H
-#define __ALPHA_SYSTEM_H
-
-#include <asm/pal.h>
-#include <asm/page.h>
-#include <asm/barrier.h>
-
-/*
- * System defines.. Note that this is included both from .c and .S
- * files, so it does only defines, not any C code.
- */
-
-/*
- * We leave one page for the initial stack page, and one page for
- * the initial process structure. Also, the console eats 3 MB for
- * the initial bootloader (one of which we can reclaim later).
- */
-#define BOOT_PCB 0x20000000
-#define BOOT_ADDR 0x20000000
-/* Remove when official MILO sources have ELF support: */
-#define BOOT_SIZE (16*1024)
-
-#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
-#define KERNEL_START_PHYS 0x300000 /* Old bootloaders hardcoded this. */
-#else
-#define KERNEL_START_PHYS 0x1000000 /* required: Wildfire/Titan/Marvel */
-#endif
-
-#define KERNEL_START (PAGE_OFFSET+KERNEL_START_PHYS)
-#define SWAPPER_PGD KERNEL_START
-#define INIT_STACK (PAGE_OFFSET+KERNEL_START_PHYS+0x02000)
-#define EMPTY_PGT (PAGE_OFFSET+KERNEL_START_PHYS+0x04000)
-#define EMPTY_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x08000)
-#define ZERO_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x0A000)
-
-#define START_ADDR (PAGE_OFFSET+KERNEL_START_PHYS+0x10000)
-
-/*
- * This is setup by the secondary bootstrap loader. Because
- * the zero page is zeroed out as soon as the vm system is
- * initialized, we need to copy things out into a more permanent
- * place.
- */
-#define PARAM ZERO_PGE
-#define COMMAND_LINE ((char*)(PARAM + 0x0000))
-#define INITRD_START (*(unsigned long *) (PARAM+0x100))
-#define INITRD_SIZE (*(unsigned long *) (PARAM+0x108))
-
-#ifndef __ASSEMBLY__
-#include <linux/kernel.h>
-#define AT_VECTOR_SIZE_ARCH 4 /* entries in ARCH_DLINFO */
-
-/*
- * This is the logout header that should be common to all platforms
- * (assuming they are running OSF/1 PALcode, I guess).
- */
-struct el_common {
- unsigned int size; /* size in bytes of logout area */
- unsigned int sbz1 : 30; /* should be zero */
- unsigned int err2 : 1; /* second error */
- unsigned int retry : 1; /* retry flag */
- unsigned int proc_offset; /* processor-specific offset */
- unsigned int sys_offset; /* system-specific offset */
- unsigned int code; /* machine check code */
- unsigned int frame_rev; /* frame revision */
-};
-
-/* Machine Check Frame for uncorrectable errors (Large format)
- * --- This is used to log uncorrectable errors such as
- * double bit ECC errors.
- * --- These errors are detected by both processor and systems.
- */
-struct el_common_EV5_uncorrectable_mcheck {
- unsigned long shadow[8]; /* Shadow reg. 8-14, 25 */
- unsigned long paltemp[24]; /* PAL TEMP REGS. */
- unsigned long exc_addr; /* Address of excepting instruction*/
- unsigned long exc_sum; /* Summary of arithmetic traps. */
- unsigned long exc_mask; /* Exception mask (from exc_sum). */
- unsigned long pal_base; /* Base address for PALcode. */
- unsigned long isr; /* Interrupt Status Reg. */
- unsigned long icsr; /* CURRENT SETUP OF EV5 IBOX */
- unsigned long ic_perr_stat; /* I-CACHE Reg. <11> set Data parity
- <12> set TAG parity*/
- unsigned long dc_perr_stat; /* D-CACHE error Reg. Bits set to 1:
- <2> Data error in bank 0
- <3> Data error in bank 1
- <4> Tag error in bank 0
- <5> Tag error in bank 1 */
- unsigned long va; /* Effective VA of fault or miss. */
- unsigned long mm_stat; /* Holds the reason for D-stream
- fault or D-cache parity errors */
- unsigned long sc_addr; /* Address that was being accessed
- when EV5 detected Secondary cache
- failure. */
- unsigned long sc_stat; /* Helps determine if the error was
- TAG/Data parity(Secondary Cache)*/
- unsigned long bc_tag_addr; /* Contents of EV5 BC_TAG_ADDR */
- unsigned long ei_addr; /* Physical address of any transfer
- that is logged in EV5 EI_STAT */
- unsigned long fill_syndrome; /* For correcting ECC errors. */
- unsigned long ei_stat; /* Helps identify reason of any
- processor uncorrectable error
- at its external interface. */
- unsigned long ld_lock; /* Contents of EV5 LD_LOCK register*/
-};
-
-struct el_common_EV6_mcheck {
- unsigned int FrameSize; /* Bytes, including this field */
- unsigned int FrameFlags; /* <31> = Retry, <30> = Second Error */
- unsigned int CpuOffset; /* Offset to CPU-specific info */
- unsigned int SystemOffset; /* Offset to system-specific info */
- unsigned int MCHK_Code;
- unsigned int MCHK_Frame_Rev;
- unsigned long I_STAT; /* EV6 Internal Processor Registers */
- unsigned long DC_STAT; /* (See the 21264 Spec) */
- unsigned long C_ADDR;
- unsigned long DC1_SYNDROME;
- unsigned long DC0_SYNDROME;
- unsigned long C_STAT;
- unsigned long C_STS;
- unsigned long MM_STAT;
- unsigned long EXC_ADDR;
- unsigned long IER_CM;
- unsigned long ISUM;
- unsigned long RESERVED0;
- unsigned long PAL_BASE;
- unsigned long I_CTL;
- unsigned long PCTX;
-};
-
-extern void halt(void) __attribute__((noreturn));
-#define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt))
-
-#define switch_to(P,N,L) \
- do { \
- (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \
- check_mmu_context(); \
- } while (0)
-
-struct task_struct;
-extern struct task_struct *alpha_switch_to(unsigned long, struct task_struct*);
-
-#define imb() \
-__asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory")
-
-#define draina() \
-__asm__ __volatile__ ("call_pal %0 #draina" : : "i" (PAL_draina) : "memory")
-
-enum implver_enum {
- IMPLVER_EV4,
- IMPLVER_EV5,
- IMPLVER_EV6
-};
-
-#ifdef CONFIG_ALPHA_GENERIC
-#define implver() \
-({ unsigned long __implver; \
- __asm__ ("implver %0" : "=r"(__implver)); \
- (enum implver_enum) __implver; })
-#else
-/* Try to eliminate some dead code. */
-#ifdef CONFIG_ALPHA_EV4
-#define implver() IMPLVER_EV4
-#endif
-#ifdef CONFIG_ALPHA_EV5
-#define implver() IMPLVER_EV5
-#endif
-#if defined(CONFIG_ALPHA_EV6)
-#define implver() IMPLVER_EV6
-#endif
-#endif
-
-enum amask_enum {
- AMASK_BWX = (1UL << 0),
- AMASK_FIX = (1UL << 1),
- AMASK_CIX = (1UL << 2),
- AMASK_MAX = (1UL << 8),
- AMASK_PRECISE_TRAP = (1UL << 9),
-};
-
-#define amask(mask) \
-({ unsigned long __amask, __input = (mask); \
- __asm__ ("amask %1,%0" : "=r"(__amask) : "rI"(__input)); \
- __amask; })
-
-#define __CALL_PAL_R0(NAME, TYPE) \
-extern inline TYPE NAME(void) \
-{ \
- register TYPE __r0 __asm__("$0"); \
- __asm__ __volatile__( \
- "call_pal %1 # " #NAME \
- :"=r" (__r0) \
- :"i" (PAL_ ## NAME) \
- :"$1", "$16", "$22", "$23", "$24", "$25"); \
- return __r0; \
-}
-
-#define __CALL_PAL_W1(NAME, TYPE0) \
-extern inline void NAME(TYPE0 arg0) \
-{ \
- register TYPE0 __r16 __asm__("$16") = arg0; \
- __asm__ __volatile__( \
- "call_pal %1 # "#NAME \
- : "=r"(__r16) \
- : "i"(PAL_ ## NAME), "0"(__r16) \
- : "$1", "$22", "$23", "$24", "$25"); \
-}
-
-#define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \
-extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
-{ \
- register TYPE0 __r16 __asm__("$16") = arg0; \
- register TYPE1 __r17 __asm__("$17") = arg1; \
- __asm__ __volatile__( \
- "call_pal %2 # "#NAME \
- : "=r"(__r16), "=r"(__r17) \
- : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
- : "$1", "$22", "$23", "$24", "$25"); \
-}
-
-#define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \
-extern inline RTYPE NAME(TYPE0 arg0) \
-{ \
- register RTYPE __r0 __asm__("$0"); \
- register TYPE0 __r16 __asm__("$16") = arg0; \
- __asm__ __volatile__( \
- "call_pal %2 # "#NAME \
- : "=r"(__r16), "=r"(__r0) \
- : "i"(PAL_ ## NAME), "0"(__r16) \
- : "$1", "$22", "$23", "$24", "$25"); \
- return __r0; \
-}
-
-#define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \
-extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
-{ \
- register RTYPE __r0 __asm__("$0"); \
- register TYPE0 __r16 __asm__("$16") = arg0; \
- register TYPE1 __r17 __asm__("$17") = arg1; \
- __asm__ __volatile__( \
- "call_pal %3 # "#NAME \
- : "=r"(__r16), "=r"(__r17), "=r"(__r0) \
- : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
- : "$1", "$22", "$23", "$24", "$25"); \
- return __r0; \
-}
-
-__CALL_PAL_W1(cflush, unsigned long);
-__CALL_PAL_R0(rdmces, unsigned long);
-__CALL_PAL_R0(rdps, unsigned long);
-__CALL_PAL_R0(rdusp, unsigned long);
-__CALL_PAL_RW1(swpipl, unsigned long, unsigned long);
-__CALL_PAL_R0(whami, unsigned long);
-__CALL_PAL_W2(wrent, void*, unsigned long);
-__CALL_PAL_W1(wripir, unsigned long);
-__CALL_PAL_W1(wrkgp, unsigned long);
-__CALL_PAL_W1(wrmces, unsigned long);
-__CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long);
-__CALL_PAL_W1(wrusp, unsigned long);
-__CALL_PAL_W1(wrvptptr, unsigned long);
-
-/*
- * TB routines..
- */
-#define __tbi(nr,arg,arg1...) \
-({ \
- register unsigned long __r16 __asm__("$16") = (nr); \
- register unsigned long __r17 __asm__("$17"); arg; \
- __asm__ __volatile__( \
- "call_pal %3 #__tbi" \
- :"=r" (__r16),"=r" (__r17) \
- :"0" (__r16),"i" (PAL_tbi) ,##arg1 \
- :"$0", "$1", "$22", "$23", "$24", "$25"); \
-})
-
-#define tbi(x,y) __tbi(x,__r17=(y),"1" (__r17))
-#define tbisi(x) __tbi(1,__r17=(x),"1" (__r17))
-#define tbisd(x) __tbi(2,__r17=(x),"1" (__r17))
-#define tbis(x) __tbi(3,__r17=(x),"1" (__r17))
-#define tbiap() __tbi(-1, /* no second argument */)
-#define tbia() __tbi(-2, /* no second argument */)
-
-/*
- * Atomic exchange routines.
- */
-
-#define __ASM__MB
-#define ____xchg(type, args...) __xchg ## type ## _local(args)
-#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
-#include <asm/xchg.h>
-
-#define xchg_local(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
- sizeof(*(ptr))); \
- })
-
-#define cmpxchg_local(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, \
- sizeof(*(ptr))); \
- })
-
-#define cmpxchg64_local(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg_local((ptr), (o), (n)); \
- })
-
-#ifdef CONFIG_SMP
-#undef __ASM__MB
-#define __ASM__MB "\tmb\n"
-#endif
-#undef ____xchg
-#undef ____cmpxchg
-#define ____xchg(type, args...) __xchg ##type(args)
-#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
-#include <asm/xchg.h>
-
-#define xchg(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
- sizeof(*(ptr))); \
- })
-
-#define cmpxchg(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr)));\
- })
-
-#define cmpxchg64(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg((ptr), (o), (n)); \
- })
-
-#undef __ASM__MB
-#undef ____cmpxchg
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-#endif /* __ASSEMBLY__ */
-
-#define arch_align_stack(x) (x)
-
-#endif
diff --git a/arch/alpha/include/asm/xchg.h b/arch/alpha/include/asm/xchg.h
index beba1b8..1d1b436 100644
--- a/arch/alpha/include/asm/xchg.h
+++ b/arch/alpha/include/asm/xchg.h
@@ -1,4 +1,4 @@
-#ifndef __ALPHA_SYSTEM_H
+#ifndef _ALPHA_ATOMIC_H
#error Do not include xchg.h directly!
#else
/*
diff --git a/arch/alpha/kernel/core_apecs.c b/arch/alpha/kernel/core_apecs.c
index ca46b2c..708c831 100644
--- a/arch/alpha/kernel/core_apecs.c
+++ b/arch/alpha/kernel/core_apecs.c
@@ -21,6 +21,7 @@

#include <asm/ptrace.h>
#include <asm/smp.h>
+#include <asm/mce.h>

#include "proto.h"
#include "pci_impl.h"
diff --git a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c
index 1d6ee6c..c44339e 100644
--- a/arch/alpha/kernel/core_cia.c
+++ b/arch/alpha/kernel/core_cia.c
@@ -23,6 +23,7 @@
#include <linux/bootmem.h>

#include <asm/ptrace.h>
+#include <asm/mce.h>

#include "proto.h"
#include "pci_impl.h"
diff --git a/arch/alpha/kernel/core_t2.c b/arch/alpha/kernel/core_t2.c
index 2f770e9..3ada4f7 100644
--- a/arch/alpha/kernel/core_t2.c
+++ b/arch/alpha/kernel/core_t2.c
@@ -21,6 +21,7 @@

#include <asm/ptrace.h>
#include <asm/delay.h>
+#include <asm/mce.h>

#include "proto.h"
#include "pci_impl.h"
diff --git a/arch/alpha/kernel/err_impl.h b/arch/alpha/kernel/err_impl.h
index 0c010ca..ae529c4 100644
--- a/arch/alpha/kernel/err_impl.h
+++ b/arch/alpha/kernel/err_impl.h
@@ -7,6 +7,8 @@
* implementations.
*/

+#include <asm/mce.h>
+
union el_timestamp;
struct el_subpacket;
struct ev7_lf_subpackets;
diff --git a/arch/alpha/kernel/head.S b/arch/alpha/kernel/head.S
index 3f6dcba..c352499 100644
--- a/arch/alpha/kernel/head.S
+++ b/arch/alpha/kernel/head.S
@@ -9,12 +9,11 @@

#include <linux/init.h>
#include <asm/asm-offsets.h>
+#include <asm/pal.h>
+#include <asm/setup.h>

__HEAD
-.globl swapper_pg_dir
.globl _stext
-swapper_pg_dir=SWAPPER_PGD
-
.set noreorder
.globl __start
.ent __start
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index 51b7fbd..772ddfd 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -11,6 +11,7 @@
#include <asm/machvec.h>
#include <asm/dma.h>
#include <asm/perf_event.h>
+#include <asm/mce.h>

#include "proto.h"
#include "irq_impl.h"
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c
index 21c8ce4..5e82dc1 100644
--- a/arch/alpha/kernel/sys_mikasa.c
+++ b/arch/alpha/kernel/sys_mikasa.c
@@ -17,6 +17,7 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
+#include <asm/mce.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
index c5404a5..063e594 100644
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -18,6 +18,7 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
+#include <asm/mce.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_sx164.c b/arch/alpha/kernel/sys_sx164.c
index 2b78a15..d063b36 100644
--- a/arch/alpha/kernel/sys_sx164.c
+++ b/arch/alpha/kernel/sys_sx164.c
@@ -25,6 +25,7 @@
#include <asm/core_cia.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
+#include <asm/special_insns.h>

#include "proto.h"
#include "irq_impl.h"
diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c
index 0414e02..80d987c 100644
--- a/arch/alpha/kernel/traps.c
+++ b/arch/alpha/kernel/traps.c
@@ -24,6 +24,7 @@
#include <asm/sysinfo.h>
#include <asm/hwrpb.h>
#include <asm/mmu_context.h>
+#include <asm/special_insns.h>

#include "proto.h"

diff --git a/arch/alpha/kernel/vmlinux.lds.S b/arch/alpha/kernel/vmlinux.lds.S
index f937ad1..647b84c 100644
--- a/arch/alpha/kernel/vmlinux.lds.S
+++ b/arch/alpha/kernel/vmlinux.lds.S
@@ -2,6 +2,7 @@
#include <asm/thread_info.h>
#include <asm/cache.h>
#include <asm/page.h>
+#include <asm/setup.h>

OUTPUT_FORMAT("elf64-alpha")
OUTPUT_ARCH(alpha)
@@ -25,6 +26,7 @@ SECTIONS
*(.fixup)
*(.gnu.warning)
} :kernel
+ swapper_pg_dir = SWAPPER_PGD;
_etext = .; /* End of text section */

NOTES :kernel :note
diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c
index 69a6c21..1ad6ca7 100644
--- a/arch/alpha/mm/init.c
+++ b/arch/alpha/mm/init.c
@@ -30,6 +30,7 @@
#include <asm/mmu_context.h>
#include <asm/console.h>
#include <asm/tlb.h>
+#include <asm/setup.h>

extern void die_if_kernel(char *,struct pt_regs *,long);


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 05/29] Disintegrate asm/system.h for ARM
March 07, 2012 09:00PM
Signed-off-by: David Howells <[email protected]>
---

arch/arm/include/asm/atomic.h | 289 +++++++++++++++++++
arch/arm/include/asm/barrier.h | 64 ++++
arch/arm/include/asm/bitops.h | 1
arch/arm/include/asm/bug.h | 30 ++
arch/arm/include/asm/compiler.h | 15 +
arch/arm/include/asm/cr_reg.h | 85 ++++++
arch/arm/include/asm/div64.h | 1
arch/arm/include/asm/domain.h | 2
arch/arm/include/asm/exec.h | 6
arch/arm/include/asm/mmu.h | 7
arch/arm/include/asm/switch_to.h | 16 +
arch/arm/include/asm/system.h | 543 ------------------------------------
arch/arm/include/asm/system_info.h | 27 ++
arch/arm/include/asm/system_misc.h | 35 ++
arch/arm/include/asm/uaccess.h | 1
arch/arm/kernel/elf.c | 1
arch/arm/kernel/head.S | 1
arch/arm/kernel/setup.c | 3
arch/arm/kernel/traps.c | 1
arch/arm/mm/alignment.c | 2
arch/arm/mm/fault.c | 2
arch/arm/mm/idmap.c | 1
arch/arm/mm/ioremap.c | 2
arch/arm/mm/mmu.c | 2
arch/arm/mm/pgd.c | 1
arch/arm/vfp/vfpmodule.c | 2
26 files changed, 597 insertions(+), 543 deletions(-)
create mode 100644 arch/arm/include/asm/barrier.h
create mode 100644 arch/arm/include/asm/compiler.h
create mode 100644 arch/arm/include/asm/cr_reg.h
create mode 100644 arch/arm/include/asm/exec.h
create mode 100644 arch/arm/include/asm/switch_to.h
delete mode 100644 arch/arm/include/asm/system.h
create mode 100644 arch/arm/include/asm/system_info.h
create mode 100644 arch/arm/include/asm/system_misc.h

diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index cadb012..a9830af 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -13,11 +13,300 @@

#include <linux/compiler.h>
#include <linux/types.h>
+#include <asm/barrier.h>

#define ATOMIC_INIT(i) { (i) }

#ifdef __KERNEL__

+#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
+/*
+ * On the StrongARM, "swp" is terminally broken since it bypasses the
+ * cache totally. This means that the cache becomes inconsistent, and,
+ * since we use normal loads/stores as well, this is really bad.
+ * Typically, this causes oopsen in filp_close, but could have other,
+ * more disastrous effects. There are two work-arounds:
+ * 1. Disable interrupts and emulate the atomic swap
+ * 2. Clean the cache, perform atomic swap, flush the cache
+ *
+ * We choose (1) since its the "easiest" to achieve here and is not
+ * dependent on the processor type.
+ *
+ * NOTE that this solution won't work on an SMP system, so explcitly
+ * forbid it here.
+ */
+#define swp_is_buggy
+#endif
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
+{
+ extern void __bad_xchg(volatile void *, int);
+ unsigned long ret;
+#ifdef swp_is_buggy
+ unsigned long flags;
+#endif
+#if __LINUX_ARM_ARCH__ >= 6
+ unsigned int tmp;
+#endif
+
+ smp_mb();
+
+ switch (size) {
+#if __LINUX_ARM_ARCH__ >= 6
+ case 1:
+ asm volatile("@ __xchg1\n"
+ "1: ldrexb %0, [%3]\n"
+ " strexb %1, %2, [%3]\n"
+ " teq %1, #0\n"
+ " bne 1b"
+ : "=&r" (ret), "=&r" (tmp)
+ : "r" (x), "r" (ptr)
+ : "memory", "cc");
+ break;
+ case 4:
+ asm volatile("@ __xchg4\n"
+ "1: ldrex %0, [%3]\n"
+ " strex %1, %2, [%3]\n"
+ " teq %1, #0\n"
+ " bne 1b"
+ : "=&r" (ret), "=&r" (tmp)
+ : "r" (x), "r" (ptr)
+ : "memory", "cc");
+ break;
+#elif defined(swp_is_buggy)
+#ifdef CONFIG_SMP
+#error SMP is not supported on this platform
+#endif
+ case 1:
+ raw_local_irq_save(flags);
+ ret = *(volatile unsigned char *)ptr;
+ *(volatile unsigned char *)ptr = x;
+ raw_local_irq_restore(flags);
+ break;
+
+ case 4:
+ raw_local_irq_save(flags);
+ ret = *(volatile unsigned long *)ptr;
+ *(volatile unsigned long *)ptr = x;
+ raw_local_irq_restore(flags);
+ break;
+#else
+ case 1:
+ asm volatile("@ __xchg1\n"
+ " swpb %0, %1, [%2]"
+ : "=&r" (ret)
+ : "r" (x), "r" (ptr)
+ : "memory", "cc");
+ break;
+ case 4:
+ asm volatile("@ __xchg4\n"
+ " swp %0, %1, [%2]"
+ : "=&r" (ret)
+ : "r" (x), "r" (ptr)
+ : "memory", "cc");
+ break;
+#endif
+ default:
+ __bad_xchg(ptr, size), ret = 0;
+ break;
+ }
+ smp_mb();
+
+ return ret;
+}
+
+#define xchg(ptr,x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+#if __LINUX_ARM_ARCH__ < 6
+/* min ARCH < ARMv6 */
+
+#ifdef CONFIG_SMP
+#error "SMP is not supported on this platform"
+#endif
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#ifndef CONFIG_SMP
+#include <asm-generic/cmpxchg.h>
+#endif
+
+#else /* min ARCH >= ARMv6 */
+
+extern void __bad_cmpxchg(volatile void *ptr, int size);
+
+/*
+ * cmpxchg only support 32-bits operands on ARMv6.
+ */
+
+static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
+ unsigned long new, int size)
+{
+ unsigned long oldval, res;
+
+ switch (size) {
+#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+ case 1:
+ do {
+ asm volatile("@ __cmpxchg1\n"
+ " ldrexb %1, [%2]\n"
+ " mov %0, #0\n"
+ " teq %1, %3\n"
+ " strexbeq %0, %4, [%2]\n"
+ : "=&r" (res), "=&r" (oldval)
+ : "r" (ptr), "Ir" (old), "r" (new)
+ : "memory", "cc");
+ } while (res);
+ break;
+ case 2:
+ do {
+ asm volatile("@ __cmpxchg1\n"
+ " ldrexh %1, [%2]\n"
+ " mov %0, #0\n"
+ " teq %1, %3\n"
+ " strexheq %0, %4, [%2]\n"
+ : "=&r" (res), "=&r" (oldval)
+ : "r" (ptr), "Ir" (old), "r" (new)
+ : "memory", "cc");
+ } while (res);
+ break;
+#endif
+ case 4:
+ do {
+ asm volatile("@ __cmpxchg4\n"
+ " ldrex %1, [%2]\n"
+ " mov %0, #0\n"
+ " teq %1, %3\n"
+ " strexeq %0, %4, [%2]\n"
+ : "=&r" (res), "=&r" (oldval)
+ : "r" (ptr), "Ir" (old), "r" (new)
+ : "memory", "cc");
+ } while (res);
+ break;
+ default:
+ __bad_cmpxchg(ptr, size);
+ oldval = 0;
+ }
+
+ return oldval;
+}
+
+static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
+ unsigned long new, int size)
+{
+ unsigned long ret;
+
+ smp_mb();
+ ret = __cmpxchg(ptr, old, new, size);
+ smp_mb();
+
+ return ret;
+}
+
+#define cmpxchg(ptr,o,n) \
+ ((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
+ (unsigned long)(o), \
+ (unsigned long)(n), \
+ sizeof(*(ptr))))
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+ unsigned long old,
+ unsigned long new, int size)
+{
+ unsigned long ret;
+
+ switch (size) {
+#ifdef CONFIG_CPU_V6 /* min ARCH == ARMv6 */
+ case 1:
+ case 2:
+ ret = __cmpxchg_local_generic(ptr, old, new, size);
+ break;
+#endif
+ default:
+ ret = __cmpxchg(ptr, old, new, size);
+ }
+
+ return ret;
+}
+
+#define cmpxchg_local(ptr,o,n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
+ (unsigned long)(o), \
+ (unsigned long)(n), \
+ sizeof(*(ptr))))
+
+#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+
+/*
+ * Note : ARMv7-M (currently unsupported by Linux) does not support
+ * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
+ * not be allowed to use __cmpxchg64.
+ */
+static inline unsigned long long __cmpxchg64(volatile void *ptr,
+ unsigned long long old,
+ unsigned long long new)
+{
+ register unsigned long long oldval asm("r0");
+ register unsigned long long __old asm("r2") = old;
+ register unsigned long long __new asm("r4") = new;
+ unsigned long res;
+
+ do {
+ asm volatile(
+ " @ __cmpxchg8\n"
+ " ldrexd %1, %H1, [%2]\n"
+ " mov %0, #0\n"
+ " teq %1, %3\n"
+ " teqeq %H1, %H3\n"
+ " strexdeq %0, %4, %H4, [%2]\n"
+ : "=&r" (res), "=&r" (oldval)
+ : "r" (ptr), "Ir" (__old), "r" (__new)
+ : "memory", "cc");
+ } while (res);
+
+ return oldval;
+}
+
+static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
+ unsigned long long old,
+ unsigned long long new)
+{
+ unsigned long long ret;
+
+ smp_mb();
+ ret = __cmpxchg64(ptr, old, new);
+ smp_mb();
+
+ return ret;
+}
+
+#define cmpxchg64(ptr,o,n) \
+ ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
+ (unsigned long long)(o), \
+ (unsigned long long)(n)))
+
+#define cmpxchg64_local(ptr,o,n) \
+ ((__typeof__(*(ptr)))__cmpxchg64((ptr), \
+ (unsigned long long)(o), \
+ (unsigned long long)(n)))
+
+#else /* min ARCH = ARMv6 */
+
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#endif
+
+#endif /* __LINUX_ARM_ARCH__ >= 6 */
+
/*
* On ARM, ordinary assignment (str instruction) doesn't clear the local
* strex/ldrex monitor on some implementations. The reason we can use it for
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
new file mode 100644
index 0000000..81b24b6
--- /dev/null
+++ b/arch/arm/include/asm/barrier.h
@@ -0,0 +1,64 @@
+#ifndef __ASM_BARRIER_H
+#define __ASM_BARRIER_H
+
+
+#if __LINUX_ARM_ARCH__ >= 7 || \
+ (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K))
+#define sev() __asm__ __volatile__ ("sev" : : : "memory")
+#define wfe() __asm__ __volatile__ ("wfe" : : : "memory")
+#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
+#endif
+
+#if __LINUX_ARM_ARCH__ >= 7
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
+#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
+ : : "r" (0) : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+ : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
+ : : "r" (0) : "memory")
+#elif defined(CONFIG_CPU_FA526)
+#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
+ : : "r" (0) : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+ : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#else
+#define isb() __asm__ __volatile__ ("" : : : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+ : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#endif
+
+#ifdef CONFIG_ARCH_HAS_BARRIERS
+#include <mach/barriers.h>
+#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
+#define mb() do { dsb(); outer_sync(); } while (0)
+#define rmb() dsb()
+#define wmb() mb()
+#else
+#include <asm/memory.h>
+#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#endif
+
+#ifndef CONFIG_SMP
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#else
+#define smp_mb() dmb()
+#define smp_rmb() dmb()
+#define smp_wmb() dmb()
+#endif
+
+#define read_barrier_depends() do { } while(0)
+#define smp_read_barrier_depends() do { } while(0)
+
+#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
+
+#endif /* __ASM_BARRIER_H */
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 2c56593..e691ec9 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -24,6 +24,7 @@
#endif

#include <linux/compiler.h>
+#include <linux/irqflags.h>

#define smp_mb__before_clear_bit() smp_mb()
#define smp_mb__after_clear_bit() smp_mb()
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index fac79dc..7af5c6c 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -1,6 +1,7 @@
#ifndef _ASMARM_BUG_H
#define _ASMARM_BUG_H

+#include <linux/linkage.h>

#ifdef CONFIG_BUG

@@ -57,4 +58,33 @@ do { \

#include <asm-generic/bug.h>

+struct pt_regs;
+void die(const char *msg, struct pt_regs *regs, int err);
+
+struct siginfo;
+void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
+ unsigned long err, unsigned long trap);
+
+#ifdef CONFIG_ARM_LPAE
+#define FAULT_CODE_ALIGNMENT 33
+#define FAULT_CODE_DEBUG 34
+#else
+#define FAULT_CODE_ALIGNMENT 1
+#define FAULT_CODE_DEBUG 2
+#endif
+
+void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
+ struct pt_regs *),
+ int sig, int code, const char *name);
+
+void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int,
+ struct pt_regs *),
+ int sig, int code, const char *name);
+
+extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
+
+struct mm_struct;
+extern void show_pte(struct mm_struct *mm, unsigned long addr);
+extern void __show_regs(struct pt_regs *);
+
#endif
diff --git a/arch/arm/include/asm/compiler.h b/arch/arm/include/asm/compiler.h
new file mode 100644
index 0000000..8155db2
--- /dev/null
+++ b/arch/arm/include/asm/compiler.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_ARM_COMPILER_H
+#define __ASM_ARM_COMPILER_H
+
+/*
+ * This is used to ensure the compiler did actually allocate the register we
+ * asked it for some inline assembly sequences. Apparently we can't trust
+ * the compiler from one version to another so a bit of paranoia won't hurt.
+ * This string is meant to be concatenated with the inline asm string and
+ * will cause compilation to stop on mismatch.
+ * (for details, see gcc PR 15089)
+ */
+#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
+
+
+#endif /* __ASM_ARM_COMPILER_H */
diff --git a/arch/arm/include/asm/cr_reg.h b/arch/arm/include/asm/cr_reg.h
new file mode 100644
index 0000000..df83b5b
--- /dev/null
+++ b/arch/arm/include/asm/cr_reg.h
@@ -0,0 +1,85 @@
+#ifndef __ASM_ARM_CR_REG_H
+#define __ASM_ARM_CR_REG_H
+
+/*
+ * CR1 bits (CP#15 CR1)
+ */
+#define CR_M (1 << 0) /* MMU enable */
+#define CR_A (1 << 1) /* Alignment abort enable */
+#define CR_C (1 << 2) /* Dcache enable */
+#define CR_W (1 << 3) /* Write buffer enable */
+#define CR_P (1 << 4) /* 32-bit exception handler */
+#define CR_D (1 << 5) /* 32-bit data address range */
+#define CR_L (1 << 6) /* Implementation defined */
+#define CR_B (1 << 7) /* Big endian */
+#define CR_S (1 << 8) /* System MMU protection */
+#define CR_R (1 << 9) /* ROM MMU protection */
+#define CR_F (1 << 10) /* Implementation defined */
+#define CR_Z (1 << 11) /* Implementation defined */
+#define CR_I (1 << 12) /* Icache enable */
+#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
+#define CR_RR (1 << 14) /* Round Robin cache replacement */
+#define CR_L4 (1 << 15) /* LDR pc can set T bit */
+#define CR_DT (1 << 16)
+#define CR_IT (1 << 18)
+#define CR_ST (1 << 19)
+#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
+#define CR_U (1 << 22) /* Unaligned access operation */
+#define CR_XP (1 << 23) /* Extended page tables */
+#define CR_VE (1 << 24) /* Vectored interrupts */
+#define CR_EE (1 << 25) /* Exception (Big) Endian */
+#define CR_TRE (1 << 28) /* TEX remap enable */
+#define CR_AFE (1 << 29) /* Access flag enable */
+#define CR_TE (1 << 30) /* Thumb exception enable */
+
+#ifndef __ASSEMBLY__
+
+extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
+extern unsigned long cr_alignment; /* defined in entry-armv.S */
+
+#if __LINUX_ARM_ARCH__ >= 4
+#define vectors_high() (cr_alignment & CR_V)
+#else
+#define vectors_high() (0)
+#endif
+
+static inline unsigned int get_cr(void)
+{
+ unsigned int val;
+ asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
+ return val;
+}
+
+static inline void set_cr(unsigned int val)
+{
+ asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
+ : : "r" (val) : "cc");
+ isb();
+}
+
+#ifndef CONFIG_SMP
+extern void adjust_cr(unsigned long mask, unsigned long set);
+#endif
+
+#define CPACC_FULL(n) (3 << (n * 2))
+#define CPACC_SVC(n) (1 << (n * 2))
+#define CPACC_DISABLE(n) (0 << (n * 2))
+
+static inline unsigned int get_copro_access(void)
+{
+ unsigned int val;
+ asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
+ : "=r" (val) : : "cc");
+ return val;
+}
+
+static inline void set_copro_access(unsigned int val)
+{
+ asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
+ : : "r" (val) : "cc");
+ isb();
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_ARM_CR_REG_H */
diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h
index 3427f44..fe92ccf 100644
--- a/arch/arm/include/asm/div64.h
+++ b/arch/arm/include/asm/div64.h
@@ -2,6 +2,7 @@
#define __ASM_ARM_DIV64

#include <linux/types.h>
+#include <asm/compiler.h>

/*
* The semantics of do_div() are:
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index b5dc173..489f160 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -10,6 +10,8 @@
#ifndef __ASM_PROC_DOMAIN_H
#define __ASM_PROC_DOMAIN_H

+#include <asm/barrier.h>
+
/*
* Domain numbers
*
diff --git a/arch/arm/include/asm/exec.h b/arch/arm/include/asm/exec.h
new file mode 100644
index 0000000..7c4fbef
--- /dev/null
+++ b/arch/arm/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_ARM_EXEC_H
+#define __ASM_ARM_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __ASM_ARM_EXEC_H */
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 1496565..b8e580a 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -34,4 +34,11 @@ typedef struct {

#endif

+/*
+ * switch_mm() may do a full cache flush over the context switch,
+ * so enable interrupts over the context switch to avoid high
+ * latency.
+ */
+#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
+
#endif
diff --git a/arch/arm/include/asm/switch_to.h b/arch/arm/include/asm/switch_to.h
new file mode 100644
index 0000000..d6573fa
--- /dev/null
+++ b/arch/arm/include/asm/switch_to.h
@@ -0,0 +1,16 @@
+#ifndef __ASM_ARM_SWITCH_TO_H
+#define __ASM_ARM_SWITCH_TO_H
+
+/*
+ * switch_to(prev, next) should switch from task `prev' to `next'
+ * `prev' will never be the same as `next'. schedule() itself
+ * contains the memory barrier to tell GCC not to cache `current'.
+ */
+extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
+
+#define switch_to(prev,next,last) \
+do { \
+ last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \
+} while (0)
+
+#endif /* __ASM_ARM_SWITCH_TO_H */
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
deleted file mode 100644
index e4c96cc..0000000
--- a/arch/arm/include/asm/system.h
+++ /dev/null
@@ -1,543 +0,0 @@
-#ifndef __ASM_ARM_SYSTEM_H
-#define __ASM_ARM_SYSTEM_H
-
-#ifdef __KERNEL__
-
-#define CPU_ARCH_UNKNOWN 0
-#define CPU_ARCH_ARMv3 1
-#define CPU_ARCH_ARMv4 2
-#define CPU_ARCH_ARMv4T 3
-#define CPU_ARCH_ARMv5 4
-#define CPU_ARCH_ARMv5T 5
-#define CPU_ARCH_ARMv5TE 6
-#define CPU_ARCH_ARMv5TEJ 7
-#define CPU_ARCH_ARMv6 8
-#define CPU_ARCH_ARMv7 9
-
-/*
- * CR1 bits (CP#15 CR1)
- */
-#define CR_M (1 << 0) /* MMU enable */
-#define CR_A (1 << 1) /* Alignment abort enable */
-#define CR_C (1 << 2) /* Dcache enable */
-#define CR_W (1 << 3) /* Write buffer enable */
-#define CR_P (1 << 4) /* 32-bit exception handler */
-#define CR_D (1 << 5) /* 32-bit data address range */
-#define CR_L (1 << 6) /* Implementation defined */
-#define CR_B (1 << 7) /* Big endian */
-#define CR_S (1 << 8) /* System MMU protection */
-#define CR_R (1 << 9) /* ROM MMU protection */
-#define CR_F (1 << 10) /* Implementation defined */
-#define CR_Z (1 << 11) /* Implementation defined */
-#define CR_I (1 << 12) /* Icache enable */
-#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
-#define CR_RR (1 << 14) /* Round Robin cache replacement */
-#define CR_L4 (1 << 15) /* LDR pc can set T bit */
-#define CR_DT (1 << 16)
-#define CR_IT (1 << 18)
-#define CR_ST (1 << 19)
-#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
-#define CR_U (1 << 22) /* Unaligned access operation */
-#define CR_XP (1 << 23) /* Extended page tables */
-#define CR_VE (1 << 24) /* Vectored interrupts */
-#define CR_EE (1 << 25) /* Exception (Big) Endian */
-#define CR_TRE (1 << 28) /* TEX remap enable */
-#define CR_AFE (1 << 29) /* Access flag enable */
-#define CR_TE (1 << 30) /* Thumb exception enable */
-
-/*
- * This is used to ensure the compiler did actually allocate the register we
- * asked it for some inline assembly sequences. Apparently we can't trust
- * the compiler from one version to another so a bit of paranoia won't hurt.
- * This string is meant to be concatenated with the inline asm string and
- * will cause compilation to stop on mismatch.
- * (for details, see gcc PR 15089)
- */
-#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
-
-#ifndef __ASSEMBLY__
-
-#include <linux/compiler.h>
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-
-#include <asm/outercache.h>
-
-struct thread_info;
-struct task_struct;
-
-/* information about the system we're running on */
-extern unsigned int system_rev;
-extern unsigned int system_serial_low;
-extern unsigned int system_serial_high;
-extern unsigned int mem_fclk_21285;
-
-struct pt_regs;
-
-void die(const char *msg, struct pt_regs *regs, int err);
-
-struct siginfo;
-void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
- unsigned long err, unsigned long trap);
-
-#ifdef CONFIG_ARM_LPAE
-#define FAULT_CODE_ALIGNMENT 33
-#define FAULT_CODE_DEBUG 34
-#else
-#define FAULT_CODE_ALIGNMENT 1
-#define FAULT_CODE_DEBUG 2
-#endif
-
-void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
- struct pt_regs *),
- int sig, int code, const char *name);
-
-void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int,
- struct pt_regs *),
- int sig, int code, const char *name);
-
-#define xchg(ptr,x) \
- ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
-
-struct mm_struct;
-extern void show_pte(struct mm_struct *mm, unsigned long addr);
-extern void __show_regs(struct pt_regs *);
-
-extern int __pure cpu_architecture(void);
-extern void cpu_init(void);
-
-void soft_restart(unsigned long);
-extern void (*arm_pm_restart)(char str, const char *cmd);
-
-#define UDBG_UNDEFINED (1 << 0)
-#define UDBG_SYSCALL (1 << 1)
-#define UDBG_BADABORT (1 << 2)
-#define UDBG_SEGV (1 << 3)
-#define UDBG_BUS (1 << 4)
-
-extern unsigned int user_debug;
-
-#if __LINUX_ARM_ARCH__ >= 4
-#define vectors_high() (cr_alignment & CR_V)
-#else
-#define vectors_high() (0)
-#endif
-
-#if __LINUX_ARM_ARCH__ >= 7 || \
- (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K))
-#define sev() __asm__ __volatile__ ("sev" : : : "memory")
-#define wfe() __asm__ __volatile__ ("wfe" : : : "memory")
-#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
-#endif
-
-#if __LINUX_ARM_ARCH__ >= 7
-#define isb() __asm__ __volatile__ ("isb" : : : "memory")
-#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
-#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
-#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
-#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
- : : "r" (0) : "memory")
-#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
- : : "r" (0) : "memory")
-#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
- : : "r" (0) : "memory")
-#elif defined(CONFIG_CPU_FA526)
-#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
- : : "r" (0) : "memory")
-#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
- : : "r" (0) : "memory")
-#define dmb() __asm__ __volatile__ ("" : : : "memory")
-#else
-#define isb() __asm__ __volatile__ ("" : : : "memory")
-#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
- : : "r" (0) : "memory")
-#define dmb() __asm__ __volatile__ ("" : : : "memory")
-#endif
-
-#ifdef CONFIG_ARCH_HAS_BARRIERS
-#include <mach/barriers.h>
-#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
-#define mb() do { dsb(); outer_sync(); } while (0)
-#define rmb() dsb()
-#define wmb() mb()
-#else
-#include <asm/memory.h>
-#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#endif
-
-#ifndef CONFIG_SMP
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#else
-#define smp_mb() dmb()
-#define smp_rmb() dmb()
-#define smp_wmb() dmb()
-#endif
-
-#define read_barrier_depends() do { } while(0)
-#define smp_read_barrier_depends() do { } while(0)
-
-#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
-#define nop() __asm__ __volatile__("mov\tr0,r0\[email protected] nop\n\t");
-
-extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
-extern unsigned long cr_alignment; /* defined in entry-armv.S */
-
-static inline unsigned int get_cr(void)
-{
- unsigned int val;
- asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
- return val;
-}
-
-static inline void set_cr(unsigned int val)
-{
- asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
- : : "r" (val) : "cc");
- isb();
-}
-
-#ifndef CONFIG_SMP
-extern void adjust_cr(unsigned long mask, unsigned long set);
-#endif
-
-#define CPACC_FULL(n) (3 << (n * 2))
-#define CPACC_SVC(n) (1 << (n * 2))
-#define CPACC_DISABLE(n) (0 << (n * 2))
-
-static inline unsigned int get_copro_access(void)
-{
- unsigned int val;
- asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
- : "=r" (val) : : "cc");
- return val;
-}
-
-static inline void set_copro_access(unsigned int val)
-{
- asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
- : : "r" (val) : "cc");
- isb();
-}
-
-/*
- * switch_mm() may do a full cache flush over the context switch,
- * so enable interrupts over the context switch to avoid high
- * latency.
- */
-#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
-
-/*
- * switch_to(prev, next) should switch from task `prev' to `next'
- * `prev' will never be the same as `next'. schedule() itself
- * contains the memory barrier to tell GCC not to cache `current'.
- */
-extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
-
-#define switch_to(prev,next,last) \
-do { \
- last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \
-} while (0)
-
-#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
-/*
- * On the StrongARM, "swp" is terminally broken since it bypasses the
- * cache totally. This means that the cache becomes inconsistent, and,
- * since we use normal loads/stores as well, this is really bad.
- * Typically, this causes oopsen in filp_close, but could have other,
- * more disastrous effects. There are two work-arounds:
- * 1. Disable interrupts and emulate the atomic swap
- * 2. Clean the cache, perform atomic swap, flush the cache
- *
- * We choose (1) since its the "easiest" to achieve here and is not
- * dependent on the processor type.
- *
- * NOTE that this solution won't work on an SMP system, so explcitly
- * forbid it here.
- */
-#define swp_is_buggy
-#endif
-
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
-{
- extern void __bad_xchg(volatile void *, int);
- unsigned long ret;
-#ifdef swp_is_buggy
- unsigned long flags;
-#endif
-#if __LINUX_ARM_ARCH__ >= 6
- unsigned int tmp;
-#endif
-
- smp_mb();
-
- switch (size) {
-#if __LINUX_ARM_ARCH__ >= 6
- case 1:
- asm volatile("@ __xchg1\n"
- "1: ldrexb %0, [%3]\n"
- " strexb %1, %2, [%3]\n"
- " teq %1, #0\n"
- " bne 1b"
- : "=&r" (ret), "=&r" (tmp)
- : "r" (x), "r" (ptr)
- : "memory", "cc");
- break;
- case 4:
- asm volatile("@ __xchg4\n"
- "1: ldrex %0, [%3]\n"
- " strex %1, %2, [%3]\n"
- " teq %1, #0\n"
- " bne 1b"
- : "=&r" (ret), "=&r" (tmp)
- : "r" (x), "r" (ptr)
- : "memory", "cc");
- break;
-#elif defined(swp_is_buggy)
-#ifdef CONFIG_SMP
-#error SMP is not supported on this platform
-#endif
- case 1:
- raw_local_irq_save(flags);
- ret = *(volatile unsigned char *)ptr;
- *(volatile unsigned char *)ptr = x;
- raw_local_irq_restore(flags);
- break;
-
- case 4:
- raw_local_irq_save(flags);
- ret = *(volatile unsigned long *)ptr;
- *(volatile unsigned long *)ptr = x;
- raw_local_irq_restore(flags);
- break;
-#else
- case 1:
- asm volatile("@ __xchg1\n"
- " swpb %0, %1, [%2]"
- : "=&r" (ret)
- : "r" (x), "r" (ptr)
- : "memory", "cc");
- break;
- case 4:
- asm volatile("@ __xchg4\n"
- " swp %0, %1, [%2]"
- : "=&r" (ret)
- : "r" (x), "r" (ptr)
- : "memory", "cc");
- break;
-#endif
- default:
- __bad_xchg(ptr, size), ret = 0;
- break;
- }
- smp_mb();
-
- return ret;
-}
-
-extern void disable_hlt(void);
-extern void enable_hlt(void);
-
-void cpu_idle_wait(void);
-
-#include <asm-generic/cmpxchg-local.h>
-
-#if __LINUX_ARM_ARCH__ < 6
-/* min ARCH < ARMv6 */
-
-#ifdef CONFIG_SMP
-#error "SMP is not supported on this platform"
-#endif
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#ifndef CONFIG_SMP
-#include <asm-generic/cmpxchg.h>
-#endif
-
-#else /* min ARCH >= ARMv6 */
-
-extern void __bad_cmpxchg(volatile void *ptr, int size);
-
-/*
- * cmpxchg only support 32-bits operands on ARMv6.
- */
-
-static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
- unsigned long new, int size)
-{
- unsigned long oldval, res;
-
- switch (size) {
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
- case 1:
- do {
- asm volatile("@ __cmpxchg1\n"
- " ldrexb %1, [%2]\n"
- " mov %0, #0\n"
- " teq %1, %3\n"
- " strexbeq %0, %4, [%2]\n"
- : "=&r" (res), "=&r" (oldval)
- : "r" (ptr), "Ir" (old), "r" (new)
- : "memory", "cc");
- } while (res);
- break;
- case 2:
- do {
- asm volatile("@ __cmpxchg1\n"
- " ldrexh %1, [%2]\n"
- " mov %0, #0\n"
- " teq %1, %3\n"
- " strexheq %0, %4, [%2]\n"
- : "=&r" (res), "=&r" (oldval)
- : "r" (ptr), "Ir" (old), "r" (new)
- : "memory", "cc");
- } while (res);
- break;
-#endif
- case 4:
- do {
- asm volatile("@ __cmpxchg4\n"
- " ldrex %1, [%2]\n"
- " mov %0, #0\n"
- " teq %1, %3\n"
- " strexeq %0, %4, [%2]\n"
- : "=&r" (res), "=&r" (oldval)
- : "r" (ptr), "Ir" (old), "r" (new)
- : "memory", "cc");
- } while (res);
- break;
- default:
- __bad_cmpxchg(ptr, size);
- oldval = 0;
- }
-
- return oldval;
-}
-
-static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
- unsigned long new, int size)
-{
- unsigned long ret;
-
- smp_mb();
- ret = __cmpxchg(ptr, old, new, size);
- smp_mb();
-
- return ret;
-}
-
-#define cmpxchg(ptr,o,n) \
- ((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
- (unsigned long)(o), \
- (unsigned long)(n), \
- sizeof(*(ptr))))
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- unsigned long ret;
-
- switch (size) {
-#ifdef CONFIG_CPU_V6 /* min ARCH == ARMv6 */
- case 1:
- case 2:
- ret = __cmpxchg_local_generic(ptr, old, new, size);
- break;
-#endif
- default:
- ret = __cmpxchg(ptr, old, new, size);
- }
-
- return ret;
-}
-
-#define cmpxchg_local(ptr,o,n) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
- (unsigned long)(o), \
- (unsigned long)(n), \
- sizeof(*(ptr))))
-
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
-
-/*
- * Note : ARMv7-M (currently unsupported by Linux) does not support
- * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
- * not be allowed to use __cmpxchg64.
- */
-static inline unsigned long long __cmpxchg64(volatile void *ptr,
- unsigned long long old,
- unsigned long long new)
-{
- register unsigned long long oldval asm("r0");
- register unsigned long long __old asm("r2") = old;
- register unsigned long long __new asm("r4") = new;
- unsigned long res;
-
- do {
- asm volatile(
- " @ __cmpxchg8\n"
- " ldrexd %1, %H1, [%2]\n"
- " mov %0, #0\n"
- " teq %1, %3\n"
- " teqeq %H1, %H3\n"
- " strexdeq %0, %4, %H4, [%2]\n"
- : "=&r" (res), "=&r" (oldval)
- : "r" (ptr), "Ir" (__old), "r" (__new)
- : "memory", "cc");
- } while (res);
-
- return oldval;
-}
-
-static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
- unsigned long long old,
- unsigned long long new)
-{
- unsigned long long ret;
-
- smp_mb();
- ret = __cmpxchg64(ptr, old, new);
- smp_mb();
-
- return ret;
-}
-
-#define cmpxchg64(ptr,o,n) \
- ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
- (unsigned long long)(o), \
- (unsigned long long)(n)))
-
-#define cmpxchg64_local(ptr,o,n) \
- ((__typeof__(*(ptr)))__cmpxchg64((ptr), \
- (unsigned long long)(o), \
- (unsigned long long)(n)))
-
-#else /* min ARCH = ARMv6 */
-
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#endif
-
-#endif /* __LINUX_ARM_ARCH__ >= 6 */
-
-#endif /* __ASSEMBLY__ */
-
-#define arch_align_stack(x) (x)
-
-#endif /* __KERNEL__ */
-
-#endif
diff --git a/arch/arm/include/asm/system_info.h b/arch/arm/include/asm/system_info.h
new file mode 100644
index 0000000..dfd386d
--- /dev/null
+++ b/arch/arm/include/asm/system_info.h
@@ -0,0 +1,27 @@
+#ifndef __ASM_ARM_SYSTEM_INFO_H
+#define __ASM_ARM_SYSTEM_INFO_H
+
+#define CPU_ARCH_UNKNOWN 0
+#define CPU_ARCH_ARMv3 1
+#define CPU_ARCH_ARMv4 2
+#define CPU_ARCH_ARMv4T 3
+#define CPU_ARCH_ARMv5 4
+#define CPU_ARCH_ARMv5T 5
+#define CPU_ARCH_ARMv5TE 6
+#define CPU_ARCH_ARMv5TEJ 7
+#define CPU_ARCH_ARMv6 8
+#define CPU_ARCH_ARMv7 9
+
+#ifndef __ASSEMBLY__
+
+/* information about the system we're running on */
+extern unsigned int system_rev;
+extern unsigned int system_serial_low;
+extern unsigned int system_serial_high;
+extern unsigned int mem_fclk_21285;
+
+extern int __pure cpu_architecture(void);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_ARM_SYSTEM_INFO_H */
diff --git a/arch/arm/include/asm/system_misc.h b/arch/arm/include/asm/system_misc.h
new file mode 100644
index 0000000..f5cf1e8
--- /dev/null
+++ b/arch/arm/include/asm/system_misc.h
@@ -0,0 +1,35 @@
+#ifndef __ASM_ARM_SYSTEM_MISC_H
+#define __ASM_ARM_SYSTEM_MISC_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/compiler.h>
+#include <linux/linkage.h>
+#include <linux/irqflags.h>
+
+#include <asm/outercache.h>
+
+extern int __pure cpu_architecture(void);
+extern void cpu_init(void);
+
+void soft_restart(unsigned long);
+extern void (*arm_pm_restart)(char str, const char *cmd);
+
+#define UDBG_UNDEFINED (1 << 0)
+#define UDBG_SYSCALL (1 << 1)
+#define UDBG_BADABORT (1 << 2)
+#define UDBG_SEGV (1 << 3)
+#define UDBG_BUS (1 << 4)
+
+extern unsigned int user_debug;
+
+#define nop() __asm__ __volatile__("mov\tr0,r0\[email protected] nop\n\t");
+
+extern void disable_hlt(void);
+extern void enable_hlt(void);
+
+void cpu_idle_wait(void);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_ARM_SYSTEM_MISC_H */
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 41820cf..71f6536 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -17,6 +17,7 @@
#include <asm/memory.h>
#include <asm/domain.h>
#include <asm/unified.h>
+#include <asm/compiler.h>

#define VERIFY_READ 0
#define VERIFY_WRITE 1
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index ddba41d..d0d1e83 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -3,6 +3,7 @@
#include <linux/personality.h>
#include <linux/binfmts.h>
#include <linux/elf.h>
+#include <asm/system_info.h>

int elf_check_arch(const struct elf32_hdr *x)
{
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 4559f32..db344db 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -21,6 +21,7 @@
#include <asm/memory.h>
#include <asm/thread_info.h>
#include <asm/pgtable.h>
+#include <asm/cr_reg.h>

#ifdef CONFIG_DEBUG_LL
#include <mach/debug-macro.S>
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d481833..e20ed9b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -52,6 +52,9 @@
#include <asm/traps.h>
#include <asm/unwind.h>
#include <asm/memblock.h>
+#include <asm/system_info.h>
+#include <asm/system_misc.h>
+#include <asm/cr_reg.h>

#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
#include "compat.h"
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 11da4dd..cd77743 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -33,6 +33,7 @@
#include <asm/traps.h>
#include <asm/unwind.h>
#include <asm/tls.h>
+#include <asm/system_misc.h>

#include "signal.h"

diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 193cadf..b524eb2 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -23,6 +23,8 @@
#include <linux/uaccess.h>

#include <asm/unaligned.h>
+#include <asm/cr_reg.h>
+#include <asm/system_info.h>

#include "fault.h"

diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 699522c..2da5df7 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -23,6 +23,8 @@
#include <asm/exception.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
+#include <asm/system_misc.h>
+#include <asm/system_info.h>

#include "fault.h"

diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index feacf4c..ab88ed4 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -5,6 +5,7 @@
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/sections.h>
+#include <asm/system_info.h>

pgd_t *idmap_pgd;

diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 80632e8..436ebee 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -32,6 +32,8 @@
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
#include <asm/sizes.h>
+#include <asm/system_info.h>
+#include <asm/cr_reg.h>

#include <asm/mach/map.h>
#include "mm.h"
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 94c5a0c..bd48a73 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -26,6 +26,8 @@
#include <asm/tlb.h>
#include <asm/highmem.h>
#include <asm/traps.h>
+#include <asm/cr_reg.h>
+#include <asm/system_info.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index a3e78cc..8121294 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -15,6 +15,7 @@
#include <asm/pgalloc.h>
#include <asm/page.h>
#include <asm/tlbflush.h>
+#include <asm/cr_reg.h>

#include "mm.h"

diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 8f3ccdd..f5cc605 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -21,6 +21,8 @@
#include <asm/cputype.h>
#include <asm/thread_notify.h>
#include <asm/vfp.h>
+#include <asm/cr_reg.h>
+#include <asm/system_info.h>

#include "vfpinstr.h"
#include "vfp.h"

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 06/29] Disintegrate asm/system.h for AVR32
March 07, 2012 09:00PM
Disintegrate asm/system.h for AVR32. This has not been compiled at all.

Signed-off-by: David Howells <[email protected]>
---

arch/avr32/include/asm/atomic.h | 101 ++++++++++++++++++
arch/avr32/include/asm/barrier.h | 27 +++++
arch/avr32/include/asm/bug.h | 5 +
arch/avr32/include/asm/exec.h | 13 ++
arch/avr32/include/asm/special_insns.h | 13 ++
arch/avr32/include/asm/switch_to.h | 46 ++++++++
arch/avr32/include/asm/system.h | 178 --------------------------------
7 files changed, 205 insertions(+), 178 deletions(-)
create mode 100644 arch/avr32/include/asm/barrier.h
create mode 100644 arch/avr32/include/asm/exec.h
create mode 100644 arch/avr32/include/asm/special_insns.h
create mode 100644 arch/avr32/include/asm/switch_to.h
delete mode 100644 arch/avr32/include/asm/system.h

diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
index 2fc18fe..91c6833 100644
--- a/arch/avr32/include/asm/atomic.h
+++ b/arch/avr32/include/asm/atomic.h
@@ -15,6 +15,7 @@
#define __ASM_AVR32_ATOMIC_H

#include <linux/types.h>
+#include <linux/irqflags.h>

#define ATOMIC_INIT(i) { (i) }

@@ -187,4 +188,104 @@ static inline int atomic_sub_if_positive(int i, atomic_t *v)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()

+#define xchg(ptr,x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
+{
+ u32 ret;
+
+ asm volatile("xchg %[ret], %[m], %[val]"
+ : [ret] "=&r"(ret), "=m"(*m)
+ : "m"(*m), [m] "r"(m), [val] "r"(val)
+ : "memory");
+ return ret;
+}
+
+static inline unsigned long __xchg(unsigned long x,
+ volatile void *ptr,
+ int size)
+{
+ switch(size) {
+ case 4:
+ return xchg_u32(x, ptr);
+ default:
+ __xchg_called_with_bad_pointer();
+ return x;
+ }
+}
+
+static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
+ unsigned long new)
+{
+ __u32 ret;
+
+ asm volatile(
+ "1: ssrf 5\n"
+ " ld.w %[ret], %[m]\n"
+ " cp.w %[ret], %[old]\n"
+ " brne 2f\n"
+ " stcond %[m], %[new]\n"
+ " brne 1b\n"
+ "2:\n"
+ : [ret] "=&r"(ret), [m] "=m"(*m)
+ : "m"(m), [old] "ir"(old), [new] "r"(new)
+ : "memory", "cc");
+ return ret;
+}
+
+extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
+ volatile int * m, unsigned long old, unsigned long new);
+#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
+
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+ case 8:
+ return __cmpxchg_u64(ptr, old, new);
+ }
+
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr, old, new) \
+ ((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \
+ (unsigned long)(new), \
+ sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+ unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+ default:
+ return __cmpxchg_local_generic(ptr, old, new, size);
+ }
+
+ return old;
+}
+
+#define cmpxchg_local(ptr, old, new) \
+ ((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old), \
+ (unsigned long)(new), \
+ sizeof(*(ptr))))
+
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
#endif /* __ASM_AVR32_ATOMIC_H */
diff --git a/arch/avr32/include/asm/barrier.h b/arch/avr32/include/asm/barrier.h
new file mode 100644
index 0000000..808001c
--- /dev/null
+++ b/arch/avr32/include/asm/barrier.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_BARRIER_H
+#define __ASM_AVR32_BARRIER_H
+
+#define mb() asm volatile("" : : : "memory")
+#define rmb() mb()
+#define wmb() asm volatile("sync 0" : : : "memory")
+#define read_barrier_depends() do { } while(0)
+#define set_mb(var, value) do { var = value; mb(); } while(0)
+
+#ifdef CONFIG_SMP
+# error "The AVR32 port does not support SMP"
+#else
+# define smp_mb() barrier()
+# define smp_rmb() barrier()
+# define smp_wmb() barrier()
+# define smp_read_barrier_depends() do { } while(0)
+#endif
+
+
+#endif /* __ASM_AVR32_BARRIER_H */
diff --git a/arch/avr32/include/asm/bug.h b/arch/avr32/include/asm/bug.h
index 2aa373cc..85a92d0 100644
--- a/arch/avr32/include/asm/bug.h
+++ b/arch/avr32/include/asm/bug.h
@@ -70,4 +70,9 @@

#include <asm-generic/bug.h>

+struct pt_regs;
+void die(const char *str, struct pt_regs *regs, long err);
+void _exception(long signr, struct pt_regs *regs, int code,
+ unsigned long addr);
+
#endif /* __ASM_AVR32_BUG_H */
diff --git a/arch/avr32/include/asm/exec.h b/arch/avr32/include/asm/exec.h
new file mode 100644
index 0000000..f467be8
--- /dev/null
+++ b/arch/avr32/include/asm/exec.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_EXEC_H
+#define __ASM_AVR32_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __ASM_AVR32_EXEC_H */
diff --git a/arch/avr32/include/asm/special_insns.h b/arch/avr32/include/asm/special_insns.h
new file mode 100644
index 0000000..f922218
--- /dev/null
+++ b/arch/avr32/include/asm/special_insns.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SPECIAL_INSNS_H
+#define __ASM_AVR32_SPECIAL_INSNS_H
+
+#define nop() asm volatile("nop")
+
+#endif /* __ASM_AVR32_SPECIAL_INSNS_H */
diff --git a/arch/avr32/include/asm/switch_to.h b/arch/avr32/include/asm/switch_to.h
new file mode 100644
index 0000000..9a8e9d5
--- /dev/null
+++ b/arch/avr32/include/asm/switch_to.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SWITCH_TO_H
+#define __ASM_AVR32_SWITCH_TO_H
+
+/*
+ * Help PathFinder and other Nexus-compliant debuggers keep track of
+ * the current PID by emitting an Ownership Trace Message each time we
+ * switch task.
+ */
+#ifdef CONFIG_OWNERSHIP_TRACE
+#include <asm/ocd.h>
+#define finish_arch_switch(prev) \
+ do { \
+ ocd_write(PID, prev->pid); \
+ ocd_write(PID, current->pid); \
+ } while(0)
+#endif
+
+/*
+ * switch_to(prev, next, last) should switch from task `prev' to task
+ * `next'. `prev' will never be the same as `next'.
+ *
+ * We just delegate everything to the __switch_to assembly function,
+ * which is implemented in arch/avr32/kernel/switch_to.S
+ *
+ * mb() tells GCC not to cache `current' across this call.
+ */
+struct cpu_context;
+struct task_struct;
+extern struct task_struct *__switch_to(struct task_struct *,
+ struct cpu_context *,
+ struct cpu_context *);
+#define switch_to(prev, next, last) \
+ do { \
+ last = __switch_to(prev, &prev->thread.cpu_context + 1, \
+ &next->thread.cpu_context); \
+ } while (0)
+
+
+#endif /* __ASM_AVR32_SWITCH_TO_H */
diff --git a/arch/avr32/include/asm/system.h b/arch/avr32/include/asm/system.h
deleted file mode 100644
index 62d9ded..0000000
--- a/arch/avr32/include/asm/system.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * Copyright (C) 2004-2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_SYSTEM_H
-#define __ASM_AVR32_SYSTEM_H
-
-#include <linux/compiler.h>
-#include <linux/linkage.h>
-#include <linux/types.h>
-
-#include <asm/ptrace.h>
-#include <asm/sysreg.h>
-
-#define xchg(ptr,x) \
- ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-#define nop() asm volatile("nop")
-
-#define mb() asm volatile("" : : : "memory")
-#define rmb() mb()
-#define wmb() asm volatile("sync 0" : : : "memory")
-#define read_barrier_depends() do { } while(0)
-#define set_mb(var, value) do { var = value; mb(); } while(0)
-
-/*
- * Help PathFinder and other Nexus-compliant debuggers keep track of
- * the current PID by emitting an Ownership Trace Message each time we
- * switch task.
- */
-#ifdef CONFIG_OWNERSHIP_TRACE
-#include <asm/ocd.h>
-#define finish_arch_switch(prev) \
- do { \
- ocd_write(PID, prev->pid); \
- ocd_write(PID, current->pid); \
- } while(0)
-#endif
-
-/*
- * switch_to(prev, next, last) should switch from task `prev' to task
- * `next'. `prev' will never be the same as `next'.
- *
- * We just delegate everything to the __switch_to assembly function,
- * which is implemented in arch/avr32/kernel/switch_to.S
- *
- * mb() tells GCC not to cache `current' across this call.
- */
-struct cpu_context;
-struct task_struct;
-extern struct task_struct *__switch_to(struct task_struct *,
- struct cpu_context *,
- struct cpu_context *);
-#define switch_to(prev, next, last) \
- do { \
- last = __switch_to(prev, &prev->thread.cpu_context + 1, \
- &next->thread.cpu_context); \
- } while (0)
-
-#ifdef CONFIG_SMP
-# error "The AVR32 port does not support SMP"
-#else
-# define smp_mb() barrier()
-# define smp_rmb() barrier()
-# define smp_wmb() barrier()
-# define smp_read_barrier_depends() do { } while(0)
-#endif
-
-#include <linux/irqflags.h>
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
-{
- u32 ret;
-
- asm volatile("xchg %[ret], %[m], %[val]"
- : [ret] "=&r"(ret), "=m"(*m)
- : "m"(*m), [m] "r"(m), [val] "r"(val)
- : "memory");
- return ret;
-}
-
-static inline unsigned long __xchg(unsigned long x,
- volatile void *ptr,
- int size)
-{
- switch(size) {
- case 4:
- return xchg_u32(x, ptr);
- default:
- __xchg_called_with_bad_pointer();
- return x;
- }
-}
-
-static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
- unsigned long new)
-{
- __u32 ret;
-
- asm volatile(
- "1: ssrf 5\n"
- " ld.w %[ret], %[m]\n"
- " cp.w %[ret], %[old]\n"
- " brne 2f\n"
- " stcond %[m], %[new]\n"
- " brne 1b\n"
- "2:\n"
- : [ret] "=&r"(ret), [m] "=m"(*m)
- : "m"(m), [old] "ir"(old), [new] "r"(new)
- : "memory", "cc");
- return ret;
-}
-
-extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
- volatile int * m, unsigned long old, unsigned long new);
-#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
- case 8:
- return __cmpxchg_u64(ptr, old, new);
- }
-
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr, old, new) \
- ((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \
- (unsigned long)(new), \
- sizeof(*(ptr))))
-
-#include <asm-generic/cmpxchg-local.h>
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-#define cmpxchg_local(ptr, old, new) \
- ((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old), \
- (unsigned long)(new), \
- sizeof(*(ptr))))
-
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-struct pt_regs;
-void die(const char *str, struct pt_regs *regs, long err);
-void _exception(long signr, struct pt_regs *regs, int code,
- unsigned long addr);
-
-#define arch_align_stack(x) (x)
-
-#endif /* __ASM_AVR32_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 09/29] Disintegrate asm/system.h for CRIS
March 07, 2012 09:01PM
Disintegrate asm/system.h for CRIS.

Signed-off-by: David Howells <[email protected]>
---

arch/cris/arch-v10/kernel/dma.c | 1
arch/cris/arch-v10/kernel/io_interface_mux.c | 1
arch/cris/arch-v10/kernel/process.c | 1
arch/cris/arch-v10/kernel/setup.c | 1
arch/cris/arch-v10/kernel/signal.c | 1
arch/cris/arch-v10/kernel/traps.c | 1
arch/cris/include/arch-v10/arch/elf.h | 2 +
arch/cris/include/arch-v32/arch/elf.h | 2 +
arch/cris/include/asm/atomic.h | 46 +++++++++++++
arch/cris/include/asm/barrier.h | 23 +++++++
arch/cris/include/asm/exec.h | 6 ++
arch/cris/include/asm/processor.h | 10 +++
arch/cris/include/asm/switch_to.h | 12 ++++
arch/cris/include/asm/system.h | 89 --------------------------
arch/cris/kernel/irq.c | 1
arch/cris/kernel/setup.c | 1
arch/cris/kernel/traps.c | 1
arch/cris/mm/fault.c | 1
drivers/tty/serial/crisv10.c | 1
19 files changed, 112 insertions(+), 89 deletions(-)
create mode 100644 arch/cris/include/asm/barrier.h
create mode 100644 arch/cris/include/asm/exec.h
create mode 100644 arch/cris/include/asm/switch_to.h
delete mode 100644 arch/cris/include/asm/system.h

diff --git a/arch/cris/arch-v10/kernel/dma.c b/arch/cris/arch-v10/kernel/dma.c
index d31504b..5795047 100644
--- a/arch/cris/arch-v10/kernel/dma.c
+++ b/arch/cris/arch-v10/kernel/dma.c
@@ -8,6 +8,7 @@

#include <asm/dma.h>
#include <arch/svinto.h>
+#include <arch/system.h>

/* Macro to access ETRAX 100 registers */
#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
diff --git a/arch/cris/arch-v10/kernel/io_interface_mux.c b/arch/cris/arch-v10/kernel/io_interface_mux.c
index 29f97e9..ad64cd1 100644
--- a/arch/cris/arch-v10/kernel/io_interface_mux.c
+++ b/arch/cris/arch-v10/kernel/io_interface_mux.c
@@ -14,6 +14,7 @@
#include <arch/svinto.h>
#include <asm/io.h>
#include <arch/io_interface_mux.h>
+#include <arch/system.h>


#define DBG(s)
diff --git a/arch/cris/arch-v10/kernel/process.c b/arch/cris/arch-v10/kernel/process.c
index 9a57db6..bee8df4 100644
--- a/arch/cris/arch-v10/kernel/process.c
+++ b/arch/cris/arch-v10/kernel/process.c
@@ -16,6 +16,7 @@
#include <linux/fs.h>
#include <arch/svinto.h>
#include <linux/init.h>
+#include <arch/system.h>

#ifdef CONFIG_ETRAX_GPIO
void etrax_gpio_wake_up_check(void); /* drivers/gpio.c */
diff --git a/arch/cris/arch-v10/kernel/setup.c b/arch/cris/arch-v10/kernel/setup.c
index de27b50..4f96d71 100644
--- a/arch/cris/arch-v10/kernel/setup.c
+++ b/arch/cris/arch-v10/kernel/setup.c
@@ -14,6 +14,7 @@
#include <linux/proc_fs.h>
#include <linux/delay.h>
#include <linux/param.h>
+#include <arch/system.h>

#ifdef CONFIG_PROC_FS
#define HAS_FPU 0x0001
diff --git a/arch/cris/arch-v10/kernel/signal.c b/arch/cris/arch-v10/kernel/signal.c
index e78fe49..289c584 100644
--- a/arch/cris/arch-v10/kernel/signal.c
+++ b/arch/cris/arch-v10/kernel/signal.c
@@ -27,6 +27,7 @@
#include <asm/processor.h>
#include <asm/ucontext.h>
#include <asm/uaccess.h>
+#include <arch/system.h>

#define DEBUG_SIG 0

diff --git a/arch/cris/arch-v10/kernel/traps.c b/arch/cris/arch-v10/kernel/traps.c
index 8bebb96..7001bed 100644
--- a/arch/cris/arch-v10/kernel/traps.c
+++ b/arch/cris/arch-v10/kernel/traps.c
@@ -11,6 +11,7 @@
#include <linux/ptrace.h>
#include <asm/uaccess.h>
#include <arch/sv_addr_ag.h>
+#include <arch/system.h>

void
show_registers(struct pt_regs *regs)
diff --git a/arch/cris/include/arch-v10/arch/elf.h b/arch/cris/include/arch-v10/arch/elf.h
index 1c38ee7..1eb638a 100644
--- a/arch/cris/include/arch-v10/arch/elf.h
+++ b/arch/cris/include/arch-v10/arch/elf.h
@@ -1,6 +1,8 @@
#ifndef __ASMCRIS_ARCH_ELF_H
#define __ASMCRIS_ARCH_ELF_H

+#include <arch/system.h>
+
#define ELF_MACH EF_CRIS_VARIANT_ANY_V0_V10

/*
diff --git a/arch/cris/include/arch-v32/arch/elf.h b/arch/cris/include/arch-v32/arch/elf.h
index 1324e50..c46d582 100644
--- a/arch/cris/include/arch-v32/arch/elf.h
+++ b/arch/cris/include/arch-v32/arch/elf.h
@@ -1,6 +1,8 @@
#ifndef _ASM_CRIS_ELF_H
#define _ASM_CRIS_ELF_H

+#include <arch/system.h>
+
#define ELF_CORE_EFLAGS EF_CRIS_VARIANT_V32

/*
diff --git a/arch/cris/include/asm/atomic.h b/arch/cris/include/asm/atomic.h
index 62760f8..44e1571 100644
--- a/arch/cris/include/asm/atomic.h
+++ b/arch/cris/include/asm/atomic.h
@@ -5,8 +5,54 @@

#include <linux/compiler.h>
#include <linux/types.h>
+#include <linux/irqflags.h>
#include <arch/atomic.h>

+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+{
+ /* since Etrax doesn't have any atomic xchg instructions, we need to disable
+ irq's (if enabled) and do it with move.d's */
+ unsigned long flags,temp;
+ local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
+ switch (size) {
+ case 1:
+ *((unsigned char *)&temp) = x;
+ x = *(unsigned char *)ptr;
+ *(unsigned char *)ptr = *((unsigned char *)&temp);
+ break;
+ case 2:
+ *((unsigned short *)&temp) = x;
+ x = *(unsigned short *)ptr;
+ *(unsigned short *)ptr = *((unsigned short *)&temp);
+ break;
+ case 4:
+ temp = x;
+ x = *(unsigned long *)ptr;
+ *(unsigned long *)ptr = temp;
+ break;
+ }
+ local_irq_restore(flags); /* restore irq enable bit */
+ return x;
+}
+
+#define xchg(ptr,x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#ifndef CONFIG_SMP
+#include <asm-generic/cmpxchg.h>
+#endif
+
/*
* Atomic operations that C can't guarantee us. Useful for
* resource counting etc..
diff --git a/arch/cris/include/asm/barrier.h b/arch/cris/include/asm/barrier.h
new file mode 100644
index 0000000..ce0f293
--- /dev/null
+++ b/arch/cris/include/asm/barrier.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_CRIS_BARRIER_H
+#define __ASM_CRIS_BARRIER_H
+
+#define barrier() __asm__ __volatile__("": : :"memory")
+#define mb() barrier()
+#define rmb() mb()
+#define wmb() mb()
+#define read_barrier_depends() do { } while(0)
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while(0)
+#endif
+
+#endif /* __ASM_CRIS_BARRIER_H */
diff --git a/arch/cris/include/asm/exec.h b/arch/cris/include/asm/exec.h
new file mode 100644
index 0000000..9665dab
--- /dev/null
+++ b/arch/cris/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_CRIS_EXEC_H
+#define __ASM_CRIS_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __ASM_CRIS_EXEC_H */
diff --git a/arch/cris/include/asm/processor.h b/arch/cris/include/asm/processor.h
index b43c9bb..4210d72 100644
--- a/arch/cris/include/asm/processor.h
+++ b/arch/cris/include/asm/processor.h
@@ -13,6 +13,7 @@
#include <asm/page.h>
#include <asm/ptrace.h>
#include <arch/processor.h>
+#include <arch/system.h>

struct task_struct;

@@ -71,4 +72,13 @@ static inline void release_thread(struct task_struct *dead_task)

#define cpu_relax() barrier()

+/*
+ * disable hlt during certain critical i/o operations
+ */
+#define HAVE_DISABLE_HLT
+void disable_hlt(void);
+void enable_hlt(void);
+
+void default_idle(void);
+
#endif /* __ASM_CRIS_PROCESSOR_H */
diff --git a/arch/cris/include/asm/switch_to.h b/arch/cris/include/asm/switch_to.h
new file mode 100644
index 0000000..d842e11
--- /dev/null
+++ b/arch/cris/include/asm/switch_to.h
@@ -0,0 +1,12 @@
+#ifndef __ASM_CRIS_SWITCH_TO_H
+#define __ASM_CRIS_SWITCH_TO_H
+
+/* the switch_to macro calls resume, an asm function in entry.S which does the actual
+ * task switching.
+ */
+
+extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
+#define switch_to(prev,next,last) last = resume(prev,next, \
+ (int)&((struct task_struct *)0)->thread)
+
+#endif /* __ASM_CRIS_SWITCH_TO_H */
diff --git a/arch/cris/include/asm/system.h b/arch/cris/include/asm/system.h
deleted file mode 100644
index ea10592..0000000
--- a/arch/cris/include/asm/system.h
+++ /dev/null
@@ -1,89 +0,0 @@
-#ifndef __ASM_CRIS_SYSTEM_H
-#define __ASM_CRIS_SYSTEM_H
-
-#include <linux/irqflags.h>
-#include <arch/system.h>
-
-/* the switch_to macro calls resume, an asm function in entry.S which does the actual
- * task switching.
- */
-
-extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
-#define switch_to(prev,next,last) last = resume(prev,next, \
- (int)&((struct task_struct *)0)->thread)
-
-#define barrier() __asm__ __volatile__("": : :"memory")
-#define mb() barrier()
-#define rmb() mb()
-#define wmb() mb()
-#define read_barrier_depends() do { } while(0)
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif
-
-#define iret()
-
-/*
- * disable hlt during certain critical i/o operations
- */
-#define HAVE_DISABLE_HLT
-void disable_hlt(void);
-void enable_hlt(void);
-
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-{
- /* since Etrax doesn't have any atomic xchg instructions, we need to disable
- irq's (if enabled) and do it with move.d's */
- unsigned long flags,temp;
- local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
- switch (size) {
- case 1:
- *((unsigned char *)&temp) = x;
- x = *(unsigned char *)ptr;
- *(unsigned char *)ptr = *((unsigned char *)&temp);
- break;
- case 2:
- *((unsigned short *)&temp) = x;
- x = *(unsigned short *)ptr;
- *(unsigned short *)ptr = *((unsigned short *)&temp);
- break;
- case 4:
- temp = x;
- x = *(unsigned long *)ptr;
- *(unsigned long *)ptr = temp;
- break;
- }
- local_irq_restore(flags); /* restore irq enable bit */
- return x;
-}
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#ifndef CONFIG_SMP
-#include <asm-generic/cmpxchg.h>
-#endif
-
-#define arch_align_stack(x) (x)
-
-void default_idle(void);
-
-#endif
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 788eb22..d36836d 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -36,6 +36,7 @@
#include <linux/spinlock.h>

#include <asm/io.h>
+#include <arch/system.h>

/* called by the assembler IRQ entry functions defined in irq.h
* to dispatch the interrupts to registered handlers
diff --git a/arch/cris/kernel/setup.c b/arch/cris/kernel/setup.c
index b712f49..32c3d24 100644
--- a/arch/cris/kernel/setup.c
+++ b/arch/cris/kernel/setup.c
@@ -20,6 +20,7 @@
#include <linux/pfn.h>
#include <linux/cpu.h>
#include <asm/setup.h>
+#include <arch/system.h>

/*
* Setup options
diff --git a/arch/cris/kernel/traps.c b/arch/cris/kernel/traps.c
index 8da53f3..a11ad32 100644
--- a/arch/cris/kernel/traps.c
+++ b/arch/cris/kernel/traps.c
@@ -17,6 +17,7 @@

#include <asm/pgtable.h>
#include <asm/uaccess.h>
+#include <arch/system.h>

extern void arch_enable_nmi(void);
extern void stop_watchdog(void);
diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
index 9dcac8e..b4760d8 100644
--- a/arch/cris/mm/fault.c
+++ b/arch/cris/mm/fault.c
@@ -9,6 +9,7 @@
#include <linux/module.h>
#include <linux/wait.h>
#include <asm/uaccess.h>
+#include <arch/system.h>

extern int find_fixup_code(struct pt_regs *);
extern void die_if_kernel(const char *, struct pt_regs *, long);
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c
index d52cb25..a900954 100644
--- a/drivers/tty/serial/crisv10.c
+++ b/drivers/tty/serial/crisv10.c
@@ -36,6 +36,7 @@ static char *serial_version = "$Revision: 1.25 $";
#include <asm/dma.h>

#include <arch/svinto.h>
+#include <arch/system.h>

/* non-arch dependent serial structures are in linux/serial.h */
#include <linux/serial.h>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 10/29] Disintegrate asm/system.h for FRV
March 07, 2012 09:01PM
Disintegrate asm/system.h for FRV.

Signed-off-by: David Howells <[email protected]>
---

arch/frv/include/asm/atomic.h | 98 +++++++++++++++++++++
arch/frv/include/asm/barrier.h | 27 ++++++
arch/frv/include/asm/bug.h | 2
arch/frv/include/asm/exec.h | 17 ++++
arch/frv/include/asm/special_insns.h | 17 ++++
arch/frv/include/asm/switch_to.h | 35 ++++++++
arch/frv/include/asm/system.h | 157 ----------------------------------
7 files changed, 196 insertions(+), 157 deletions(-)
create mode 100644 arch/frv/include/asm/barrier.h
create mode 100644 arch/frv/include/asm/exec.h
create mode 100644 arch/frv/include/asm/special_insns.h
create mode 100644 arch/frv/include/asm/switch_to.h
delete mode 100644 arch/frv/include/asm/system.h

diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h
index 9491575..90b47f4 100644
--- a/arch/frv/include/asm/atomic.h
+++ b/arch/frv/include/asm/atomic.h
@@ -235,6 +235,104 @@ extern uint32_t __xchg_32(uint32_t i, volatile void *v);

#define tas(ptr) (xchg((ptr), 1))

+/*****************************************************************************/
+/*
+ * compare and conditionally exchange value with memory
+ * - if (*ptr == test) then orig = *ptr; *ptr = test;
+ * - if (*ptr != test) then orig = *ptr;
+ */
+extern uint64_t __cmpxchg_64(uint64_t test, uint64_t new, volatile uint64_t *v);
+
+#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
+
+#define cmpxchg(ptr, test, new) \
+({ \
+ __typeof__(ptr) __xg_ptr = (ptr); \
+ __typeof__(*(ptr)) __xg_orig, __xg_tmp; \
+ __typeof__(*(ptr)) __xg_test = (test); \
+ __typeof__(*(ptr)) __xg_new = (new); \
+ \
+ switch (sizeof(__xg_orig)) { \
+ case 4: \
+ asm volatile( \
+ "0: \n" \
+ " orcc gr0,gr0,gr0,icc3 \n" \
+ " ckeq icc3,cc7 \n" \
+ " ld.p %M0,%1 \n" \
+ " orcr cc7,cc7,cc3 \n" \
+ " sub%I4cc %1,%4,%2,icc0 \n" \
+ " bne icc0,#0,1f \n" \
+ " cst.p %3,%M0 ,cc3,#1 \n" \
+ " corcc gr29,gr29,gr0 ,cc3,#1 \n" \
+ " beq icc3,#0,0b \n" \
+ "1: \n" \
+ : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
+ : "r"(__xg_new), "NPr"(__xg_test) \
+ : "memory", "cc7", "cc3", "icc3", "icc0" \
+ ); \
+ break; \
+ \
+ default: \
+ __xg_orig = (__typeof__(__xg_orig))0; \
+ asm volatile("break"); \
+ break; \
+ } \
+ \
+ __xg_orig; \
+})
+
+#else
+
+extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
+
+#define cmpxchg(ptr, test, new) \
+({ \
+ __typeof__(ptr) __xg_ptr = (ptr); \
+ __typeof__(*(ptr)) __xg_orig; \
+ __typeof__(*(ptr)) __xg_test = (test); \
+ __typeof__(*(ptr)) __xg_new = (new); \
+ \
+ switch (sizeof(__xg_orig)) { \
+ case 4: __xg_orig = (__force __typeof__(*ptr)) \
+ __cmpxchg_32((__force uint32_t *)__xg_ptr, \
+ (__force uint32_t)__xg_test, \
+ (__force uint32_t)__xg_new); break; \
+ default: \
+ __xg_orig = (__typeof__(__xg_orig))0; \
+ asm volatile("break"); \
+ break; \
+ } \
+ \
+ __xg_orig; \
+})
+
+#endif
+
+#include <asm-generic/cmpxchg-local.h>
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+ unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return cmpxchg((unsigned long *)ptr, old, new);
+ default:
+ return __cmpxchg_local_generic(ptr, old, new, size);
+ }
+
+ return old;
+}
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
#define atomic_cmpxchg(v, old, new) (cmpxchg(&(v)->counter, old, new))
#define atomic_xchg(v, new) (xchg(&(v)->counter, new))
#define atomic64_cmpxchg(v, old, new) (__cmpxchg_64(old, new, &(v)->counter))
diff --git a/arch/frv/include/asm/barrier.h b/arch/frv/include/asm/barrier.h
new file mode 100644
index 0000000..7f8c20e
--- /dev/null
+++ b/arch/frv/include/asm/barrier.h
@@ -0,0 +1,27 @@
+/* FR-V CPU memory barrier definitions
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_BARRIER_H
+#define _ASM_BARRIER_H
+
+#define mb() asm volatile ("membar" : : :"memory")
+#define rmb() asm volatile ("membar" : : :"memory")
+#define wmb() asm volatile ("membar" : : :"memory")
+#define read_barrier_depends() do { } while (0)
+
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do {} while(0)
+#define set_mb(var, value) \
+ do { var = (value); barrier(); } while (0)
+
+#endif /* _ASM_BARRIER_H */
diff --git a/arch/frv/include/asm/bug.h b/arch/frv/include/asm/bug.h
index 2e05450..dd01bcf 100644
--- a/arch/frv/include/asm/bug.h
+++ b/arch/frv/include/asm/bug.h
@@ -51,4 +51,6 @@ do { \

#include <asm-generic/bug.h>

+extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
+
#endif
diff --git a/arch/frv/include/asm/exec.h b/arch/frv/include/asm/exec.h
new file mode 100644
index 0000000..65c9130
--- /dev/null
+++ b/arch/frv/include/asm/exec.h
@@ -0,0 +1,17 @@
+/* FR-V CPU executable handling
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_EXEC_H
+#define _ASM_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _ASM_EXEC_H */
diff --git a/arch/frv/include/asm/special_insns.h b/arch/frv/include/asm/special_insns.h
new file mode 100644
index 0000000..20a198d
--- /dev/null
+++ b/arch/frv/include/asm/special_insns.h
@@ -0,0 +1,17 @@
+/* FR-V CPU special instructions
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SPECIAL_INSNS_H
+#define _ASM_SPECIAL_INSNS_H
+
+#define nop() asm volatile ("nop"::)
+
+#endif /* _ASM_SPECIAL_INSNS_H */
diff --git a/arch/frv/include/asm/switch_to.h b/arch/frv/include/asm/switch_to.h
new file mode 100644
index 0000000..49f8b09
--- /dev/null
+++ b/arch/frv/include/asm/switch_to.h
@@ -0,0 +1,35 @@
+/* FR-V CPU basic task switching
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SWITCH_TO_H
+#define _ASM_SWITCH_TO_H
+
+struct thread_struct;
+
+/*
+ * switch_to(prev, next) should switch from task `prev' to `next'
+ * `prev' will never be the same as `next'.
+ * The `mb' is to tell GCC not to cache `current' across this call.
+ */
+extern asmlinkage
+struct task_struct *__switch_to(struct thread_struct *prev_thread,
+ struct thread_struct *next_thread,
+ struct task_struct *prev);
+
+#define switch_to(prev, next, last) \
+do { \
+ (prev)->thread.sched_lr = \
+ (unsigned long) __builtin_return_address(0); \
+ (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
+ mb(); \
+} while(0)
+
+#endif /* _ASM_SWITCH_TO_H */
diff --git a/arch/frv/include/asm/system.h b/arch/frv/include/asm/system.h
deleted file mode 100644
index 769e66f..0000000
--- a/arch/frv/include/asm/system.h
+++ /dev/null
@@ -1,157 +0,0 @@
-/* system.h: FR-V CPU control definitions
- *
- * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells ([email protected])
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef _ASM_SYSTEM_H
-#define _ASM_SYSTEM_H
-
-#include <linux/types.h>
-#include <linux/linkage.h>
-#include <linux/kernel.h>
-
-struct thread_struct;
-
-/*
- * switch_to(prev, next) should switch from task `prev' to `next'
- * `prev' will never be the same as `next'.
- * The `mb' is to tell GCC not to cache `current' across this call.
- */
-extern asmlinkage
-struct task_struct *__switch_to(struct thread_struct *prev_thread,
- struct thread_struct *next_thread,
- struct task_struct *prev);
-
-#define switch_to(prev, next, last) \
-do { \
- (prev)->thread.sched_lr = \
- (unsigned long) __builtin_return_address(0); \
- (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
- mb(); \
-} while(0)
-
-/*
- * Force strict CPU ordering.
- */
-#define nop() asm volatile ("nop"::)
-#define mb() asm volatile ("membar" : : :"memory")
-#define rmb() asm volatile ("membar" : : :"memory")
-#define wmb() asm volatile ("membar" : : :"memory")
-#define read_barrier_depends() do { } while (0)
-
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do {} while(0)
-#define set_mb(var, value) \
- do { var = (value); barrier(); } while (0)
-
-extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
-
-#define arch_align_stack(x) (x)
-
-/*****************************************************************************/
-/*
- * compare and conditionally exchange value with memory
- * - if (*ptr == test) then orig = *ptr; *ptr = test;
- * - if (*ptr != test) then orig = *ptr;
- */
-extern uint64_t __cmpxchg_64(uint64_t test, uint64_t new, volatile uint64_t *v);
-
-#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
-
-#define cmpxchg(ptr, test, new) \
-({ \
- __typeof__(ptr) __xg_ptr = (ptr); \
- __typeof__(*(ptr)) __xg_orig, __xg_tmp; \
- __typeof__(*(ptr)) __xg_test = (test); \
- __typeof__(*(ptr)) __xg_new = (new); \
- \
- switch (sizeof(__xg_orig)) { \
- case 4: \
- asm volatile( \
- "0: \n" \
- " orcc gr0,gr0,gr0,icc3 \n" \
- " ckeq icc3,cc7 \n" \
- " ld.p %M0,%1 \n" \
- " orcr cc7,cc7,cc3 \n" \
- " sub%I4cc %1,%4,%2,icc0 \n" \
- " bne icc0,#0,1f \n" \
- " cst.p %3,%M0 ,cc3,#1 \n" \
- " corcc gr29,gr29,gr0 ,cc3,#1 \n" \
- " beq icc3,#0,0b \n" \
- "1: \n" \
- : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
- : "r"(__xg_new), "NPr"(__xg_test) \
- : "memory", "cc7", "cc3", "icc3", "icc0" \
- ); \
- break; \
- \
- default: \
- __xg_orig = (__typeof__(__xg_orig))0; \
- asm volatile("break"); \
- break; \
- } \
- \
- __xg_orig; \
-})
-
-#else
-
-extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
-
-#define cmpxchg(ptr, test, new) \
-({ \
- __typeof__(ptr) __xg_ptr = (ptr); \
- __typeof__(*(ptr)) __xg_orig; \
- __typeof__(*(ptr)) __xg_test = (test); \
- __typeof__(*(ptr)) __xg_new = (new); \
- \
- switch (sizeof(__xg_orig)) { \
- case 4: __xg_orig = (__force __typeof__(*ptr)) \
- __cmpxchg_32((__force uint32_t *)__xg_ptr, \
- (__force uint32_t)__xg_test, \
- (__force uint32_t)__xg_new); break; \
- default: \
- __xg_orig = (__typeof__(__xg_orig))0; \
- asm volatile("break"); \
- break; \
- } \
- \
- __xg_orig; \
-})
-
-#endif
-
-#include <asm-generic/cmpxchg-local.h>
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return cmpxchg((unsigned long *)ptr, old, new);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#endif /* _ASM_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 08/29] Disintegrate asm/system.h for C6X
March 07, 2012 09:02PM
Disintegrate asm/system.h for C6X. Not compiled. Appears to be missing
asm/atomic.h and asm/bug.h.

Signed-off-by: David Howells <[email protected]>
---

arch/c6x/include/asm/atomic.h | 68 ++++++++++++++
arch/c6x/include/asm/barrier.h | 25 +++++
arch/c6x/include/asm/bug.h | 19 ++++
arch/c6x/include/asm/processor.h | 9 ++
arch/c6x/include/asm/setup.h | 1
arch/c6x/include/asm/special_insns.h | 64 +++++++++++++
arch/c6x/include/asm/switch_to.h | 31 ++++++
arch/c6x/include/asm/system.h | 167 ----------------------------------
8 files changed, 217 insertions(+), 167 deletions(-)
create mode 100644 arch/c6x/include/asm/atomic.h
create mode 100644 arch/c6x/include/asm/barrier.h
create mode 100644 arch/c6x/include/asm/bug.h
create mode 100644 arch/c6x/include/asm/special_insns.h
create mode 100644 arch/c6x/include/asm/switch_to.h
delete mode 100644 arch/c6x/include/asm/system.h

diff --git a/arch/c6x/include/asm/atomic.h b/arch/c6x/include/asm/atomic.h
new file mode 100644
index 0000000..510d46f
--- /dev/null
+++ b/arch/c6x/include/asm/atomic.h
@@ -0,0 +1,68 @@
+/*
+ * Port on Texas Instruments TMS320C6x architecture
+ *
+ * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
+ * Author: Aurelien Jacquiot ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_C6X_ATOMIC_H
+#define _ASM_C6X_ATOMIC_H
+
+#include <linux/irqflags.h>
+
+/*
+ * Misc. functions
+ */
+static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size)
+{
+ unsigned int tmp;
+ unsigned long flags;
+
+ local_irq_save(flags);
+
+ switch (size) {
+ case 1:
+ tmp = 0;
+ tmp = *((unsigned char *) ptr);
+ *((unsigned char *) ptr) = (unsigned char) x;
+ break;
+ case 2:
+ tmp = 0;
+ tmp = *((unsigned short *) ptr);
+ *((unsigned short *) ptr) = x;
+ break;
+ case 4:
+ tmp = 0;
+ tmp = *((unsigned int *) ptr);
+ *((unsigned int *) ptr) = x;
+ break;
+ }
+ local_irq_restore(flags);
+ return tmp;
+}
+
+#define xchg(ptr, x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \
+ sizeof(*(ptr))))
+#define tas(ptr) xchg((ptr), 1)
+
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
+ (unsigned long)(o), \
+ (unsigned long)(n), \
+ sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#include <asm-generic/cmpxchg.h>
+
+#endif /* _ASM_C6X_ATOMIC_H */
diff --git a/arch/c6x/include/asm/barrier.h b/arch/c6x/include/asm/barrier.h
new file mode 100644
index 0000000..a845709
--- /dev/null
+++ b/arch/c6x/include/asm/barrier.h
@@ -0,0 +1,25 @@
+/*
+ * Port on Texas Instruments TMS320C6x architecture
+ *
+ * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
+ * Author: Aurelien Jacquiot ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_C6X_BARRIER_H
+#define _ASM_C6X_BARRIER_H
+
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while (0)
+
+#endif /* _ASM_C6X_BARRIER_H */
diff --git a/arch/c6x/include/asm/bug.h b/arch/c6x/include/asm/bug.h
new file mode 100644
index 0000000..db6c7d5
--- /dev/null
+++ b/arch/c6x/include/asm/bug.h
@@ -0,0 +1,19 @@
+/*
+ * Port on Texas Instruments TMS320C6x architecture
+ *
+ * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
+ * Author: Aurelien Jacquiot ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_C6X_BUG_H
+#define _ASM_C6X_BUG_H
+
+struct pt_regs;
+
+extern void die(char *str, struct pt_regs *fp, int nr);
+extern asmlinkage int process_exception(struct pt_regs *regs);
+
+#endif /* _ASM_C6X_BUG_H */
diff --git a/arch/c6x/include/asm/processor.h b/arch/c6x/include/asm/processor.h
index 8154c4e..c4f1c04 100644
--- a/arch/c6x/include/asm/processor.h
+++ b/arch/c6x/include/asm/processor.h
@@ -129,4 +129,13 @@ extern unsigned long get_wchan(struct task_struct *p);

extern const struct seq_operations cpuinfo_op;

+/* Reset the board */
+#define HARD_RESET_NOW()
+
+extern unsigned int c6x_core_freq;
+
+
+extern void (*c6x_restart)(void);
+extern void (*c6x_halt)(void);
+
#endif /* ASM_C6X_PROCESSOR_H */
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
index 1808f27..a01e318 100644
--- a/arch/c6x/include/asm/setup.h
+++ b/arch/c6x/include/asm/setup.h
@@ -27,6 +27,7 @@ extern unsigned int c6x_devstat;
extern unsigned char c6x_fuse_mac[6];

extern void machine_init(unsigned long dt_ptr);
+extern void time_init(void);

#endif /* !__ASSEMBLY__ */
#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/asm/special_insns.h b/arch/c6x/include/asm/special_insns.h
new file mode 100644
index 0000000..3be40df
--- /dev/null
+++ b/arch/c6x/include/asm/special_insns.h
@@ -0,0 +1,64 @@
+/*
+ * Port on Texas Instruments TMS320C6x architecture
+ *
+ * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
+ * Author: Aurelien Jacquiot ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_C6X_SPECIAL_INSNS_H
+#define _ASM_C6X_SPECIAL_INSNS_H
+
+
+#define get_creg(reg) \
+ ({ unsigned int __x; \
+ asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
+
+#define set_creg(reg, v) \
+ do { unsigned int __x = (unsigned int)(v); \
+ asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
+ } while (0)
+
+#define or_creg(reg, n) \
+ do { unsigned __x, __n = (unsigned)(n); \
+ asm volatile ("mvc .s2 " #reg ",%0\n" \
+ "or .l2 %1,%0,%0\n" \
+ "mvc .s2 %0," #reg "\n" \
+ "nop\n" \
+ : "=&b"(__x) : "b"(__n)); \
+ } while (0)
+
+#define and_creg(reg, n) \
+ do { unsigned __x, __n = (unsigned)(n); \
+ asm volatile ("mvc .s2 " #reg ",%0\n" \
+ "and .l2 %1,%0,%0\n" \
+ "mvc .s2 %0," #reg "\n" \
+ "nop\n" \
+ : "=&b"(__x) : "b"(__n)); \
+ } while (0)
+
+#define get_coreid() (get_creg(DNUM) & 0xff)
+
+/* Set/get IST */
+#define set_ist(x) set_creg(ISTP, x)
+#define get_ist() get_creg(ISTP)
+
+/*
+ * Exception management
+ */
+asmlinkage void enable_exception(void);
+#define disable_exception()
+#define get_except_type() get_creg(EFR)
+#define ack_exception(type) set_creg(ECR, 1 << (type))
+#define get_iexcept() get_creg(IERR)
+#define set_iexcept(mask) set_creg(IERR, (mask))
+
+#define _extu(x, s, e) \
+ ({ unsigned int __x; \
+ asm volatile ("extu .S2 %3,%1,%2,%0\n" : \
+ "=b"(__x) : "n"(s), "n"(e), "b"(x)); \
+ __x; })
+
+#endif /* _ASM_C6X_SPECIAL_INSNS_H */
diff --git a/arch/c6x/include/asm/switch_to.h b/arch/c6x/include/asm/switch_to.h
new file mode 100644
index 0000000..83bb5a4
--- /dev/null
+++ b/arch/c6x/include/asm/switch_to.h
@@ -0,0 +1,31 @@
+/*
+ * Port on Texas Instruments TMS320C6x architecture
+ *
+ * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
+ * Author: Aurelien Jacquiot ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_C6X_SWITCH_TO_H
+#define _ASM_C6X_SWITCH_TO_H
+
+#define prepare_to_switch() do { } while (0)
+
+struct task_struct;
+struct thread_struct;
+asmlinkage void *__switch_to(struct thread_struct *prev,
+ struct thread_struct *next,
+ struct task_struct *tsk);
+
+#define switch_to(prev, next, last) \
+ do { \
+ current->thread.wchan = (u_long) __builtin_return_address(0); \
+ (last) = __switch_to(&(prev)->thread, \
+ &(next)->thread, (prev)); \
+ mb(); \
+ current->thread.wchan = 0; \
+ } while (0)
+
+#endif /* _ASM_C6X_SWITCH_TO_H */
diff --git a/arch/c6x/include/asm/system.h b/arch/c6x/include/asm/system.h
deleted file mode 100644
index 7b1cfa9..0000000
--- a/arch/c6x/include/asm/system.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * Port on Texas Instruments TMS320C6x architecture
- *
- * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
- * Author: Aurelien Jacquiot ([email protected])
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef _ASM_C6X_SYSTEM_H
-#define _ASM_C6X_SYSTEM_H
-
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-
-#define prepare_to_switch() do { } while (0)
-
-struct task_struct;
-struct thread_struct;
-asmlinkage void *__switch_to(struct thread_struct *prev,
- struct thread_struct *next,
- struct task_struct *tsk);
-
-#define switch_to(prev, next, last) \
- do { \
- current->thread.wchan = (u_long) __builtin_return_address(0); \
- (last) = __switch_to(&(prev)->thread, \
- &(next)->thread, (prev)); \
- mb(); \
- current->thread.wchan = 0; \
- } while (0)
-
-/* Reset the board */
-#define HARD_RESET_NOW()
-
-#define get_creg(reg) \
- ({ unsigned int __x; \
- asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
-
-#define set_creg(reg, v) \
- do { unsigned int __x = (unsigned int)(v); \
- asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
- } while (0)
-
-#define or_creg(reg, n) \
- do { unsigned __x, __n = (unsigned)(n); \
- asm volatile ("mvc .s2 " #reg ",%0\n" \
- "or .l2 %1,%0,%0\n" \
- "mvc .s2 %0," #reg "\n" \
- "nop\n" \
- : "=&b"(__x) : "b"(__n)); \
- } while (0)
-
-#define and_creg(reg, n) \
- do { unsigned __x, __n = (unsigned)(n); \
- asm volatile ("mvc .s2 " #reg ",%0\n" \
- "and .l2 %1,%0,%0\n" \
- "mvc .s2 %0," #reg "\n" \
- "nop\n" \
- : "=&b"(__x) : "b"(__n)); \
- } while (0)
-
-#define get_coreid() (get_creg(DNUM) & 0xff)
-
-/* Set/get IST */
-#define set_ist(x) set_creg(ISTP, x)
-#define get_ist() get_creg(ISTP)
-
-/*
- * Exception management
- */
-asmlinkage void enable_exception(void);
-#define disable_exception()
-#define get_except_type() get_creg(EFR)
-#define ack_exception(type) set_creg(ECR, 1 << (type))
-#define get_iexcept() get_creg(IERR)
-#define set_iexcept(mask) set_creg(IERR, (mask))
-
-/*
- * Misc. functions
- */
-#define nop() asm("NOP\n");
-#define mb() barrier()
-#define rmb() barrier()
-#define wmb() barrier()
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-#define set_wmb(var, value) do { var = value; wmb(); } while (0)
-
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while (0)
-
-#define xchg(ptr, x) \
- ((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \
- sizeof(*(ptr))))
-#define tas(ptr) xchg((ptr), 1)
-
-unsigned int _lmbd(unsigned int, unsigned int);
-unsigned int _bitr(unsigned int);
-
-struct __xchg_dummy { unsigned int a[100]; };
-#define __xg(x) ((volatile struct __xchg_dummy *)(x))
-
-static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size)
-{
- unsigned int tmp;
- unsigned long flags;
-
- local_irq_save(flags);
-
- switch (size) {
- case 1:
- tmp = 0;
- tmp = *((unsigned char *) ptr);
- *((unsigned char *) ptr) = (unsigned char) x;
- break;
- case 2:
- tmp = 0;
- tmp = *((unsigned short *) ptr);
- *((unsigned short *) ptr) = x;
- break;
- case 4:
- tmp = 0;
- tmp = *((unsigned int *) ptr);
- *((unsigned int *) ptr) = x;
- break;
- }
- local_irq_restore(flags);
- return tmp;
-}
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
- (unsigned long)(o), \
- (unsigned long)(n), \
- sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#include <asm-generic/cmpxchg.h>
-
-#define _extu(x, s, e) \
- ({ unsigned int __x; \
- asm volatile ("extu .S2 %3,%1,%2,%0\n" : \
- "=b"(__x) : "n"(s), "n"(e), "b"(x)); \
- __x; })
-
-
-extern unsigned int c6x_core_freq;
-
-struct pt_regs;
-
-extern void die(char *str, struct pt_regs *fp, int nr);
-extern asmlinkage int process_exception(struct pt_regs *regs);
-extern void time_init(void);
-
-extern void (*c6x_restart)(void);
-extern void (*c6x_halt)(void);
-
-#endif /* _ASM_C6X_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 11/29] Disintegrate asm/system.h for H8300
March 07, 2012 09:02PM
Disintegrate asm/system.h for H8300.

Signed-off-by: David Howells <[email protected]>
---

arch/h8300/include/asm/atomic.h | 53 ++++++++++++++
arch/h8300/include/asm/barrier.h | 26 +++++++
arch/h8300/include/asm/bug.h | 4 +
arch/h8300/include/asm/exec.h | 6 ++
arch/h8300/include/asm/processor.h | 5 +
arch/h8300/include/asm/switch_to.h | 50 +++++++++++++
arch/h8300/include/asm/system.h | 140 ------------------------------------
7 files changed, 144 insertions(+), 140 deletions(-)
create mode 100644 arch/h8300/include/asm/barrier.h
create mode 100644 arch/h8300/include/asm/exec.h
create mode 100644 arch/h8300/include/asm/switch_to.h
delete mode 100644 arch/h8300/include/asm/system.h

diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index fbc8517..62b02f1 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -2,6 +2,7 @@
#define __ARCH_H8300_ATOMIC__

#include <linux/types.h>
+#include <linux/irqflags.h>

/*
* Atomic operations that C can't guarantee us. Useful for
@@ -101,6 +102,58 @@ static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
return ret;
}

+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+struct __xchg_dummy { unsigned long a[100]; };
+#define __xg(x) ((volatile struct __xchg_dummy *)(x))
+
+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+{
+ unsigned long tmp, flags;
+
+ local_irq_save(flags);
+
+ switch (size) {
+ case 1:
+ __asm__ __volatile__
+ ("mov.b %2,%0\n\t"
+ "mov.b %1,%2"
+ : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ case 2:
+ __asm__ __volatile__
+ ("mov.w %2,%0\n\t"
+ "mov.w %1,%2"
+ : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ case 4:
+ __asm__ __volatile__
+ ("mov.l %2,%0\n\t"
+ "mov.l %1,%2"
+ : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ default:
+ tmp = 0;
+ }
+ local_irq_restore(flags);
+ return tmp;
+}
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#ifndef CONFIG_SMP
+#include <asm-generic/cmpxchg.h>
+#endif
+
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

static inline int __atomic_add_unless(atomic_t *v, int a, int u)
diff --git a/arch/h8300/include/asm/barrier.h b/arch/h8300/include/asm/barrier.h
new file mode 100644
index 0000000..96d7a49
--- /dev/null
+++ b/arch/h8300/include/asm/barrier.h
@@ -0,0 +1,26 @@
+#ifndef _H8300_BARRIER_H
+#define _H8300_BARRIER_H
+
+/*
+ * Force strict CPU ordering.
+ * Not really required on H8...
+ */
+#define nop() asm volatile ("nop"::)
+#define mb() asm volatile ("" : : :"memory")
+#define rmb() asm volatile ("" : : :"memory")
+#define wmb() asm volatile ("" : : :"memory")
+#define set_mb(var, value) do { xchg(&var, value); } while (0)
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while(0)
+#endif
+
+#endif /* _H8300_BARRIER_H */
diff --git a/arch/h8300/include/asm/bug.h b/arch/h8300/include/asm/bug.h
index 887c197..1e1be81 100644
--- a/arch/h8300/include/asm/bug.h
+++ b/arch/h8300/include/asm/bug.h
@@ -5,4 +5,8 @@
#define is_valid_bugaddr(addr) (1)

#include <asm-generic/bug.h>
+
+struct pt_regs;
+extern void die(const char *str, struct pt_regs *fp, unsigned long err);
+
#endif
diff --git a/arch/h8300/include/asm/exec.h b/arch/h8300/include/asm/exec.h
new file mode 100644
index 0000000..c01c45c
--- /dev/null
+++ b/arch/h8300/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef _H8300_EXEC_H
+#define _H8300_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _H8300_EXEC_H */
diff --git a/arch/h8300/include/asm/processor.h b/arch/h8300/include/asm/processor.h
index e834b60..61fabf1 100644
--- a/arch/h8300/include/asm/processor.h
+++ b/arch/h8300/include/asm/processor.h
@@ -135,4 +135,9 @@ unsigned long get_wchan(struct task_struct *p);

#define cpu_relax() barrier()

+#define HARD_RESET_NOW() ({ \
+ local_irq_disable(); \
+ asm("jmp @@0"); \
+})
+
#endif
diff --git a/arch/h8300/include/asm/switch_to.h b/arch/h8300/include/asm/switch_to.h
new file mode 100644
index 0000000..cdd8731
--- /dev/null
+++ b/arch/h8300/include/asm/switch_to.h
@@ -0,0 +1,50 @@
+#ifndef _H8300_SWITCH_TO_H
+#define _H8300_SWITCH_TO_H
+
+/*
+ * switch_to(n) should switch tasks to task ptr, first checking that
+ * ptr isn't the current task, in which case it does nothing. This
+ * also clears the TS-flag if the task we switched to has used the
+ * math co-processor latest.
+ */
+/*
+ * switch_to() saves the extra registers, that are not saved
+ * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
+ * a0-a1. Some of these are used by schedule() and its predecessors
+ * and so we might get see unexpected behaviors when a task returns
+ * with unexpected register values.
+ *
+ * syscall stores these registers itself and none of them are used
+ * by syscall after the function in the syscall has been called.
+ *
+ * Beware that resume now expects *next to be in d1 and the offset of
+ * tss to be in a1. This saves a few instructions as we no longer have
+ * to push them onto the stack and read them back right after.
+ *
+ * 02/17/96 - Jes Sorensen ([email protected])
+ *
+ * Changed 96/09/19 by Andreas Schwab
+ * pass prev in a0, next in a1, offset of tss in d1, and whether
+ * the mm structures are shared in d2 (to avoid atc flushing).
+ *
+ * H8/300 Porting 2002/09/04 Yoshinori Sato
+ */
+
+asmlinkage void resume(void);
+#define switch_to(prev,next,last) { \
+ void *_last; \
+ __asm__ __volatile__( \
+ "mov.l %1, er0\n\t" \
+ "mov.l %2, er1\n\t" \
+ "mov.l %3, er2\n\t" \
+ "jsr @_resume\n\t" \
+ "mov.l er2,%0\n\t" \
+ : "=r" (_last) \
+ : "r" (&(prev->thread)), \
+ "r" (&(next->thread)), \
+ "g" (prev) \
+ : "cc", "er0", "er1", "er2", "er3"); \
+ (last) = _last; \
+}
+
+#endif /* _H8300_SWITCH_TO_H */
diff --git a/arch/h8300/include/asm/system.h b/arch/h8300/include/asm/system.h
deleted file mode 100644
index 2c2382e..0000000
--- a/arch/h8300/include/asm/system.h
+++ /dev/null
@@ -1,140 +0,0 @@
-#ifndef _H8300_SYSTEM_H
-#define _H8300_SYSTEM_H
-
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-
-struct pt_regs;
-
-/*
- * switch_to(n) should switch tasks to task ptr, first checking that
- * ptr isn't the current task, in which case it does nothing. This
- * also clears the TS-flag if the task we switched to has used the
- * math co-processor latest.
- */
-/*
- * switch_to() saves the extra registers, that are not saved
- * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
- * a0-a1. Some of these are used by schedule() and its predecessors
- * and so we might get see unexpected behaviors when a task returns
- * with unexpected register values.
- *
- * syscall stores these registers itself and none of them are used
- * by syscall after the function in the syscall has been called.
- *
- * Beware that resume now expects *next to be in d1 and the offset of
- * tss to be in a1. This saves a few instructions as we no longer have
- * to push them onto the stack and read them back right after.
- *
- * 02/17/96 - Jes Sorensen ([email protected])
- *
- * Changed 96/09/19 by Andreas Schwab
- * pass prev in a0, next in a1, offset of tss in d1, and whether
- * the mm structures are shared in d2 (to avoid atc flushing).
- *
- * H8/300 Porting 2002/09/04 Yoshinori Sato
- */
-
-asmlinkage void resume(void);
-#define switch_to(prev,next,last) { \
- void *_last; \
- __asm__ __volatile__( \
- "mov.l %1, er0\n\t" \
- "mov.l %2, er1\n\t" \
- "mov.l %3, er2\n\t" \
- "jsr @_resume\n\t" \
- "mov.l er2,%0\n\t" \
- : "=r" (_last) \
- : "r" (&(prev->thread)), \
- "r" (&(next->thread)), \
- "g" (prev) \
- : "cc", "er0", "er1", "er2", "er3"); \
- (last) = _last; \
-}
-
-#define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
-
-/*
- * Force strict CPU ordering.
- * Not really required on H8...
- */
-#define nop() asm volatile ("nop"::)
-#define mb() asm volatile ("" : : :"memory")
-#define rmb() asm volatile ("" : : :"memory")
-#define wmb() asm volatile ("" : : :"memory")
-#define set_mb(var, value) do { xchg(&var, value); } while (0)
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-struct __xchg_dummy { unsigned long a[100]; };
-#define __xg(x) ((volatile struct __xchg_dummy *)(x))
-
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-{
- unsigned long tmp, flags;
-
- local_irq_save(flags);
-
- switch (size) {
- case 1:
- __asm__ __volatile__
- ("mov.b %2,%0\n\t"
- "mov.b %1,%2"
- : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
- break;
- case 2:
- __asm__ __volatile__
- ("mov.w %2,%0\n\t"
- "mov.w %1,%2"
- : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
- break;
- case 4:
- __asm__ __volatile__
- ("mov.l %2,%0\n\t"
- "mov.l %1,%2"
- : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
- break;
- default:
- tmp = 0;
- }
- local_irq_restore(flags);
- return tmp;
-}
-
-#define HARD_RESET_NOW() ({ \
- local_irq_disable(); \
- asm("jmp @@0"); \
-})
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#ifndef CONFIG_SMP
-#include <asm-generic/cmpxchg.h>
-#endif
-
-#define arch_align_stack(x) (x)
-
-extern void die(const char *str, struct pt_regs *fp, unsigned long err);
-
-#endif /* _H8300_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 12/29] Disintegrate asm/system.h for Hexagon
March 07, 2012 09:02PM
Disintegrate asm/system.h for Hexagon. Not compiled.

Signed-off-by: David Howells <[email protected]>
---

arch/hexagon/include/asm/atomic.h | 79 +++++++++++++++++++--
arch/hexagon/include/asm/barrier.h | 41 +++++++++++
arch/hexagon/include/asm/exec.h | 28 ++++++++
arch/hexagon/include/asm/switch_to.h | 34 +++++++++
arch/hexagon/include/asm/system.h | 126 ----------------------------------
5 files changed, 175 insertions(+), 133 deletions(-)
create mode 100644 arch/hexagon/include/asm/barrier.h
create mode 100644 arch/hexagon/include/asm/exec.h
create mode 100644 arch/hexagon/include/asm/switch_to.h
delete mode 100644 arch/hexagon/include/asm/system.h

diff --git a/arch/hexagon/include/asm/atomic.h b/arch/hexagon/include/asm/atomic.h
index e220f90..d4b9c26 100644
--- a/arch/hexagon/include/asm/atomic.h
+++ b/arch/hexagon/include/asm/atomic.h
@@ -35,13 +35,6 @@
*/
#define atomic_read(v) ((v)->counter)

-/**
- * atomic_xchg - atomic
- * @v: pointer to memory to change
- * @new: new value (technically passed in a register -- see xchg)
- */
-#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
-

/**
* atomic_cmpxchg - atomic compare-and-exchange values
@@ -161,4 +154,76 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
#define atomic_inc_return(v) (atomic_add_return(1, v))
#define atomic_dec_return(v) (atomic_sub_return(1, v))

+/*
+ * __xchg - atomically exchange a register and a memory location
+ * @x: value to swap
+ * @ptr: pointer to memory
+ * @size: size of the value
+ *
+ * Only 4 bytes supported currently.
+ *
+ * Note: there was an errata for V2 about .new's and memw_locked.
+ *
+ */
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
+ int size)
+{
+ unsigned long retval;
+
+ /* Can't seem to use printk or panic here, so just stop */
+ if (size != 4) do { asm volatile("brkpt;\n"); } while (1);
+
+ __asm__ __volatile__ (
+ "1: %0 = memw_locked(%1);\n" /* load into retval */
+ " memw_locked(%1,P0) = %2;\n" /* store into memory */
+ " if !P0 jump 1b;\n"
+ : "=&r" (retval)
+ : "r" (ptr), "r" (x)
+ : "memory", "p0"
+ );
+ return retval;
+}
+
+/*
+ * Atomically swap the contents of a register with memory. Should be atomic
+ * between multiple CPU's and within interrupts on the same CPU.
+ */
+#define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), \
+ sizeof(*(ptr))))
+
+/**
+ * atomic_xchg - atomic
+ * @v: pointer to memory to change
+ * @new: new value (technically passed in a register -- see xchg)
+ */
+#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
+
+/*
+ * see rt-mutex-design.txt; cmpxchg supposedly checks if *ptr == A and swaps.
+ * looks just like atomic_cmpxchg on our arch currently with a bunch of
+ * variable casting.
+ */
+#define __HAVE_ARCH_CMPXCHG 1
+
+#define cmpxchg(ptr, old, new) \
+({ \
+ __typeof__(ptr) __ptr = (ptr); \
+ __typeof__(*(ptr)) __old = (old); \
+ __typeof__(*(ptr)) __new = (new); \
+ __typeof__(*(ptr)) __oldval = 0; \
+ \
+ asm volatile( \
+ "1: %0 = memw_locked(%1);\n" \
+ " { P0 = cmp.eq(%0,%2);\n" \
+ " if (!P0.new) jump:nt 2f; }\n" \
+ " memw_locked(%1,p0) = %3;\n" \
+ " if (!P0) jump 1b;\n" \
+ "2:\n" \
+ : "=&r" (__oldval) \
+ : "r" (__ptr), "r" (__old), "r" (__new) \
+ : "memory", "p0" \
+ ); \
+ __oldval; \
+})
+
#endif
diff --git a/arch/hexagon/include/asm/barrier.h b/arch/hexagon/include/asm/barrier.h
new file mode 100644
index 0000000..a4ed6e2
--- /dev/null
+++ b/arch/hexagon/include/asm/barrier.h
@@ -0,0 +1,41 @@
+/*
+ * Memory barrier definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_BARRIER_H
+#define _ASM_BARRIER_H
+
+#define rmb() barrier()
+#define read_barrier_depends() barrier()
+#define wmb() barrier()
+#define mb() barrier()
+#define smp_rmb() barrier()
+#define smp_read_barrier_depends() barrier()
+#define smp_wmb() barrier()
+#define smp_mb() barrier()
+#define smp_mb__before_atomic_dec() barrier()
+#define smp_mb__after_atomic_dec() barrier()
+#define smp_mb__before_atomic_inc() barrier()
+#define smp_mb__after_atomic_inc() barrier()
+
+/* Set a value and use a memory barrier. Used by the scheduler somewhere. */
+#define set_mb(var, value) \
+ do { var = value; mb(); } while (0)
+
+#endif /* _ASM_BARRIER_H */
diff --git a/arch/hexagon/include/asm/exec.h b/arch/hexagon/include/asm/exec.h
new file mode 100644
index 0000000..350e6d4
--- /dev/null
+++ b/arch/hexagon/include/asm/exec.h
@@ -0,0 +1,28 @@
+/*
+ * Process execution related definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_EXEC_H
+#define _ASM_EXEC_H
+
+/* Should probably shoot for an 8-byte aligned stack pointer */
+#define STACK_MASK (~7)
+#define arch_align_stack(x) (x & STACK_MASK)
+
+#endif /* _ASM_EXEC_H */
diff --git a/arch/hexagon/include/asm/switch_to.h b/arch/hexagon/include/asm/switch_to.h
new file mode 100644
index 0000000..28ca0df
--- /dev/null
+++ b/arch/hexagon/include/asm/switch_to.h
@@ -0,0 +1,34 @@
+/*
+ * Task switching definitions for the Hexagon architecture
+ *
+ * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ */
+
+#ifndef _ASM_SWITCH_TO_H
+#define _ASM_SWITCH_TO_H
+
+struct thread_struct;
+
+extern struct task_struct *__switch_to(struct task_struct *,
+ struct task_struct *,
+ struct task_struct *);
+
+#define switch_to(p, n, r) do {\
+ r = __switch_to((p), (n), (r));\
+} while (0)
+
+#endif /* _ASM_SWITCH_TO_H */
diff --git a/arch/hexagon/include/asm/system.h b/arch/hexagon/include/asm/system.h
deleted file mode 100644
index 323ed1d..0000000
--- a/arch/hexagon/include/asm/system.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * System level definitions for the Hexagon architecture
- *
- * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#ifndef _ASM_SYSTEM_H
-#define _ASM_SYSTEM_H
-
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-#include <asm/atomic.h>
-#include <asm/hexagon_vm.h>
-
-struct thread_struct;
-
-extern struct task_struct *__switch_to(struct task_struct *,
- struct task_struct *,
- struct task_struct *);
-
-#define switch_to(p, n, r) do {\
- r = __switch_to((p), (n), (r));\
-} while (0)
-
-
-#define rmb() barrier()
-#define read_barrier_depends() barrier()
-#define wmb() barrier()
-#define mb() barrier()
-#define smp_rmb() barrier()
-#define smp_read_barrier_depends() barrier()
-#define smp_wmb() barrier()
-#define smp_mb() barrier()
-#define smp_mb__before_atomic_dec() barrier()
-#define smp_mb__after_atomic_dec() barrier()
-#define smp_mb__before_atomic_inc() barrier()
-#define smp_mb__after_atomic_inc() barrier()
-
-/*
- * __xchg - atomically exchange a register and a memory location
- * @x: value to swap
- * @ptr: pointer to memory
- * @size: size of the value
- *
- * Only 4 bytes supported currently.
- *
- * Note: there was an errata for V2 about .new's and memw_locked.
- *
- */
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
- int size)
-{
- unsigned long retval;
-
- /* Can't seem to use printk or panic here, so just stop */
- if (size != 4) do { asm volatile("brkpt;\n"); } while (1);
-
- __asm__ __volatile__ (
- "1: %0 = memw_locked(%1);\n" /* load into retval */
- " memw_locked(%1,P0) = %2;\n" /* store into memory */
- " if !P0 jump 1b;\n"
- : "=&r" (retval)
- : "r" (ptr), "r" (x)
- : "memory", "p0"
- );
- return retval;
-}
-
-/*
- * Atomically swap the contents of a register with memory. Should be atomic
- * between multiple CPU's and within interrupts on the same CPU.
- */
-#define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), \
- sizeof(*(ptr))))
-
-/* Set a value and use a memory barrier. Used by the scheduler somewhere. */
-#define set_mb(var, value) \
- do { var = value; mb(); } while (0)
-
-/*
- * see rt-mutex-design.txt; cmpxchg supposedly checks if *ptr == A and swaps.
- * looks just like atomic_cmpxchg on our arch currently with a bunch of
- * variable casting.
- */
-#define __HAVE_ARCH_CMPXCHG 1
-
-#define cmpxchg(ptr, old, new) \
-({ \
- __typeof__(ptr) __ptr = (ptr); \
- __typeof__(*(ptr)) __old = (old); \
- __typeof__(*(ptr)) __new = (new); \
- __typeof__(*(ptr)) __oldval = 0; \
- \
- asm volatile( \
- "1: %0 = memw_locked(%1);\n" \
- " { P0 = cmp.eq(%0,%2);\n" \
- " if (!P0.new) jump:nt 2f; }\n" \
- " memw_locked(%1,p0) = %3;\n" \
- " if (!P0) jump 1b;\n" \
- "2:\n" \
- : "=&r" (__oldval) \
- : "r" (__ptr), "r" (__old), "r" (__new) \
- : "memory", "p0" \
- ); \
- __oldval; \
-})
-
-/* Should probably shoot for an 8-byte aligned stack pointer */
-#define STACK_MASK (~7)
-#define arch_align_stack(x) (x & STACK_MASK)
-
-#endif

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 13/29] Disintegrate asm/system.h for IA64
March 07, 2012 09:03PM
Disintegrate asm/system.h for IA64. Not compiled.

Signed-off-by: David Howells <[email protected]>
---

arch/ia64/include/asm/auxvec.h | 2
arch/ia64/include/asm/barrier.h | 68 ++++++++++++
arch/ia64/include/asm/exec.h | 14 +++
arch/ia64/include/asm/pci.h | 8 +
arch/ia64/include/asm/processor.h | 8 +
arch/ia64/include/asm/setup.h | 28 +++++
arch/ia64/include/asm/switch_to.h | 87 ++++++++++++++++
arch/ia64/include/asm/system.h | 203 -------------------------------------
8 files changed, 215 insertions(+), 203 deletions(-)
create mode 100644 arch/ia64/include/asm/barrier.h
create mode 100644 arch/ia64/include/asm/exec.h
create mode 100644 arch/ia64/include/asm/switch_to.h
delete mode 100644 arch/ia64/include/asm/system.h

diff --git a/arch/ia64/include/asm/auxvec.h b/arch/ia64/include/asm/auxvec.h
index 23cebe5..58277fc 100644
--- a/arch/ia64/include/asm/auxvec.h
+++ b/arch/ia64/include/asm/auxvec.h
@@ -8,4 +8,6 @@
#define AT_SYSINFO 32
#define AT_SYSINFO_EHDR 33

+#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */
+
#endif /* _ASM_IA64_AUXVEC_H */
diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h
new file mode 100644
index 0000000..516529c
--- /dev/null
+++ b/arch/ia64/include/asm/barrier.h
@@ -0,0 +1,68 @@
+/*
+ * Memory barrier definitions. This is based on information published
+ * in the Processor Abstraction Layer and the System Abstraction Layer
+ * manual.
+ *
+ * Copyright (C) 1998-2003 Hewlett-Packard Co
+ * David Mosberger-Tang <[email protected]>
+ * Copyright (C) 1999 Asit Mallick <[email protected]>
+ * Copyright (C) 1999 Don Dugger <[email protected]>
+ */
+#ifndef _ASM_IA64_BARRIER_H
+#define _ASM_IA64_BARRIER_H
+
+#include <asm/compiler.h>
+
+/*
+ * Macros to force memory ordering. In these descriptions, "previous"
+ * and "subsequent" refer to program order; "visible" means that all
+ * architecturally visible effects of a memory access have occurred
+ * (at a minimum, this means the memory has been read or written).
+ *
+ * wmb(): Guarantees that all preceding stores to memory-
+ * like regions are visible before any subsequent
+ * stores and that all following stores will be
+ * visible only after all previous stores.
+ * rmb(): Like wmb(), but for reads.
+ * mb(): wmb()/rmb() combo, i.e., all previous memory
+ * accesses are visible before all subsequent
+ * accesses and vice versa. This is also known as
+ * a "fence."
+ *
+ * Note: "mb()" and its variants cannot be used as a fence to order
+ * accesses to memory mapped I/O registers. For that, mf.a needs to
+ * be used. However, we don't want to always use mf.a because (a)
+ * it's (presumably) much slower than mf and (b) mf.a is supported for
+ * sequential memory pages only.
+ */
+#define mb() ia64_mf()
+#define rmb() mb()
+#define wmb() mb()
+#define read_barrier_depends() do { } while(0)
+
+#ifdef CONFIG_SMP
+# define smp_mb() mb()
+# define smp_rmb() rmb()
+# define smp_wmb() wmb()
+# define smp_read_barrier_depends() read_barrier_depends()
+#else
+# define smp_mb() barrier()
+# define smp_rmb() barrier()
+# define smp_wmb() barrier()
+# define smp_read_barrier_depends() do { } while(0)
+#endif
+
+/*
+ * XXX check on this ---I suspect what Linus really wants here is
+ * acquire vs release semantics but we can't discuss this stuff with
+ * Linus just yet. Grrr...
+ */
+#define set_mb(var, value) do { (var) = (value); mb(); } while (0)
+
+/*
+ * The group barrier in front of the rsm & ssm are necessary to ensure
+ * that none of the previous instructions in the same group are
+ * affected by the rsm/ssm.
+ */
+
+#endif /* _ASM_IA64_BARRIER_H */
diff --git a/arch/ia64/include/asm/exec.h b/arch/ia64/include/asm/exec.h
new file mode 100644
index 0000000..b262424
--- /dev/null
+++ b/arch/ia64/include/asm/exec.h
@@ -0,0 +1,14 @@
+/*
+ * Process execution defines.
+ *
+ * Copyright (C) 1998-2003 Hewlett-Packard Co
+ * David Mosberger-Tang <[email protected]>
+ * Copyright (C) 1999 Asit Mallick <[email protected]>
+ * Copyright (C) 1999 Don Dugger <[email protected]>
+ */
+#ifndef _ASM_IA64_EXEC_H
+#define _ASM_IA64_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _ASM_IA64_EXEC_H */
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 279b38a..c5e6da9 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -11,6 +11,14 @@
#include <asm/scatterlist.h>
#include <asm/hw_irq.h>

+struct pci_vector_struct {
+ __u16 segment; /* PCI Segment number */
+ __u16 bus; /* PCI Bus number */
+ __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
+ __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
+ __u32 irq; /* IRQ assigned */
+};
+
/*
* Can be used to override the logic in pci_scan_bus for skipping already-configured bus
* numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h
index 691be0b..483f6c6 100644
--- a/arch/ia64/include/asm/processor.h
+++ b/arch/ia64/include/asm/processor.h
@@ -19,6 +19,9 @@
#include <asm/ptrace.h>
#include <asm/ustack.h>

+#define __ARCH_WANT_UNLOCKED_CTXSW
+#define ARCH_HAS_PREFETCH_SWITCH_STACK
+
#define IA64_NUM_PHYS_STACK_REG 96
#define IA64_NUM_DBG_REGS 8

@@ -720,6 +723,11 @@ extern unsigned long boot_option_idle_override;
enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_FORCE_MWAIT,
IDLE_NOMWAIT, IDLE_POLL};

+void cpu_idle_wait(void);
+void default_idle(void);
+
+#define ia64_platform_is(x) (strcmp(x, platform_name) == 0)
+
#endif /* !__ASSEMBLY__ */

#endif /* _ASM_IA64_PROCESSOR_H */
diff --git a/arch/ia64/include/asm/setup.h b/arch/ia64/include/asm/setup.h
index 4399a44..d2fb458 100644
--- a/arch/ia64/include/asm/setup.h
+++ b/arch/ia64/include/asm/setup.h
@@ -3,4 +3,32 @@

#define COMMAND_LINE_SIZE 2048

+#define GATE_ADDR RGN_BASE(RGN_GATE)
+
+/*
+ * 0xa000000000000000+2*PERCPU_PAGE_SIZE
+ * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page)
+ */
+#define KERNEL_START (GATE_ADDR+__IA64_UL_CONST(0x100000000))
+#define PERCPU_ADDR (-PERCPU_PAGE_SIZE)
+#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
+
+extern struct ia64_boot_param {
+ __u64 command_line; /* physical address of command line arguments */
+ __u64 efi_systab; /* physical address of EFI system table */
+ __u64 efi_memmap; /* physical address of EFI memory map */
+ __u64 efi_memmap_size; /* size of EFI memory map */
+ __u64 efi_memdesc_size; /* size of an EFI memory map descriptor */
+ __u32 efi_memdesc_version; /* memory descriptor version */
+ struct {
+ __u16 num_cols; /* number of columns on console output device */
+ __u16 num_rows; /* number of rows on console output device */
+ __u16 orig_x; /* cursor's x position */
+ __u16 orig_y; /* cursor's y position */
+ } console_info;
+ __u64 fpswa; /* physical address of the fpswa interface */
+ __u64 initrd_start;
+ __u64 initrd_size;
+} *ia64_boot_param;
+
#endif
diff --git a/arch/ia64/include/asm/switch_to.h b/arch/ia64/include/asm/switch_to.h
new file mode 100644
index 0000000..cb2412f
--- /dev/null
+++ b/arch/ia64/include/asm/switch_to.h
@@ -0,0 +1,87 @@
+/*
+ * Low-level task switching. This is based on information published in
+ * the Processor Abstraction Layer and the System Abstraction Layer
+ * manual.
+ *
+ * Copyright (C) 1998-2003 Hewlett-Packard Co
+ * David Mosberger-Tang <[email protected]>
+ * Copyright (C) 1999 Asit Mallick <[email protected]>
+ * Copyright (C) 1999 Don Dugger <[email protected]>
+ */
+#ifndef _ASM_IA64_SWITCH_TO_H
+#define _ASM_IA64_SWITCH_TO_H
+
+#include <linux/percpu.h>
+
+struct task_struct;
+
+/*
+ * Context switch from one thread to another. If the two threads have
+ * different address spaces, schedule() has already taken care of
+ * switching to the new address space by calling switch_mm().
+ *
+ * Disabling access to the fph partition and the debug-register
+ * context switch MUST be done before calling ia64_switch_to() since a
+ * newly created thread returns directly to
+ * ia64_ret_from_syscall_clear_r8.
+ */
+extern struct task_struct *ia64_switch_to (void *next_task);
+
+extern void ia64_save_extra (struct task_struct *task);
+extern void ia64_load_extra (struct task_struct *task);
+
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+extern void ia64_account_on_switch (struct task_struct *prev, struct task_struct *next);
+# define IA64_ACCOUNT_ON_SWITCH(p,n) ia64_account_on_switch(p,n)
+#else
+# define IA64_ACCOUNT_ON_SWITCH(p,n)
+#endif
+
+#ifdef CONFIG_PERFMON
+ DECLARE_PER_CPU(unsigned long, pfm_syst_info);
+# define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1)
+#else
+# define PERFMON_IS_SYSWIDE() (0)
+#endif
+
+#define IA64_HAS_EXTRA_STATE(t) \
+ ((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID) \
+ || PERFMON_IS_SYSWIDE())
+
+#define __switch_to(prev,next,last) do { \
+ IA64_ACCOUNT_ON_SWITCH(prev, next); \
+ if (IA64_HAS_EXTRA_STATE(prev)) \
+ ia64_save_extra(prev); \
+ if (IA64_HAS_EXTRA_STATE(next)) \
+ ia64_load_extra(next); \
+ ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next); \
+ (last) = ia64_switch_to((next)); \
+} while (0)
+
+#ifdef CONFIG_SMP
+/*
+ * In the SMP case, we save the fph state when context-switching away from a thread that
+ * modified fph. This way, when the thread gets scheduled on another CPU, the CPU can
+ * pick up the state from task->thread.fph, avoiding the complication of having to fetch
+ * the latest fph state from another CPU. In other words: eager save, lazy restore.
+ */
+# define switch_to(prev,next,last) do { \
+ if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \
+ ia64_psr(task_pt_regs(prev))->mfh = 0; \
+ (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \
+ __ia64_save_fpu((prev)->thread.fph); \
+ } \
+ __switch_to(prev, next, last); \
+ /* "next" in old context is "current" in new context */ \
+ if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) && \
+ (task_cpu(current) != \
+ task_thread_info(current)->last_cpu))) { \
+ platform_migrate(current); \
+ task_thread_info(current)->last_cpu = task_cpu(current); \
+ } \
+} while (0)
+#else
+# define switch_to(prev,next,last) __switch_to(prev, next, last)
+#endif
+
+#endif /* _ASM_IA64_SWITCH_TO_H */
diff --git a/arch/ia64/include/asm/system.h b/arch/ia64/include/asm/system.h
deleted file mode 100644
index 6cca307..0000000
--- a/arch/ia64/include/asm/system.h
+++ /dev/null
@@ -1,203 +0,0 @@
-#ifndef _ASM_IA64_SYSTEM_H
-#define _ASM_IA64_SYSTEM_H
-
-/*
- * System defines. Note that this is included both from .c and .S
- * files, so it does only defines, not any C code. This is based
- * on information published in the Processor Abstraction Layer
- * and the System Abstraction Layer manual.
- *
- * Copyright (C) 1998-2003 Hewlett-Packard Co
- * David Mosberger-Tang <[email protected]>
- * Copyright (C) 1999 Asit Mallick <[email protected]>
- * Copyright (C) 1999 Don Dugger <[email protected]>
- */
-
-#include <asm/kregs.h>
-#include <asm/page.h>
-#include <asm/pal.h>
-#include <asm/percpu.h>
-
-#define GATE_ADDR RGN_BASE(RGN_GATE)
-
-/*
- * 0xa000000000000000+2*PERCPU_PAGE_SIZE
- * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page)
- */
-#define KERNEL_START (GATE_ADDR+__IA64_UL_CONST(0x100000000))
-#define PERCPU_ADDR (-PERCPU_PAGE_SIZE)
-#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
-
-#ifndef __ASSEMBLY__
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-
-#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */
-
-struct pci_vector_struct {
- __u16 segment; /* PCI Segment number */
- __u16 bus; /* PCI Bus number */
- __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
- __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
- __u32 irq; /* IRQ assigned */
-};
-
-extern struct ia64_boot_param {
- __u64 command_line; /* physical address of command line arguments */
- __u64 efi_systab; /* physical address of EFI system table */
- __u64 efi_memmap; /* physical address of EFI memory map */
- __u64 efi_memmap_size; /* size of EFI memory map */
- __u64 efi_memdesc_size; /* size of an EFI memory map descriptor */
- __u32 efi_memdesc_version; /* memory descriptor version */
- struct {
- __u16 num_cols; /* number of columns on console output device */
- __u16 num_rows; /* number of rows on console output device */
- __u16 orig_x; /* cursor's x position */
- __u16 orig_y; /* cursor's y position */
- } console_info;
- __u64 fpswa; /* physical address of the fpswa interface */
- __u64 initrd_start;
- __u64 initrd_size;
-} *ia64_boot_param;
-
-/*
- * Macros to force memory ordering. In these descriptions, "previous"
- * and "subsequent" refer to program order; "visible" means that all
- * architecturally visible effects of a memory access have occurred
- * (at a minimum, this means the memory has been read or written).
- *
- * wmb(): Guarantees that all preceding stores to memory-
- * like regions are visible before any subsequent
- * stores and that all following stores will be
- * visible only after all previous stores.
- * rmb(): Like wmb(), but for reads.
- * mb(): wmb()/rmb() combo, i.e., all previous memory
- * accesses are visible before all subsequent
- * accesses and vice versa. This is also known as
- * a "fence."
- *
- * Note: "mb()" and its variants cannot be used as a fence to order
- * accesses to memory mapped I/O registers. For that, mf.a needs to
- * be used. However, we don't want to always use mf.a because (a)
- * it's (presumably) much slower than mf and (b) mf.a is supported for
- * sequential memory pages only.
- */
-#define mb() ia64_mf()
-#define rmb() mb()
-#define wmb() mb()
-#define read_barrier_depends() do { } while(0)
-
-#ifdef CONFIG_SMP
-# define smp_mb() mb()
-# define smp_rmb() rmb()
-# define smp_wmb() wmb()
-# define smp_read_barrier_depends() read_barrier_depends()
-#else
-# define smp_mb() barrier()
-# define smp_rmb() barrier()
-# define smp_wmb() barrier()
-# define smp_read_barrier_depends() do { } while(0)
-#endif
-
-/*
- * XXX check on this ---I suspect what Linus really wants here is
- * acquire vs release semantics but we can't discuss this stuff with
- * Linus just yet. Grrr...
- */
-#define set_mb(var, value) do { (var) = (value); mb(); } while (0)
-
-/*
- * The group barrier in front of the rsm & ssm are necessary to ensure
- * that none of the previous instructions in the same group are
- * affected by the rsm/ssm.
- */
-
-#ifdef __KERNEL__
-
-/*
- * Context switch from one thread to another. If the two threads have
- * different address spaces, schedule() has already taken care of
- * switching to the new address space by calling switch_mm().
- *
- * Disabling access to the fph partition and the debug-register
- * context switch MUST be done before calling ia64_switch_to() since a
- * newly created thread returns directly to
- * ia64_ret_from_syscall_clear_r8.
- */
-extern struct task_struct *ia64_switch_to (void *next_task);
-
-struct task_struct;
-
-extern void ia64_save_extra (struct task_struct *task);
-extern void ia64_load_extra (struct task_struct *task);
-
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-extern void ia64_account_on_switch (struct task_struct *prev, struct task_struct *next);
-# define IA64_ACCOUNT_ON_SWITCH(p,n) ia64_account_on_switch(p,n)
-#else
-# define IA64_ACCOUNT_ON_SWITCH(p,n)
-#endif
-
-#ifdef CONFIG_PERFMON
- DECLARE_PER_CPU(unsigned long, pfm_syst_info);
-# define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1)
-#else
-# define PERFMON_IS_SYSWIDE() (0)
-#endif
-
-#define IA64_HAS_EXTRA_STATE(t) \
- ((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID) \
- || PERFMON_IS_SYSWIDE())
-
-#define __switch_to(prev,next,last) do { \
- IA64_ACCOUNT_ON_SWITCH(prev, next); \
- if (IA64_HAS_EXTRA_STATE(prev)) \
- ia64_save_extra(prev); \
- if (IA64_HAS_EXTRA_STATE(next)) \
- ia64_load_extra(next); \
- ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next); \
- (last) = ia64_switch_to((next)); \
-} while (0)
-
-#ifdef CONFIG_SMP
-/*
- * In the SMP case, we save the fph state when context-switching away from a thread that
- * modified fph. This way, when the thread gets scheduled on another CPU, the CPU can
- * pick up the state from task->thread.fph, avoiding the complication of having to fetch
- * the latest fph state from another CPU. In other words: eager save, lazy restore.
- */
-# define switch_to(prev,next,last) do { \
- if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \
- ia64_psr(task_pt_regs(prev))->mfh = 0; \
- (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \
- __ia64_save_fpu((prev)->thread.fph); \
- } \
- __switch_to(prev, next, last); \
- /* "next" in old context is "current" in new context */ \
- if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) && \
- (task_cpu(current) != \
- task_thread_info(current)->last_cpu))) { \
- platform_migrate(current); \
- task_thread_info(current)->last_cpu = task_cpu(current); \
- } \
-} while (0)
-#else
-# define switch_to(prev,next,last) __switch_to(prev, next, last)
-#endif
-
-#define __ARCH_WANT_UNLOCKED_CTXSW
-#define ARCH_HAS_PREFETCH_SWITCH_STACK
-#define ia64_platform_is(x) (strcmp(x, platform_name) == 0)
-
-void cpu_idle_wait(void);
-
-#define arch_align_stack(x) (x)
-
-void default_idle(void);
-
-#endif /* __KERNEL__ */
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_IA64_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 16/29] Disintegrate asm/system.h for Microblaze
March 07, 2012 09:03PM
Disintegrate asm/system.h for Microblaze. Not compiled.

Signed-off-by: David Howells <[email protected]>
---

arch/microblaze/include/asm/atomic.h | 36 ++++++++++++
arch/microblaze/include/asm/barrier.h | 26 ++++++++
arch/microblaze/include/asm/exec.h | 14 +++++
arch/microblaze/include/asm/processor.h | 11 +++-
arch/microblaze/include/asm/setup.h | 6 ++
arch/microblaze/include/asm/switch_to.h | 24 ++++++++
arch/microblaze/include/asm/system.h | 96 -------------------------------
7 files changed, 116 insertions(+), 97 deletions(-)
create mode 100644 arch/microblaze/include/asm/barrier.h
create mode 100644 arch/microblaze/include/asm/exec.h
create mode 100644 arch/microblaze/include/asm/switch_to.h
delete mode 100644 arch/microblaze/include/asm/system.h

diff --git a/arch/microblaze/include/asm/atomic.h b/arch/microblaze/include/asm/atomic.h
index 615f539..f3fadd14 100644
--- a/arch/microblaze/include/asm/atomic.h
+++ b/arch/microblaze/include/asm/atomic.h
@@ -22,4 +22,40 @@ static inline int atomic_dec_if_positive(atomic_t *v)
return res;
}

+void __bad_xchg(volatile void *ptr, int size);
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
+ int size)
+{
+ unsigned long ret;
+ unsigned long flags;
+
+ switch (size) {
+ case 1:
+ local_irq_save(flags);
+ ret = *(volatile unsigned char *)ptr;
+ *(volatile unsigned char *)ptr = x;
+ local_irq_restore(flags);
+ break;
+
+ case 4:
+ local_irq_save(flags);
+ ret = *(volatile unsigned long *)ptr;
+ *(volatile unsigned long *)ptr = x;
+ local_irq_restore(flags);
+ break;
+ default:
+ __bad_xchg(ptr, size), ret = 0;
+ break;
+ }
+
+ return ret;
+}
+
+#define xchg(ptr, x) \
+ ((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg.h>
+#include <asm-generic/cmpxchg-local.h>
+
#endif /* _ASM_MICROBLAZE_ATOMIC_H */
diff --git a/arch/microblaze/include/asm/barrier.h b/arch/microblaze/include/asm/barrier.h
new file mode 100644
index 0000000..5bdb324
--- /dev/null
+++ b/arch/microblaze/include/asm/barrier.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_BARRIER_H
+#define _ASM_MICROBLAZE_BARRIER_H
+
+#define smp_read_barrier_depends() do {} while (0)
+#define read_barrier_depends() do {} while (0)
+
+#define nop() asm volatile ("nop")
+#define mb() barrier()
+#define rmb() mb()
+#define wmb() mb()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+
+#endif /* _ASM_MICROBLAZE_BARRIER_H */
diff --git a/arch/microblaze/include/asm/exec.h b/arch/microblaze/include/asm/exec.h
new file mode 100644
index 0000000..e750de1
--- /dev/null
+++ b/arch/microblaze/include/asm/exec.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_EXEC_H
+#define _ASM_MICROBLAZE_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _ASM_MICROBLAZE_EXEC_H */
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 7283bfb..510a8e1 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -125,7 +125,6 @@ struct thread_struct {
.pgdir = swapper_pg_dir, \
}

-
/* Free all resources held by a thread. */
extern inline void release_thread(struct task_struct *dead_task)
{
@@ -144,6 +143,8 @@ static inline void exit_thread(void)

unsigned long get_wchan(struct task_struct *p);

+extern void ret_from_fork(void);
+
/* The size allocated for kernel stacks. This _must_ be a power of two! */
# define KERNEL_STACK_SIZE 0x2000

@@ -166,6 +167,14 @@ unsigned long get_wchan(struct task_struct *p);
# define STACK_TOP TASK_SIZE
# define STACK_TOP_MAX STACK_TOP

+void disable_hlt(void);
+void enable_hlt(void);
+void default_idle(void);
+
+#ifdef CONFIG_DEBUG_FS
+extern struct dentry *of_debugfs_root;
+#endif
+
# endif /* __ASSEMBLY__ */
# endif /* CONFIG_MMU */
#endif /* _ASM_MICROBLAZE_PROCESSOR_H */
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
index 6c72ed7..aa22511 100644
--- a/arch/microblaze/include/asm/setup.h
+++ b/arch/microblaze/include/asm/setup.h
@@ -20,6 +20,8 @@ extern unsigned int boot_cpuid; /* move to smp.h */

extern char cmd_line[COMMAND_LINE_SIZE];

+extern char *klimit;
+
void early_printk(const char *fmt, ...);

int setup_early_printk(char *opt);
@@ -46,6 +48,10 @@ void machine_shutdown(void);
void machine_halt(void);
void machine_power_off(void);

+void free_init_pages(char *what, unsigned long begin, unsigned long end);
+extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
+extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
+
# endif/* __KERNEL__ */
# endif /* __ASSEMBLY__ */
#endif /* _ASM_MICROBLAZE_SETUP_H */
diff --git a/arch/microblaze/include/asm/switch_to.h b/arch/microblaze/include/asm/switch_to.h
new file mode 100644
index 0000000..f45baa2
--- /dev/null
+++ b/arch/microblaze/include/asm/switch_to.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_SWITCH_TO_H
+#define _ASM_MICROBLAZE_SWITCH_TO_H
+
+struct task_struct;
+struct thread_info;
+
+extern struct task_struct *_switch_to(struct thread_info *prev,
+ struct thread_info *next);
+
+#define switch_to(prev, next, last) \
+ do { \
+ (last) = _switch_to(task_thread_info(prev), \
+ task_thread_info(next)); \
+ } while (0)
+
+#endif /* _ASM_MICROBLAZE_SWITCH_TO_H */
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h
deleted file mode 100644
index 81f9f23..0000000
--- a/arch/microblaze/include/asm/system.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_SYSTEM_H
-#define _ASM_MICROBLAZE_SYSTEM_H
-
-#include <asm/registers.h>
-#include <asm/setup.h>
-#include <asm/irqflags.h>
-#include <asm/cache.h>
-
-#include <asm-generic/cmpxchg.h>
-#include <asm-generic/cmpxchg-local.h>
-
-struct task_struct;
-struct thread_info;
-
-extern struct task_struct *_switch_to(struct thread_info *prev,
- struct thread_info *next);
-
-#define switch_to(prev, next, last) \
- do { \
- (last) = _switch_to(task_thread_info(prev), \
- task_thread_info(next)); \
- } while (0)
-
-#define smp_read_barrier_depends() do {} while (0)
-#define read_barrier_depends() do {} while (0)
-
-#define nop() asm volatile ("nop")
-#define mb() barrier()
-#define rmb() mb()
-#define wmb() mb()
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-#define set_wmb(var, value) do { var = value; wmb(); } while (0)
-
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-
-void __bad_xchg(volatile void *ptr, int size);
-
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
- int size)
-{
- unsigned long ret;
- unsigned long flags;
-
- switch (size) {
- case 1:
- local_irq_save(flags);
- ret = *(volatile unsigned char *)ptr;
- *(volatile unsigned char *)ptr = x;
- local_irq_restore(flags);
- break;
-
- case 4:
- local_irq_save(flags);
- ret = *(volatile unsigned long *)ptr;
- *(volatile unsigned long *)ptr = x;
- local_irq_restore(flags);
- break;
- default:
- __bad_xchg(ptr, size), ret = 0;
- break;
- }
-
- return ret;
-}
-
-void disable_hlt(void);
-void enable_hlt(void);
-void default_idle(void);
-
-#define xchg(ptr, x) \
- ((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
-
-void free_init_pages(char *what, unsigned long begin, unsigned long end);
-extern char *klimit;
-extern void ret_from_fork(void);
-
-extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
-extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
-
-#ifdef CONFIG_DEBUG_FS
-extern struct dentry *of_debugfs_root;
-#endif
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_MICROBLAZE_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 14/29] Disintegrate asm/system.h for M32R
March 07, 2012 09:04PM
Disintegrate asm/system.h for M32R.

Signed-off-by: David Howells <[email protected]>
---

arch/m32r/include/asm/atomic.h | 209 +++++++++++++++++++
arch/m32r/include/asm/barrier.h | 92 +++++++++
arch/m32r/include/asm/bitops.h | 2
arch/m32r/include/asm/dcache_clear.h | 29 +++
arch/m32r/include/asm/exec.h | 14 +
arch/m32r/include/asm/spinlock.h | 1
arch/m32r/include/asm/switch_to.h | 51 +++++
arch/m32r/include/asm/system.h | 367 ----------------------------------
8 files changed, 398 insertions(+), 367 deletions(-)
create mode 100644 arch/m32r/include/asm/barrier.h
create mode 100644 arch/m32r/include/asm/dcache_clear.h
create mode 100644 arch/m32r/include/asm/exec.h
create mode 100644 arch/m32r/include/asm/switch_to.h
delete mode 100644 arch/m32r/include/asm/system.h

diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
index c80b519..6918515 100644
--- a/arch/m32r/include/asm/atomic.h
+++ b/arch/m32r/include/asm/atomic.h
@@ -10,7 +10,9 @@
*/

#include <linux/types.h>
+#include <linux/irqflags.h>
#include <asm/assembler.h>
+#include <asm/dcache_clear.h>

/*
* Atomic operations that C can't guarantee us. Useful for
@@ -234,6 +236,213 @@ static __inline__ int atomic_dec_return(atomic_t *v)
*/
#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)

+extern void __xchg_called_with_bad_pointer(void);
+
+static __always_inline unsigned long
+__xchg(unsigned long x, volatile void *ptr, int size)
+{
+ unsigned long flags;
+ unsigned long tmp = 0;
+
+ local_irq_save(flags);
+
+ switch (size) {
+#ifndef CONFIG_SMP
+ case 1:
+ __asm__ __volatile__ (
+ "ldb %0, @%2 \n\t"
+ "stb %1, @%2 \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
+ break;
+ case 2:
+ __asm__ __volatile__ (
+ "ldh %0, @%2 \n\t"
+ "sth %1, @%2 \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
+ break;
+ case 4:
+ __asm__ __volatile__ (
+ "ld %0, @%2 \n\t"
+ "st %1, @%2 \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
+ break;
+#else /* CONFIG_SMP */
+ case 4:
+ __asm__ __volatile__ (
+ DCACHE_CLEAR("%0", "r4", "%2")
+ "lock %0, @%2; \n\t"
+ "unlock %1, @%2; \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr)
+ : "memory"
+#ifdef CONFIG_CHIP_M32700_TS1
+ , "r4"
+#endif /* CONFIG_CHIP_M32700_TS1 */
+ );
+ break;
+#endif /* CONFIG_SMP */
+ default:
+ __xchg_called_with_bad_pointer();
+ }
+
+ local_irq_restore(flags);
+
+ return (tmp);
+}
+
+#define xchg(ptr, x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
+
+static __always_inline unsigned long
+__xchg_local(unsigned long x, volatile void *ptr, int size)
+{
+ unsigned long flags;
+ unsigned long tmp = 0;
+
+ local_irq_save(flags);
+
+ switch (size) {
+ case 1:
+ __asm__ __volatile__ (
+ "ldb %0, @%2 \n\t"
+ "stb %1, @%2 \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
+ break;
+ case 2:
+ __asm__ __volatile__ (
+ "ldh %0, @%2 \n\t"
+ "sth %1, @%2 \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
+ break;
+ case 4:
+ __asm__ __volatile__ (
+ "ld %0, @%2 \n\t"
+ "st %1, @%2 \n\t"
+ : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
+ break;
+ default:
+ __xchg_called_with_bad_pointer();
+ }
+
+ local_irq_restore(flags);
+
+ return (tmp);
+}
+
+#define xchg_local(ptr, x) \
+ ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \
+ sizeof(*(ptr))))
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long
+__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
+{
+ unsigned long flags;
+ unsigned int retval;
+
+ local_irq_save(flags);
+ __asm__ __volatile__ (
+ DCACHE_CLEAR("%0", "r4", "%1")
+ M32R_LOCK" %0, @%1; \n"
+ " bne %0, %2, 1f; \n"
+ M32R_UNLOCK" %3, @%1; \n"
+ " bra 2f; \n"
+ " .fillinsn \n"
+ "1:"
+ M32R_UNLOCK" %0, @%1; \n"
+ " .fillinsn \n"
+ "2:"
+ : "=&r" (retval)
+ : "r" (p), "r" (old), "r" (new)
+ : "cbit", "memory"
+#ifdef CONFIG_CHIP_M32700_TS1
+ , "r4"
+#endif /* CONFIG_CHIP_M32700_TS1 */
+ );
+ local_irq_restore(flags);
+
+ return retval;
+}
+
+static inline unsigned long
+__cmpxchg_local_u32(volatile unsigned int *p, unsigned int old,
+ unsigned int new)
+{
+ unsigned long flags;
+ unsigned int retval;
+
+ local_irq_save(flags);
+ __asm__ __volatile__ (
+ DCACHE_CLEAR("%0", "r4", "%1")
+ "ld %0, @%1; \n"
+ " bne %0, %2, 1f; \n"
+ "st %3, @%1; \n"
+ " bra 2f; \n"
+ " .fillinsn \n"
+ "1:"
+ "st %0, @%1; \n"
+ " .fillinsn \n"
+ "2:"
+ : "=&r" (retval)
+ : "r" (p), "r" (old), "r" (new)
+ : "cbit", "memory"
+#ifdef CONFIG_CHIP_M32700_TS1
+ , "r4"
+#endif /* CONFIG_CHIP_M32700_TS1 */
+ );
+ local_irq_restore(flags);
+
+ return retval;
+}
+
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+#if 0 /* we don't have __cmpxchg_u64 */
+ case 8:
+ return __cmpxchg_u64(ptr, old, new);
+#endif /* 0 */
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr, o, n) \
+ ((__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+ unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_local_u32(ptr, old, new);
+ default:
+ return __cmpxchg_local_generic(ptr, old, new, size);
+ }
+
+ return old;
+}
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

diff --git a/arch/m32r/include/asm/barrier.h b/arch/m32r/include/asm/barrier.h
new file mode 100644
index 0000000..5f9b51f0
--- /dev/null
+++ b/arch/m32r/include/asm/barrier.h
@@ -0,0 +1,92 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
+ * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
+ */
+#ifndef _ASM_M32R_BARRIER_H
+#define _ASM_M32R_BARRIER_H
+
+/*
+ * Memory barrier.
+ *
+ * mb() prevents loads and stores being reordered across this point.
+ * rmb() prevents loads being reordered across this point.
+ * wmb() prevents stores being reordered across this point.
+ */
+#define mb() barrier()
+#define rmb() mb()
+#define wmb() mb()
+
+/**
+ * read_barrier_depends - Flush all pending reads that subsequents reads
+ * depend on.
+ *
+ * No data-dependent reads from memory-like regions are ever reordered
+ * over this barrier. All reads preceding this primitive are guaranteed
+ * to access memory (but not necessarily other CPUs' caches) before any
+ * reads following this primitive that depend on the data return by
+ * any of the preceding reads. This primitive is much lighter weight than
+ * rmb() on most CPUs, and is never heavier weight than is
+ * rmb().
+ *
+ * These ordering constraints are respected by both the local CPU
+ * and the compiler.
+ *
+ * Ordering is not guaranteed by anything other than these primitives,
+ * not even by data dependencies. See the documentation for
+ * memory_barrier() for examples and URLs to more information.
+ *
+ * For example, the following code would force ordering (the initial
+ * value of "a" is zero, "b" is one, and "p" is "&a"):
+ *
+ * <programlisting>
+ * CPU 0 CPU 1
+ *
+ * b = 2;
+ * memory_barrier();
+ * p = &b; q = p;
+ * read_barrier_depends();
+ * d = *q;
+ * </programlisting>
+ *
+ *
+ * because the read of "*q" depends on the read of "p" and these
+ * two reads are separated by a read_barrier_depends(). However,
+ * the following code, with the same initial values for "a" and "b":
+ *
+ * <programlisting>
+ * CPU 0 CPU 1
+ *
+ * a = 2;
+ * memory_barrier();
+ * b = 3; y = b;
+ * read_barrier_depends();
+ * x = a;
+ * </programlisting>
+ *
+ * does not enforce ordering, since there is no data dependency between
+ * the read of "a" and the read of "b". Therefore, on some CPUs, such
+ * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
+ * in cases like this where there are no data dependencies.
+ **/
+
+#define read_barrier_depends() do { } while (0)
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_read_barrier_depends() read_barrier_depends()
+#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while (0)
+#define set_mb(var, value) do { var = value; barrier(); } while (0)
+#endif
+
+#endif /* _ASM_M32R_BARRIER_H */
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h
index 87cd5beb..d3dea9a 100644
--- a/arch/m32r/include/asm/bitops.h
+++ b/arch/m32r/include/asm/bitops.h
@@ -16,8 +16,10 @@
#endif

#include <linux/compiler.h>
+#include <linux/irqflags.h>
#include <asm/assembler.h>
#include <asm/byteorder.h>
+#include <asm/dcache_clear.h>
#include <asm/types.h>

/*
diff --git a/arch/m32r/include/asm/dcache_clear.h b/arch/m32r/include/asm/dcache_clear.h
new file mode 100644
index 0000000..a0ae06c
--- /dev/null
+++ b/arch/m32r/include/asm/dcache_clear.h
@@ -0,0 +1,29 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
+ * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
+ */
+#ifndef _ASM_M32R_DCACHE_CLEAR_H
+#define _ASM_M32R_DCACHE_CLEAR_H
+
+#ifdef CONFIG_CHIP_M32700_TS1
+#define DCACHE_CLEAR(reg0, reg1, addr) \
+ "seth "reg1", #high(dcache_dummy); \n\t" \
+ "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
+ "lock "reg0", @"reg1"; \n\t" \
+ "add3 "reg0", "addr", #0x1000; \n\t" \
+ "ld "reg0", @"reg0"; \n\t" \
+ "add3 "reg0", "addr", #0x2000; \n\t" \
+ "ld "reg0", @"reg0"; \n\t" \
+ "unlock "reg0", @"reg1"; \n\t"
+ /* FIXME: This workaround code cannot handle kernel modules
+ * correctly under SMP environment.
+ */
+#else /* CONFIG_CHIP_M32700_TS1 */
+#define DCACHE_CLEAR(reg0, reg1, addr)
+#endif /* CONFIG_CHIP_M32700_TS1 */
+
+#endif /* _ASM_M32R_DCACHE_CLEAR_H */
diff --git a/arch/m32r/include/asm/exec.h b/arch/m32r/include/asm/exec.h
new file mode 100644
index 0000000..c805dbd
--- /dev/null
+++ b/arch/m32r/include/asm/exec.h
@@ -0,0 +1,14 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
+ * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
+ */
+#ifndef _ASM_M32R_EXEC_H
+#define _ASM_M32R_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _ASM_M32R_EXEC_H */
diff --git a/arch/m32r/include/asm/spinlock.h b/arch/m32r/include/asm/spinlock.h
index b0ea2f2..fa13694 100644
--- a/arch/m32r/include/asm/spinlock.h
+++ b/arch/m32r/include/asm/spinlock.h
@@ -11,6 +11,7 @@

#include <linux/compiler.h>
#include <linux/atomic.h>
+#include <asm/dcache_clear.h>
#include <asm/page.h>

/*
diff --git a/arch/m32r/include/asm/switch_to.h b/arch/m32r/include/asm/switch_to.h
new file mode 100644
index 0000000..4b262f7
--- /dev/null
+++ b/arch/m32r/include/asm/switch_to.h
@@ -0,0 +1,51 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
+ * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
+ */
+#ifndef _ASM_M32R_SWITCH_TO_H
+#define _ASM_M32R_SWITCH_TO_H
+
+/*
+ * switch_to(prev, next) should switch from task `prev' to `next'
+ * `prev' will never be the same as `next'.
+ *
+ * `next' and `prev' should be struct task_struct, but it isn't always defined
+ */
+
+#if defined(CONFIG_FRAME_POINTER) || \
+ !defined(CONFIG_SCHED_OMIT_FRAME_POINTER)
+#define M32R_PUSH_FP " push fp\n"
+#define M32R_POP_FP " pop fp\n"
+#else
+#define M32R_PUSH_FP ""
+#define M32R_POP_FP ""
+#endif
+
+#define switch_to(prev, next, last) do { \
+ __asm__ __volatile__ ( \
+ " seth lr, #high(1f) \n" \
+ " or3 lr, lr, #low(1f) \n" \
+ " st lr, @%4 ; store old LR \n" \
+ " ld lr, @%5 ; load new LR \n" \
+ M32R_PUSH_FP \
+ " st sp, @%2 ; store old SP \n" \
+ " ld sp, @%3 ; load new SP \n" \
+ " push %1 ; store `prev' on new stack \n" \
+ " jmp lr \n" \
+ " .fillinsn \n" \
+ "1: \n" \
+ " pop %0 ; restore `__last' from new stack \n" \
+ M32R_POP_FP \
+ : "=r" (last) \
+ : "0" (prev), \
+ "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
+ "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
+ : "memory", "lr" \
+ ); \
+} while(0)
+
+#endif /* _ASM_M32R_SWITCH_TO_H */
diff --git a/arch/m32r/include/asm/system.h b/arch/m32r/include/asm/system.h
deleted file mode 100644
index 13c4679..0000000
--- a/arch/m32r/include/asm/system.h
+++ /dev/null
@@ -1,367 +0,0 @@
-#ifndef _ASM_M32R_SYSTEM_H
-#define _ASM_M32R_SYSTEM_H
-
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <linux/compiler.h>
-#include <linux/irqflags.h>
-#include <asm/assembler.h>
-
-#ifdef __KERNEL__
-
-/*
- * switch_to(prev, next) should switch from task `prev' to `next'
- * `prev' will never be the same as `next'.
- *
- * `next' and `prev' should be struct task_struct, but it isn't always defined
- */
-
-#if defined(CONFIG_FRAME_POINTER) || \
- !defined(CONFIG_SCHED_OMIT_FRAME_POINTER)
-#define M32R_PUSH_FP " push fp\n"
-#define M32R_POP_FP " pop fp\n"
-#else
-#define M32R_PUSH_FP ""
-#define M32R_POP_FP ""
-#endif
-
-#define switch_to(prev, next, last) do { \
- __asm__ __volatile__ ( \
- " seth lr, #high(1f) \n" \
- " or3 lr, lr, #low(1f) \n" \
- " st lr, @%4 ; store old LR \n" \
- " ld lr, @%5 ; load new LR \n" \
- M32R_PUSH_FP \
- " st sp, @%2 ; store old SP \n" \
- " ld sp, @%3 ; load new SP \n" \
- " push %1 ; store `prev' on new stack \n" \
- " jmp lr \n" \
- " .fillinsn \n" \
- "1: \n" \
- " pop %0 ; restore `__last' from new stack \n" \
- M32R_POP_FP \
- : "=r" (last) \
- : "0" (prev), \
- "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
- "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
- : "memory", "lr" \
- ); \
-} while(0)
-
-#define nop() __asm__ __volatile__ ("nop" : : )
-
-#define xchg(ptr, x) \
- ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
-#define xchg_local(ptr, x) \
- ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \
- sizeof(*(ptr))))
-
-extern void __xchg_called_with_bad_pointer(void);
-
-#ifdef CONFIG_CHIP_M32700_TS1
-#define DCACHE_CLEAR(reg0, reg1, addr) \
- "seth "reg1", #high(dcache_dummy); \n\t" \
- "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
- "lock "reg0", @"reg1"; \n\t" \
- "add3 "reg0", "addr", #0x1000; \n\t" \
- "ld "reg0", @"reg0"; \n\t" \
- "add3 "reg0", "addr", #0x2000; \n\t" \
- "ld "reg0", @"reg0"; \n\t" \
- "unlock "reg0", @"reg1"; \n\t"
- /* FIXME: This workaround code cannot handle kernel modules
- * correctly under SMP environment.
- */
-#else /* CONFIG_CHIP_M32700_TS1 */
-#define DCACHE_CLEAR(reg0, reg1, addr)
-#endif /* CONFIG_CHIP_M32700_TS1 */
-
-static __always_inline unsigned long
-__xchg(unsigned long x, volatile void *ptr, int size)
-{
- unsigned long flags;
- unsigned long tmp = 0;
-
- local_irq_save(flags);
-
- switch (size) {
-#ifndef CONFIG_SMP
- case 1:
- __asm__ __volatile__ (
- "ldb %0, @%2 \n\t"
- "stb %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 2:
- __asm__ __volatile__ (
- "ldh %0, @%2 \n\t"
- "sth %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 4:
- __asm__ __volatile__ (
- "ld %0, @%2 \n\t"
- "st %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
-#else /* CONFIG_SMP */
- case 4:
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%2")
- "lock %0, @%2; \n\t"
- "unlock %1, @%2; \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- break;
-#endif /* CONFIG_SMP */
- default:
- __xchg_called_with_bad_pointer();
- }
-
- local_irq_restore(flags);
-
- return (tmp);
-}
-
-static __always_inline unsigned long
-__xchg_local(unsigned long x, volatile void *ptr, int size)
-{
- unsigned long flags;
- unsigned long tmp = 0;
-
- local_irq_save(flags);
-
- switch (size) {
- case 1:
- __asm__ __volatile__ (
- "ldb %0, @%2 \n\t"
- "stb %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 2:
- __asm__ __volatile__ (
- "ldh %0, @%2 \n\t"
- "sth %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 4:
- __asm__ __volatile__ (
- "ld %0, @%2 \n\t"
- "st %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- default:
- __xchg_called_with_bad_pointer();
- }
-
- local_irq_restore(flags);
-
- return (tmp);
-}
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long
-__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
-{
- unsigned long flags;
- unsigned int retval;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%1")
- M32R_LOCK" %0, @%1; \n"
- " bne %0, %2, 1f; \n"
- M32R_UNLOCK" %3, @%1; \n"
- " bra 2f; \n"
- " .fillinsn \n"
- "1:"
- M32R_UNLOCK" %0, @%1; \n"
- " .fillinsn \n"
- "2:"
- : "=&r" (retval)
- : "r" (p), "r" (old), "r" (new)
- : "cbit", "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return retval;
-}
-
-static inline unsigned long
-__cmpxchg_local_u32(volatile unsigned int *p, unsigned int old,
- unsigned int new)
-{
- unsigned long flags;
- unsigned int retval;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%1")
- "ld %0, @%1; \n"
- " bne %0, %2, 1f; \n"
- "st %3, @%1; \n"
- " bra 2f; \n"
- " .fillinsn \n"
- "1:"
- "st %0, @%1; \n"
- " .fillinsn \n"
- "2:"
- : "=&r" (retval)
- : "r" (p), "r" (old), "r" (new)
- : "cbit", "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return retval;
-}
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
-#if 0 /* we don't have __cmpxchg_u64 */
- case 8:
- return __cmpxchg_u64(ptr, old, new);
-#endif /* 0 */
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr, o, n) \
- ((__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-
-#include <asm-generic/cmpxchg-local.h>
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_local_u32(ptr, old, new);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#endif /* __KERNEL__ */
-
-/*
- * Memory barrier.
- *
- * mb() prevents loads and stores being reordered across this point.
- * rmb() prevents loads being reordered across this point.
- * wmb() prevents stores being reordered across this point.
- */
-#define mb() barrier()
-#define rmb() mb()
-#define wmb() mb()
-
-/**
- * read_barrier_depends - Flush all pending reads that subsequents reads
- * depend on.
- *
- * No data-dependent reads from memory-like regions are ever reordered
- * over this barrier. All reads preceding this primitive are guaranteed
- * to access memory (but not necessarily other CPUs' caches) before any
- * reads following this primitive that depend on the data return by
- * any of the preceding reads. This primitive is much lighter weight than
- * rmb() on most CPUs, and is never heavier weight than is
- * rmb().
- *
- * These ordering constraints are respected by both the local CPU
- * and the compiler.
- *
- * Ordering is not guaranteed by anything other than these primitives,
- * not even by data dependencies. See the documentation for
- * memory_barrier() for examples and URLs to more information.
- *
- * For example, the following code would force ordering (the initial
- * value of "a" is zero, "b" is one, and "p" is "&a"):
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * b = 2;
- * memory_barrier();
- * p = &b; q = p;
- * read_barrier_depends();
- * d = *q;
- * </programlisting>
- *
- *
- * because the read of "*q" depends on the read of "p" and these
- * two reads are separated by a read_barrier_depends(). However,
- * the following code, with the same initial values for "a" and "b":
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * a = 2;
- * memory_barrier();
- * b = 3; y = b;
- * read_barrier_depends();
- * x = a;
- * </programlisting>
- *
- * does not enforce ordering, since there is no data dependency between
- * the read of "a" and the read of "b". Therefore, on some CPUs, such
- * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
- * in cases like this where there are no data dependencies.
- **/
-
-#define read_barrier_depends() do { } while (0)
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while (0)
-#define set_mb(var, value) do { var = value; barrier(); } while (0)
-#endif
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_M32R_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 17/29] Disintegrate asm/system.h for MIPS
March 07, 2012 09:04PM
Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells <[email protected]>
---

arch/mips/include/asm/atomic.h | 124 ++++++++++++++++++++
arch/mips/include/asm/exec.h | 17 +++
arch/mips/include/asm/processor.h | 6 +
arch/mips/include/asm/setup.h | 11 ++
arch/mips/include/asm/switch_to.h | 85 +++++++++++++
arch/mips/include/asm/system.h | 235 -------------------------------------
arch/mips/kernel/signal.c | 1
arch/mips/kernel/syscall.c | 1
arch/mips/mm/tlbex.c | 1
9 files changed, 246 insertions(+), 235 deletions(-)
create mode 100644 arch/mips/include/asm/exec.h
create mode 100644 arch/mips/include/asm/switch_to.h
delete mode 100644 arch/mips/include/asm/system.h

diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 802fa4d..bc153cb 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -18,6 +18,7 @@
#include <linux/types.h>
#include <asm/barrier.h>
#include <asm/cpu-features.h>
+#include <asm/cmpxchg.h>
#include <asm/war.h>

#define ATOMIC_INIT(i) { (i) }
@@ -298,6 +299,129 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
return result;
}

+static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
+{
+ __u32 retval;
+
+ smp_mb__before_llsc();
+
+ if (kernel_uses_llsc && R10000_LLSC_WAR) {
+ unsigned long dummy;
+
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ "1: ll %0, %3 # xchg_u32 \n"
+ " .set mips0 \n"
+ " move %2, %z4 \n"
+ " .set mips3 \n"
+ " sc %2, %1 \n"
+ " beqzl %2, 1b \n"
+ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+ } else if (kernel_uses_llsc) {
+ unsigned long dummy;
+
+ do {
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ " ll %0, %3 # xchg_u32 \n"
+ " .set mips0 \n"
+ " move %2, %z4 \n"
+ " .set mips3 \n"
+ " sc %2, %1 \n"
+ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+ } while (unlikely(!dummy));
+ } else {
+ unsigned long flags;
+
+ raw_local_irq_save(flags);
+ retval = *m;
+ *m = val;
+ raw_local_irq_restore(flags); /* implies memory barrier */
+ }
+
+ smp_llsc_mb();
+
+ return retval;
+}
+
+#ifdef CONFIG_64BIT
+static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
+{
+ __u64 retval;
+
+ smp_mb__before_llsc();
+
+ if (kernel_uses_llsc && R10000_LLSC_WAR) {
+ unsigned long dummy;
+
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ "1: lld %0, %3 # xchg_u64 \n"
+ " move %2, %z4 \n"
+ " scd %2, %1 \n"
+ " beqzl %2, 1b \n"
+ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+ } else if (kernel_uses_llsc) {
+ unsigned long dummy;
+
+ do {
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ " lld %0, %3 # xchg_u64 \n"
+ " move %2, %z4 \n"
+ " scd %2, %1 \n"
+ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+ } while (unlikely(!dummy));
+ } else {
+ unsigned long flags;
+
+ raw_local_irq_save(flags);
+ retval = *m;
+ *m = val;
+ raw_local_irq_restore(flags); /* implies memory barrier */
+ }
+
+ smp_llsc_mb();
+
+ return retval;
+}
+#else
+extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val);
+#define __xchg_u64 __xchg_u64_unsupported_on_32bit_kernels
+#endif
+
+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+{
+ switch (size) {
+ case 4:
+ return __xchg_u32(ptr, x);
+ case 8:
+ return __xchg_u64(ptr, x);
+ }
+
+ return x;
+}
+
+#define xchg(ptr, x) \
+({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) & ~0xc); \
+ \
+ ((__typeof__(*(ptr))) \
+ __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))); \
+})
+
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))

diff --git a/arch/mips/include/asm/exec.h b/arch/mips/include/asm/exec.h
new file mode 100644
index 0000000..c1f6afa
--- /dev/null
+++ b/arch/mips/include/asm/exec.h
@@ -0,0 +1,17 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
+ * Copyright (C) 1996 by Paul M. Antoine
+ * Copyright (C) 1999 Silicon Graphics
+ * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ */
+#ifndef _ASM_EXEC_H
+#define _ASM_EXEC_H
+
+extern unsigned long arch_align_stack(unsigned long sp);
+
+#endif /* _ASM_EXEC_H */
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 9903e4b..20e9dcf 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -355,6 +355,12 @@ unsigned long get_wchan(struct task_struct *p);
#define ARCH_HAS_PREFETCHW
#define prefetchw(x) __builtin_prefetch((x), 1, 1)

+/*
+ * See Documentation/scheduler/sched-arch.txt; prevents deadlock on SMP
+ * systems.
+ */
+#define __ARCH_WANT_UNLOCKED_CTXSW
+
#endif

#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/mips/include/asm/setup.h b/arch/mips/include/asm/setup.h
index 50511aa..6dce6d8 100644
--- a/arch/mips/include/asm/setup.h
+++ b/arch/mips/include/asm/setup.h
@@ -5,6 +5,17 @@

#ifdef __KERNEL__
extern void setup_early_printk(void);
+
+extern void set_handler(unsigned long offset, void *addr, unsigned long len);
+extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len);
+
+typedef void (*vi_handler_t)(void);
+extern void *set_vi_handler(int n, vi_handler_t addr);
+
+extern void *set_except_vector(int n, void *addr);
+extern unsigned long ebase;
+extern void per_cpu_trap_init(void);
+
#endif /* __KERNEL__ */

#endif /* __SETUP_H */
diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
new file mode 100644
index 0000000..5d33621
--- /dev/null
+++ b/arch/mips/include/asm/switch_to.h
@@ -0,0 +1,85 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
+ * Copyright (C) 1996 by Paul M. Antoine
+ * Copyright (C) 1999 Silicon Graphics
+ * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ */
+#ifndef _ASM_SWITCH_TO_H
+#define _ASM_SWITCH_TO_H
+
+#include <asm/cpu-features.h>
+#include <asm/watch.h>
+#include <asm/dsp.h>
+
+struct task_struct;
+
+/*
+ * switch_to(n) should switch tasks to task nr n, first
+ * checking that n isn't the current task, in which case it does nothing.
+ */
+extern asmlinkage void *resume(void *last, void *next, void *next_ti);
+
+extern unsigned int ll_bit;
+extern struct task_struct *ll_task;
+
+#ifdef CONFIG_MIPS_MT_FPAFF
+
+/*
+ * Handle the scheduler resume end of FPU affinity management. We do this
+ * inline to try to keep the overhead down. If we have been forced to run on
+ * a "CPU" with an FPU because of a previous high level of FP computation,
+ * but did not actually use the FPU during the most recent time-slice (CU1
+ * isn't set), we undo the restriction on cpus_allowed.
+ *
+ * We're not calling set_cpus_allowed() here, because we have no need to
+ * force prompt migration - we're already switching the current CPU to a
+ * different thread.
+ */
+
+#define __mips_mt_fpaff_switch_to(prev) \
+do { \
+ struct thread_info *__prev_ti = task_thread_info(prev); \
+ \
+ if (cpu_has_fpu && \
+ test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
+ (!(KSTK_STATUS(prev) & ST0_CU1))) { \
+ clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
+ prev->cpus_allowed = prev->thread.user_cpus_allowed; \
+ } \
+ next->thread.emulated_fp = 0; \
+} while(0)
+
+#else
+#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
+#endif
+
+#define __clear_software_ll_bit() \
+do { \
+ if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \
+ ll_bit = 0; \
+} while (0)
+
+#define switch_to(prev, next, last) \
+do { \
+ __mips_mt_fpaff_switch_to(prev); \
+ if (cpu_has_dsp) \
+ __save_dsp(prev); \
+ __clear_software_ll_bit(); \
+ (last) = resume(prev, next, task_thread_info(next)); \
+} while (0)
+
+#define finish_arch_switch(prev) \
+do { \
+ if (cpu_has_dsp) \
+ __restore_dsp(current); \
+ if (cpu_has_userlocal) \
+ write_c0_userlocal(current_thread_info()->tp_value); \
+ __restore_watch(); \
+} while (0)
+
+#endif /* _ASM_SWITCH_TO_H */
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
deleted file mode 100644
index 6018c80..0000000
--- a/arch/mips/include/asm/system.h
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
- * Copyright (C) 1996 by Paul M. Antoine
- * Copyright (C) 1999 Silicon Graphics
- * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.
- */
-#ifndef _ASM_SYSTEM_H
-#define _ASM_SYSTEM_H
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/irqflags.h>
-
-#include <asm/addrspace.h>
-#include <asm/barrier.h>
-#include <asm/cmpxchg.h>
-#include <asm/cpu-features.h>
-#include <asm/dsp.h>
-#include <asm/watch.h>
-#include <asm/war.h>
-
-
-/*
- * switch_to(n) should switch tasks to task nr n, first
- * checking that n isn't the current task, in which case it does nothing.
- */
-extern asmlinkage void *resume(void *last, void *next, void *next_ti);
-
-struct task_struct;
-
-extern unsigned int ll_bit;
-extern struct task_struct *ll_task;
-
-#ifdef CONFIG_MIPS_MT_FPAFF
-
-/*
- * Handle the scheduler resume end of FPU affinity management. We do this
- * inline to try to keep the overhead down. If we have been forced to run on
- * a "CPU" with an FPU because of a previous high level of FP computation,
- * but did not actually use the FPU during the most recent time-slice (CU1
- * isn't set), we undo the restriction on cpus_allowed.
- *
- * We're not calling set_cpus_allowed() here, because we have no need to
- * force prompt migration - we're already switching the current CPU to a
- * different thread.
- */
-
-#define __mips_mt_fpaff_switch_to(prev) \
-do { \
- struct thread_info *__prev_ti = task_thread_info(prev); \
- \
- if (cpu_has_fpu && \
- test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
- (!(KSTK_STATUS(prev) & ST0_CU1))) { \
- clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
- prev->cpus_allowed = prev->thread.user_cpus_allowed; \
- } \
- next->thread.emulated_fp = 0; \
-} while(0)
-
-#else
-#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
-#endif
-
-#define __clear_software_ll_bit() \
-do { \
- if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \
- ll_bit = 0; \
-} while (0)
-
-#define switch_to(prev, next, last) \
-do { \
- __mips_mt_fpaff_switch_to(prev); \
- if (cpu_has_dsp) \
- __save_dsp(prev); \
- __clear_software_ll_bit(); \
- (last) = resume(prev, next, task_thread_info(next)); \
-} while (0)
-
-#define finish_arch_switch(prev) \
-do { \
- if (cpu_has_dsp) \
- __restore_dsp(current); \
- if (cpu_has_userlocal) \
- write_c0_userlocal(current_thread_info()->tp_value); \
- __restore_watch(); \
-} while (0)
-
-static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
-{
- __u32 retval;
-
- smp_mb__before_llsc();
-
- if (kernel_uses_llsc && R10000_LLSC_WAR) {
- unsigned long dummy;
-
- __asm__ __volatile__(
- " .set mips3 \n"
- "1: ll %0, %3 # xchg_u32 \n"
- " .set mips0 \n"
- " move %2, %z4 \n"
- " .set mips3 \n"
- " sc %2, %1 \n"
- " beqzl %2, 1b \n"
- " .set mips0 \n"
- : "=&r" (retval), "=m" (*m), "=&r" (dummy)
- : "R" (*m), "Jr" (val)
- : "memory");
- } else if (kernel_uses_llsc) {
- unsigned long dummy;
-
- do {
- __asm__ __volatile__(
- " .set mips3 \n"
- " ll %0, %3 # xchg_u32 \n"
- " .set mips0 \n"
- " move %2, %z4 \n"
- " .set mips3 \n"
- " sc %2, %1 \n"
- " .set mips0 \n"
- : "=&r" (retval), "=m" (*m), "=&r" (dummy)
- : "R" (*m), "Jr" (val)
- : "memory");
- } while (unlikely(!dummy));
- } else {
- unsigned long flags;
-
- raw_local_irq_save(flags);
- retval = *m;
- *m = val;
- raw_local_irq_restore(flags); /* implies memory barrier */
- }
-
- smp_llsc_mb();
-
- return retval;
-}
-
-#ifdef CONFIG_64BIT
-static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
-{
- __u64 retval;
-
- smp_mb__before_llsc();
-
- if (kernel_uses_llsc && R10000_LLSC_WAR) {
- unsigned long dummy;
-
- __asm__ __volatile__(
- " .set mips3 \n"
- "1: lld %0, %3 # xchg_u64 \n"
- " move %2, %z4 \n"
- " scd %2, %1 \n"
- " beqzl %2, 1b \n"
- " .set mips0 \n"
- : "=&r" (retval), "=m" (*m), "=&r" (dummy)
- : "R" (*m), "Jr" (val)
- : "memory");
- } else if (kernel_uses_llsc) {
- unsigned long dummy;
-
- do {
- __asm__ __volatile__(
- " .set mips3 \n"
- " lld %0, %3 # xchg_u64 \n"
- " move %2, %z4 \n"
- " scd %2, %1 \n"
- " .set mips0 \n"
- : "=&r" (retval), "=m" (*m), "=&r" (dummy)
- : "R" (*m), "Jr" (val)
- : "memory");
- } while (unlikely(!dummy));
- } else {
- unsigned long flags;
-
- raw_local_irq_save(flags);
- retval = *m;
- *m = val;
- raw_local_irq_restore(flags); /* implies memory barrier */
- }
-
- smp_llsc_mb();
-
- return retval;
-}
-#else
-extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val);
-#define __xchg_u64 __xchg_u64_unsupported_on_32bit_kernels
-#endif
-
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-{
- switch (size) {
- case 4:
- return __xchg_u32(ptr, x);
- case 8:
- return __xchg_u64(ptr, x);
- }
-
- return x;
-}
-
-#define xchg(ptr, x) \
-({ \
- BUILD_BUG_ON(sizeof(*(ptr)) & ~0xc); \
- \
- ((__typeof__(*(ptr))) \
- __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))); \
-})
-
-extern void set_handler(unsigned long offset, void *addr, unsigned long len);
-extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len);
-
-typedef void (*vi_handler_t)(void);
-extern void *set_vi_handler(int n, vi_handler_t addr);
-
-extern void *set_except_vector(int n, void *addr);
-extern unsigned long ebase;
-extern void per_cpu_trap_init(void);
-
-/*
- * See include/asm-ia64/system.h; prevents deadlock on SMP
- * systems.
- */
-#define __ARCH_WANT_UNLOCKED_CTXSW
-
-extern unsigned long arch_align_stack(unsigned long sp);
-
-#endif /* _ASM_SYSTEM_H */
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index f852400..185ca00 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -34,6 +34,7 @@
#include <asm/cpu-features.h>
#include <asm/war.h>
#include <asm/vdso.h>
+#include <asm/dsp.h>

#include "signal-common.h"

diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index d027657..b08220c 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -37,6 +37,7 @@
#include <asm/shmparam.h>
#include <asm/sysmips.h>
#include <asm/uaccess.h>
+#include <asm/switch_to.h>

/*
* For historic reasons the pipe(2) syscall on MIPS has an unusual calling
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index e06370f..0bc485b 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -32,6 +32,7 @@
#include <asm/pgtable.h>
#include <asm/war.h>
#include <asm/uasm.h>
+#include <asm/setup.h>

/*
* TLB load/store/modify handlers.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 18/29] Disintegrate asm/system.h for MN10300
March 07, 2012 09:04PM
Disintegrate asm/system.h for MN10300.

Signed-off-by: David Howells <[email protected]>
---

arch/mn10300/include/asm/barrier.h | 35 ++++++++++++
arch/mn10300/include/asm/exec.h | 16 +++++
arch/mn10300/include/asm/switch_to.h | 49 ++++++++++++++++
arch/mn10300/include/asm/system.h | 102 ----------------------------------
arch/mn10300/kernel/smp-low.S | 1
5 files changed, 101 insertions(+), 102 deletions(-)
create mode 100644 arch/mn10300/include/asm/barrier.h
create mode 100644 arch/mn10300/include/asm/exec.h
create mode 100644 arch/mn10300/include/asm/switch_to.h
delete mode 100644 arch/mn10300/include/asm/system.h

diff --git a/arch/mn10300/include/asm/barrier.h b/arch/mn10300/include/asm/barrier.h
new file mode 100644
index 0000000..9f2e160
--- /dev/null
+++ b/arch/mn10300/include/asm/barrier.h
@@ -0,0 +1,35 @@
+/* MN10300 memory barrier definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_BARRIER_H
+#define _ASM_BARRIER_H
+
+#define mb() asm volatile ("": : :"memory")
+#define rmb() mb()
+#define wmb() asm volatile ("": : :"memory")
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define set_mb(var, value) do { xchg(&var, value); } while (0)
+#else /* CONFIG_SMP */
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#endif /* CONFIG_SMP */
+
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+#define read_barrier_depends() do {} while (0)
+#define smp_read_barrier_depends() do {} while (0)
+
+#endif /* _ASM_BARRIER_H */
diff --git a/arch/mn10300/include/asm/exec.h b/arch/mn10300/include/asm/exec.h
new file mode 100644
index 0000000..c74e367
--- /dev/null
+++ b/arch/mn10300/include/asm/exec.h
@@ -0,0 +1,16 @@
+/* MN10300 process execution definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_EXEC_H
+#define _ASM_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _ASM_EXEC_H */
diff --git a/arch/mn10300/include/asm/switch_to.h b/arch/mn10300/include/asm/switch_to.h
new file mode 100644
index 0000000..393d311
--- /dev/null
+++ b/arch/mn10300/include/asm/switch_to.h
@@ -0,0 +1,49 @@
+/* MN10300 task switching definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells ([email protected])
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SWITCH_TO_H
+#define _ASM_SWITCH_TO_H
+
+#include <asm/barrier.h>
+
+struct task_struct;
+struct thread_struct;
+
+#if !defined(CONFIG_LAZY_SAVE_FPU)
+struct fpu_state_struct;
+extern asmlinkage void fpu_save(struct fpu_state_struct *);
+#define switch_fpu(prev, next) \
+ do { \
+ if ((prev)->thread.fpu_flags & THREAD_HAS_FPU) { \
+ (prev)->thread.fpu_flags &= ~THREAD_HAS_FPU; \
+ (prev)->thread.uregs->epsw &= ~EPSW_FE; \
+ fpu_save(&(prev)->thread.fpu_state); \
+ } \
+ } while (0)
+#else
+#define switch_fpu(prev, next) do {} while (0)
+#endif
+
+/* context switching is now performed out-of-line in switch_to.S */
+extern asmlinkage
+struct task_struct *__switch_to(struct thread_struct *prev,
+ struct thread_struct *next,
+ struct task_struct *prev_task);
+
+#define switch_to(prev, next, last) \
+do { \
+ switch_fpu(prev, next); \
+ current->thread.wchan = (u_long) __builtin_return_address(0); \
+ (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
+ mb(); \
+ current->thread.wchan = 0; \
+} while (0)
+
+#endif /* _ASM_SWITCH_TO_H */
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h
deleted file mode 100644
index 94b4c5e..0000000
--- a/arch/mn10300/include/asm/system.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/* MN10300 System definitions
- *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells ([email protected])
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-#ifndef _ASM_SYSTEM_H
-#define _ASM_SYSTEM_H
-
-#include <asm/cpu-regs.h>
-#include <asm/intctl-regs.h>
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-
-#include <linux/kernel.h>
-#include <linux/irqflags.h>
-#include <linux/atomic.h>
-
-#if !defined(CONFIG_LAZY_SAVE_FPU)
-struct fpu_state_struct;
-extern asmlinkage void fpu_save(struct fpu_state_struct *);
-#define switch_fpu(prev, next) \
- do { \
- if ((prev)->thread.fpu_flags & THREAD_HAS_FPU) { \
- (prev)->thread.fpu_flags &= ~THREAD_HAS_FPU; \
- (prev)->thread.uregs->epsw &= ~EPSW_FE; \
- fpu_save(&(prev)->thread.fpu_state); \
- } \
- } while (0)
-#else
-#define switch_fpu(prev, next) do {} while (0)
-#endif
-
-struct task_struct;
-struct thread_struct;
-
-extern asmlinkage
-struct task_struct *__switch_to(struct thread_struct *prev,
- struct thread_struct *next,
- struct task_struct *prev_task);
-
-/* context switching is now performed out-of-line in switch_to.S */
-#define switch_to(prev, next, last) \
-do { \
- switch_fpu(prev, next); \
- current->thread.wchan = (u_long) __builtin_return_address(0); \
- (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
- mb(); \
- current->thread.wchan = 0; \
-} while (0)
-
-#define arch_align_stack(x) (x)
-
-#define nop() asm volatile ("nop")
-
-/*
- * Force strict CPU ordering.
- * And yes, this is required on UP too when we're talking
- * to devices.
- *
- * For now, "wmb()" doesn't actually do anything, as all
- * Intel CPU's follow what Intel calls a *Processor Order*,
- * in which all writes are seen in the program order even
- * outside the CPU.
- *
- * I expect future Intel CPU's to have a weaker ordering,
- * but I'd also expect them to finally get their act together
- * and add some real memory barriers if so.
- *
- * Some non intel clones support out of order store. wmb() ceases to be a
- * nop for these.
- */
-
-#define mb() asm volatile ("": : :"memory")
-#define rmb() mb()
-#define wmb() asm volatile ("": : :"memory")
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define set_mb(var, value) do { xchg(&var, value); } while (0)
-#else /* CONFIG_SMP */
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-#endif /* CONFIG_SMP */
-
-#define set_wmb(var, value) do { var = value; wmb(); } while (0)
-
-#define read_barrier_depends() do {} while (0)
-#define smp_read_barrier_depends() do {} while (0)
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __KERNEL__ */
-#endif /* _ASM_SYSTEM_H */
diff --git a/arch/mn10300/kernel/smp-low.S b/arch/mn10300/kernel/smp-low.S
index f1845e9..71f1b2f 100644
--- a/arch/mn10300/kernel/smp-low.S
+++ b/arch/mn10300/kernel/smp-low.S
@@ -15,6 +15,7 @@
#include <asm/smp.h>
#include <asm/thread_info.h>
#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
#include <proc/smp-regs.h>
#include <asm/asm-offsets.h>
#include <asm/frame.inc>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 19/29] Disintegrate asm/system.h for OpenRISC
March 07, 2012 09:05PM
Disintegrate asm/system.h for OpenRISC. Not compiled.

Signed-off-by: David Howells <[email protected]>
---

arch/openrisc/include/asm/system.h | 35 -----------------------------------
1 files changed, 0 insertions(+), 35 deletions(-)
delete mode 100644 arch/openrisc/include/asm/system.h

diff --git a/arch/openrisc/include/asm/system.h b/arch/openrisc/include/asm/system.h
deleted file mode 100644
index cf65888..0000000
--- a/arch/openrisc/include/asm/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * OpenRISC Linux
- *
- * Linux architectural port borrowing liberally from similar works of
- * others. All original copyrights apply as per the original source
- * declaration.
- *
- * OpenRISC implementation:
- * Copyright (C) 2003 Matjaz Breskvar <[email protected]>
- * Copyright (C) 2010-2011 Jonas Bonn <[email protected]>
- * et al.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __ASM_OPENRISC_SYSTEM_H
-#define __ASM_OPENRISC_SYSTEM_H
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-
-#include <asm/spr.h>
-#include <asm-generic/system.h>
-
-/* We probably need this definition, but the generic system.h provides it
- * and it's not used on our arch anyway...
- */
-/*#define nop() __asm__ __volatile__ ("l.nop"::)*/
-
-#endif /* __ASSEMBLY__ */
-#endif /* __KERNEL__ */
-#endif /* __ASM_OPENRISC_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 20/29] Disintegrate asm/system.h for PA-RISC
March 07, 2012 09:05PM
Disintegrate asm/system.h for PA-RISC.

Signed-off-by: David Howells <[email protected]>
---

arch/parisc/include/asm/barrier.h | 35 +++++++
arch/parisc/include/asm/delay.h | 2
arch/parisc/include/asm/dma.h | 1
arch/parisc/include/asm/exec.h | 6 +
arch/parisc/include/asm/ldcw.h | 48 +++++++++
arch/parisc/include/asm/processor.h | 1
arch/parisc/include/asm/psw.h | 41 ++++++++
arch/parisc/include/asm/special_insns.h | 40 ++++++++
arch/parisc/include/asm/switch_to.h | 12 ++
arch/parisc/include/asm/system.h | 165 -------------------------------
arch/parisc/include/asm/thread_info.h | 1
11 files changed, 185 insertions(+), 167 deletions(-)
create mode 100644 arch/parisc/include/asm/barrier.h
create mode 100644 arch/parisc/include/asm/exec.h
create mode 100644 arch/parisc/include/asm/ldcw.h
create mode 100644 arch/parisc/include/asm/special_insns.h
create mode 100644 arch/parisc/include/asm/switch_to.h
delete mode 100644 arch/parisc/include/asm/system.h

diff --git a/arch/parisc/include/asm/barrier.h b/arch/parisc/include/asm/barrier.h
new file mode 100644
index 0000000..e77d834
--- /dev/null
+++ b/arch/parisc/include/asm/barrier.h
@@ -0,0 +1,35 @@
+#ifndef __PARISC_BARRIER_H
+#define __PARISC_BARRIER_H
+
+/*
+** This is simply the barrier() macro from linux/kernel.h but when serial.c
+** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
+** hasn't yet been included yet so it fails, thus repeating the macro here.
+**
+** PA-RISC architecture allows for weakly ordered memory accesses although
+** none of the processors use it. There is a strong ordered bit that is
+** set in the O-bit of the page directory entry. Operating systems that
+** can not tolerate out of order accesses should set this bit when mapping
+** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
+** of the processor implemented the PSW O-bit). The PCX-W ERS states that
+** the TLB O-bit is not implemented so the page directory does not need to
+** have the O-bit set when mapping pages (section 3.1). This section also
+** states that the PSW Y, Z, G, and O bits are not implemented.
+** So it looks like nothing needs to be done for parisc-linux (yet).
+** (thanks to chada for the above comment -ggg)
+**
+** The __asm__ op below simple prevents gcc/ld from reordering
+** instructions across the mb() "call".
+*/
+#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
+#define rmb() mb()
+#define wmb() mb()
+#define smp_mb() mb()
+#define smp_rmb() mb()
+#define smp_wmb() mb()
+#define smp_read_barrier_depends() do { } while(0)
+#define read_barrier_depends() do { } while(0)
+
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+
+#endif /* __PARISC_BARRIER_H */
diff --git a/arch/parisc/include/asm/delay.h b/arch/parisc/include/asm/delay.h
index 7a75e98..912ee7e 100644
--- a/arch/parisc/include/asm/delay.h
+++ b/arch/parisc/include/asm/delay.h
@@ -1,7 +1,7 @@
#ifndef _PARISC_DELAY_H
#define _PARISC_DELAY_H

-#include <asm/system.h> /* for mfctl() */
+#include <asm/special_insns.h> /* for mfctl() */
#include <asm/processor.h> /* for boot_cpu_data */


diff --git a/arch/parisc/include/asm/dma.h b/arch/parisc/include/asm/dma.h
index f7a18f9..fd48ae2 100644
--- a/arch/parisc/include/asm/dma.h
+++ b/arch/parisc/include/asm/dma.h
@@ -9,7 +9,6 @@
#define _ASM_DMA_H

#include <asm/io.h> /* need byte IO */
-#include <asm/system.h>

#define dma_outb outb
#define dma_inb inb
diff --git a/arch/parisc/include/asm/exec.h b/arch/parisc/include/asm/exec.h
new file mode 100644
index 0000000..6bb5af7
--- /dev/null
+++ b/arch/parisc/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef __PARISC_EXEC_H
+#define __PARISC_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __PARISC_EXEC_H */
diff --git a/arch/parisc/include/asm/ldcw.h b/arch/parisc/include/asm/ldcw.h
new file mode 100644
index 0000000..d2d11b7
--- /dev/null
+++ b/arch/parisc/include/asm/ldcw.h
@@ -0,0 +1,48 @@
+#ifndef __PARISC_LDCW_H
+#define __PARISC_LDCW_H
+
+#ifndef CONFIG_PA20
+/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
+ and GCC only guarantees 8-byte alignment for stack locals, we can't
+ be assured of 16-byte alignment for atomic lock data even if we
+ specify "__attribute ((aligned(16)))" in the type declaration. So,
+ we use a struct containing an array of four ints for the atomic lock
+ type and dynamically select the 16-byte aligned int from the array
+ for the semaphore. */
+
+#define __PA_LDCW_ALIGNMENT 16
+#define __ldcw_align(a) ({ \
+ unsigned long __ret = (unsigned long) &(a)->lock[0]; \
+ __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
+ & ~(__PA_LDCW_ALIGNMENT - 1); \
+ (volatile unsigned int *) __ret; \
+})
+#define __LDCW "ldcw"
+
+#else /*CONFIG_PA20*/
+/* From: "Jim Hull" <jim.hull of hp.com>
+ I've attached a summary of the change, but basically, for PA 2.0, as
+ long as the ",CO" (coherent operation) completer is specified, then the
+ 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
+ they only require "natural" alignment (4-byte for ldcw, 8-byte for
+ ldcd). */
+
+#define __PA_LDCW_ALIGNMENT 4
+#define __ldcw_align(a) (&(a)->slock)
+#define __LDCW "ldcw,co"
+
+#endif /*!CONFIG_PA20*/
+
+/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
+#define __ldcw(a) ({ \
+ unsigned __ret; \
+ __asm__ __volatile__(__LDCW " 0(%2),%0" \
+ : "=r" (__ret), "+m" (*(a)) : "r" (a)); \
+ __ret; \
+})
+
+#ifdef CONFIG_SMP
+# define __lock_aligned __attribute__((__section__(".data..lock_aligned")))
+#endif
+
+#endif /* __PARISC_LDCW_H */
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index 1f9e484..acdf4ca 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -168,6 +168,7 @@ struct thread_struct {
* Return saved PC of a blocked thread. This is used by ps mostly.
*/

+struct task_struct;
unsigned long thread_saved_pc(struct task_struct *t);
void show_trace(struct task_struct *task, unsigned long *stack);

diff --git a/arch/parisc/include/asm/psw.h b/arch/parisc/include/asm/psw.h
index 5a3e23c..ad69a35 100644
--- a/arch/parisc/include/asm/psw.h
+++ b/arch/parisc/include/asm/psw.h
@@ -59,4 +59,45 @@
#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
#define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)

+#ifndef __ASSEMBLY__
+
+/* The program status word as bitfields. */
+struct pa_psw {
+ unsigned int y:1;
+ unsigned int z:1;
+ unsigned int rv:2;
+ unsigned int w:1;
+ unsigned int e:1;
+ unsigned int s:1;
+ unsigned int t:1;
+
+ unsigned int h:1;
+ unsigned int l:1;
+ unsigned int n:1;
+ unsigned int x:1;
+ unsigned int b:1;
+ unsigned int c:1;
+ unsigned int v:1;
+ unsigned int m:1;
+
+ unsigned int cb:8;
+
+ unsigned int o:1;
+ unsigned int g:1;
+ unsigned int f:1;
+ unsigned int r:1;
+ unsigned int q:1;
+ unsigned int p:1;
+ unsigned int d:1;
+ unsigned int i:1;
+};
+
+#ifdef CONFIG_64BIT
+#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
+#else
+#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
+#endif
+
+#endif /* !__ASSEMBLY__ */
+
#endif
diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h
new file mode 100644
index 0000000..d306b75
--- /dev/null
+++ b/arch/parisc/include/asm/special_insns.h
@@ -0,0 +1,40 @@
+#ifndef __PARISC_SPECIAL_INSNS_H
+#define __PARISC_SPECIAL_INSNS_H
+
+#define mfctl(reg) ({ \
+ unsigned long cr; \
+ __asm__ __volatile__( \
+ "mfctl " #reg ",%0" : \
+ "=r" (cr) \
+ ); \
+ cr; \
+})
+
+#define mtctl(gr, cr) \
+ __asm__ __volatile__("mtctl %0,%1" \
+ : /* no outputs */ \
+ : "r" (gr), "i" (cr) : "memory")
+
+/* these are here to de-mystefy the calling code, and to provide hooks */
+/* which I needed for debugging EIEM problems -PB */
+#define get_eiem() mfctl(15)
+static inline void set_eiem(unsigned long val)
+{
+ mtctl(val, 15);
+}
+
+#define mfsp(reg) ({ \
+ unsigned long cr; \
+ __asm__ __volatile__( \
+ "mfsp " #reg ",%0" : \
+ "=r" (cr) \
+ ); \
+ cr; \
+})
+
+#define mtsp(gr, cr) \
+ __asm__ __volatile__("mtsp %0,%1" \
+ : /* no outputs */ \
+ : "r" (gr), "i" (cr) : "memory")
+
+#endif /* __PARISC_SPECIAL_INSNS_H */
diff --git a/arch/parisc/include/asm/switch_to.h b/arch/parisc/include/asm/switch_to.h
new file mode 100644
index 0000000..8ed8fea
--- /dev/null
+++ b/arch/parisc/include/asm/switch_to.h
@@ -0,0 +1,12 @@
+#ifndef __PARISC_SWITCH_TO_H
+#define __PARISC_SWITCH_TO_H
+
+struct task_struct;
+
+extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
+
+#define switch_to(prev, next, last) do { \
+ (last) = _switch_to(prev, next); \
+} while(0)
+
+#endif /* __PARISC_SWITCH_TO_H */
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
deleted file mode 100644
index b19e63a..0000000
--- a/arch/parisc/include/asm/system.h
+++ /dev/null
@@ -1,165 +0,0 @@
-#ifndef __PARISC_SYSTEM_H
-#define __PARISC_SYSTEM_H
-
-#include <linux/irqflags.h>
-
-/* The program status word as bitfields. */
-struct pa_psw {
- unsigned int y:1;
- unsigned int z:1;
- unsigned int rv:2;
- unsigned int w:1;
- unsigned int e:1;
- unsigned int s:1;
- unsigned int t:1;
-
- unsigned int h:1;
- unsigned int l:1;
- unsigned int n:1;
- unsigned int x:1;
- unsigned int b:1;
- unsigned int c:1;
- unsigned int v:1;
- unsigned int m:1;
-
- unsigned int cb:8;
-
- unsigned int o:1;
- unsigned int g:1;
- unsigned int f:1;
- unsigned int r:1;
- unsigned int q:1;
- unsigned int p:1;
- unsigned int d:1;
- unsigned int i:1;
-};
-
-#ifdef CONFIG_64BIT
-#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
-#else
-#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
-#endif
-
-struct task_struct;
-
-extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
-
-#define switch_to(prev, next, last) do { \
- (last) = _switch_to(prev, next); \
-} while(0)
-
-#define mfctl(reg) ({ \
- unsigned long cr; \
- __asm__ __volatile__( \
- "mfctl " #reg ",%0" : \
- "=r" (cr) \
- ); \
- cr; \
-})
-
-#define mtctl(gr, cr) \
- __asm__ __volatile__("mtctl %0,%1" \
- : /* no outputs */ \
- : "r" (gr), "i" (cr) : "memory")
-
-/* these are here to de-mystefy the calling code, and to provide hooks */
-/* which I needed for debugging EIEM problems -PB */
-#define get_eiem() mfctl(15)
-static inline void set_eiem(unsigned long val)
-{
- mtctl(val, 15);
-}
-
-#define mfsp(reg) ({ \
- unsigned long cr; \
- __asm__ __volatile__( \
- "mfsp " #reg ",%0" : \
- "=r" (cr) \
- ); \
- cr; \
-})
-
-#define mtsp(gr, cr) \
- __asm__ __volatile__("mtsp %0,%1" \
- : /* no outputs */ \
- : "r" (gr), "i" (cr) : "memory")
-
-
-/*
-** This is simply the barrier() macro from linux/kernel.h but when serial.c
-** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
-** hasn't yet been included yet so it fails, thus repeating the macro here.
-**
-** PA-RISC architecture allows for weakly ordered memory accesses although
-** none of the processors use it. There is a strong ordered bit that is
-** set in the O-bit of the page directory entry. Operating systems that
-** can not tolerate out of order accesses should set this bit when mapping
-** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
-** of the processor implemented the PSW O-bit). The PCX-W ERS states that
-** the TLB O-bit is not implemented so the page directory does not need to
-** have the O-bit set when mapping pages (section 3.1). This section also
-** states that the PSW Y, Z, G, and O bits are not implemented.
-** So it looks like nothing needs to be done for parisc-linux (yet).
-** (thanks to chada for the above comment -ggg)
-**
-** The __asm__ op below simple prevents gcc/ld from reordering
-** instructions across the mb() "call".
-*/
-#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
-#define rmb() mb()
-#define wmb() mb()
-#define smp_mb() mb()
-#define smp_rmb() mb()
-#define smp_wmb() mb()
-#define smp_read_barrier_depends() do { } while(0)
-#define read_barrier_depends() do { } while(0)
-
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#ifndef CONFIG_PA20
-/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
- and GCC only guarantees 8-byte alignment for stack locals, we can't
- be assured of 16-byte alignment for atomic lock data even if we
- specify "__attribute ((aligned(16)))" in the type declaration. So,
- we use a struct containing an array of four ints for the atomic lock
- type and dynamically select the 16-byte aligned int from the array
- for the semaphore. */
-
-#define __PA_LDCW_ALIGNMENT 16
-#define __ldcw_align(a) ({ \
- unsigned long __ret = (unsigned long) &(a)->lock[0]; \
- __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
- & ~(__PA_LDCW_ALIGNMENT - 1); \
- (volatile unsigned int *) __ret; \
-})
-#define __LDCW "ldcw"
-
-#else /*CONFIG_PA20*/
-/* From: "Jim Hull" <jim.hull of hp.com>
- I've attached a summary of the change, but basically, for PA 2.0, as
- long as the ",CO" (coherent operation) completer is specified, then the
- 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
- they only require "natural" alignment (4-byte for ldcw, 8-byte for
- ldcd). */
-
-#define __PA_LDCW_ALIGNMENT 4
-#define __ldcw_align(a) (&(a)->slock)
-#define __LDCW "ldcw,co"
-
-#endif /*!CONFIG_PA20*/
-
-/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
-#define __ldcw(a) ({ \
- unsigned __ret; \
- __asm__ __volatile__(__LDCW " 0(%2),%0" \
- : "=r" (__ret), "+m" (*(a)) : "r" (a)); \
- __ret; \
-})
-
-#ifdef CONFIG_SMP
-# define __lock_aligned __attribute__((__section__(".data..lock_aligned")))
-#endif
-
-#define arch_align_stack(x) (x)
-
-#endif
diff --git a/arch/parisc/include/asm/thread_info.h b/arch/parisc/include/asm/thread_info.h
index 6d9c7c7..83ae7dd 100644
--- a/arch/parisc/include/asm/thread_info.h
+++ b/arch/parisc/include/asm/thread_info.h
@@ -5,6 +5,7 @@

#ifndef __ASSEMBLY__
#include <asm/processor.h>
+#include <asm/special_insns.h>

struct thread_info {
struct task_struct *task; /* main task structure */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 23/29] Disintegrate asm/system.h for Score
March 07, 2012 09:05PM
Disintegrate asm/system.h for Score. Not compiled.

Signed-off-by: David Howells <[email protected]>
---

arch/score/include/asm/atomic.h | 43 +++++++++++++++++
arch/score/include/asm/barrier.h | 16 ++++++
arch/score/include/asm/bug.h | 10 ++++
arch/score/include/asm/exec.h | 6 ++
arch/score/include/asm/switch_to.h | 13 +++++
arch/score/include/asm/system.h | 90 ------------------------------------
6 files changed, 88 insertions(+), 90 deletions(-)
create mode 100644 arch/score/include/asm/barrier.h
create mode 100644 arch/score/include/asm/exec.h
create mode 100644 arch/score/include/asm/switch_to.h
delete mode 100644 arch/score/include/asm/system.h

diff --git a/arch/score/include/asm/atomic.h b/arch/score/include/asm/atomic.h
index 84eb8dd..77b44de 100644
--- a/arch/score/include/asm/atomic.h
+++ b/arch/score/include/asm/atomic.h
@@ -3,4 +3,47 @@

#include <asm-generic/atomic.h>

+struct __xchg_dummy { unsigned long a[100]; };
+#define __xg(x) ((struct __xchg_dummy *)(x))
+
+static inline
+unsigned long __xchg(volatile unsigned long *m, unsigned long val)
+{
+ unsigned long retval;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ *m = val;
+ local_irq_restore(flags);
+ return retval;
+}
+
+#define xchg(ptr, v) \
+ ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
+ (unsigned long)(v)))
+
+static inline unsigned long __cmpxchg(volatile unsigned long *m,
+ unsigned long old, unsigned long new)
+{
+ unsigned long retval;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ if (retval == old)
+ *m = new;
+ local_irq_restore(flags);
+ return retval;
+}
+
+#define cmpxchg(ptr, o, n) \
+ ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
+ (unsigned long)(o), \
+ (unsigned long)(n)))
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+#include <asm-generic/cmpxchg-local.h>
+
#endif /* _ASM_SCORE_ATOMIC_H */
diff --git a/arch/score/include/asm/barrier.h b/arch/score/include/asm/barrier.h
new file mode 100644
index 0000000..0eacb64
--- /dev/null
+++ b/arch/score/include/asm/barrier.h
@@ -0,0 +1,16 @@
+#ifndef _ASM_SCORE_BARRIER_H
+#define _ASM_SCORE_BARRIER_H
+
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+
+#define read_barrier_depends() do {} while (0)
+#define smp_read_barrier_depends() do {} while (0)
+
+#define set_mb(var, value) do {var = value; wmb(); } while (0)
+
+#endif /* _ASM_SCORE_BARRIER_H */
diff --git a/arch/score/include/asm/bug.h b/arch/score/include/asm/bug.h
index bb76a33..d1ddaa4 100644
--- a/arch/score/include/asm/bug.h
+++ b/arch/score/include/asm/bug.h
@@ -3,4 +3,14 @@

#include <asm-generic/bug.h>

+extern void __die(const char *, struct pt_regs *, const char *,
+ const char *, unsigned long) __attribute__((noreturn));
+extern void __die_if_kernel(const char *, struct pt_regs *, const char *,
+ const char *, unsigned long);
+
+#define die(msg, regs) \
+ __die(msg, regs, __FILE__ ":", __func__, __LINE__)
+#define die_if_kernel(msg, regs) \
+ __die_if_kernel(msg, regs, __FILE__ ":", __func__, __LINE__)
+
#endif /* _ASM_SCORE_BUG_H */
diff --git a/arch/score/include/asm/exec.h b/arch/score/include/asm/exec.h
new file mode 100644
index 0000000..f9f3cd5
--- /dev/null
+++ b/arch/score/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_EXEC_H
+#define _ASM_SCORE_EXEC_H
+
+extern unsigned long arch_align_stack(unsigned long sp);
+
+#endif /* _ASM_SCORE_EXEC_H */
diff --git a/arch/score/include/asm/switch_to.h b/arch/score/include/asm/switch_to.h
new file mode 100644
index 0000000..031756b
--- /dev/null
+++ b/arch/score/include/asm/switch_to.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_SCORE_SWITCH_TO_H
+#define _ASM_SCORE_SWITCH_TO_H
+
+extern void *resume(void *last, void *next, void *next_ti);
+
+#define switch_to(prev, next, last) \
+do { \
+ (last) = resume(prev, next, task_thread_info(next)); \
+} while (0)
+
+#define finish_arch_switch(prev) do {} while (0)
+
+#endif /* _ASM_SCORE_SWITCH_TO_H */
diff --git a/arch/score/include/asm/system.h b/arch/score/include/asm/system.h
deleted file mode 100644
index 589d5c7..0000000
--- a/arch/score/include/asm/system.h
+++ /dev/null
@@ -1,90 +0,0 @@
-#ifndef _ASM_SCORE_SYSTEM_H
-#define _ASM_SCORE_SYSTEM_H
-
-#include <linux/types.h>
-#include <linux/irqflags.h>
-
-struct pt_regs;
-struct task_struct;
-
-extern void *resume(void *last, void *next, void *next_ti);
-
-#define switch_to(prev, next, last) \
-do { \
- (last) = resume(prev, next, task_thread_info(next)); \
-} while (0)
-
-#define finish_arch_switch(prev) do {} while (0)
-
-typedef void (*vi_handler_t)(void);
-extern unsigned long arch_align_stack(unsigned long sp);
-
-#define mb() barrier()
-#define rmb() barrier()
-#define wmb() barrier()
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-
-#define read_barrier_depends() do {} while (0)
-#define smp_read_barrier_depends() do {} while (0)
-
-#define set_mb(var, value) do {var = value; wmb(); } while (0)
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-#include <asm-generic/cmpxchg-local.h>
-
-#ifndef __ASSEMBLY__
-
-struct __xchg_dummy { unsigned long a[100]; };
-#define __xg(x) ((struct __xchg_dummy *)(x))
-
-static inline
-unsigned long __xchg(volatile unsigned long *m, unsigned long val)
-{
- unsigned long retval;
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- *m = val;
- local_irq_restore(flags);
- return retval;
-}
-
-#define xchg(ptr, v) \
- ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
- (unsigned long)(v)))
-
-static inline unsigned long __cmpxchg(volatile unsigned long *m,
- unsigned long old, unsigned long new)
-{
- unsigned long retval;
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- local_irq_restore(flags);
- return retval;
-}
-
-#define cmpxchg(ptr, o, n) \
- ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
- (unsigned long)(o), \
- (unsigned long)(n)))
-
-extern void __die(const char *, struct pt_regs *, const char *,
- const char *, unsigned long) __attribute__((noreturn));
-extern void __die_if_kernel(const char *, struct pt_regs *, const char *,
- const char *, unsigned long);
-
-#define die(msg, regs) \
- __die(msg, regs, __FILE__ ":", __func__, __LINE__)
-#define die_if_kernel(msg, regs) \
- __die_if_kernel(msg, regs, __FILE__ ":", __func__, __LINE__)
-
-#endif /* !__ASSEMBLY__ */
-#endif /* _ASM_SCORE_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 22/29] Disintegrate asm/system.h for S390
March 07, 2012 09:06PM
Disintegrate asm/system.h for S390.

Signed-off-by: David Howells <[email protected]m>
---

arch/s390/crypto/crypt_s390.h | 1
arch/s390/include/asm/atomic.h | 1
arch/s390/include/asm/barrier.h | 35 ++++
arch/s390/include/asm/ctl_reg.h | 76 +++++++++
arch/s390/include/asm/elf.h | 1
arch/s390/include/asm/exec.h | 12 +
arch/s390/include/asm/facility.h | 29 ++++
arch/s390/include/asm/mmu.h | 14 ++
arch/s390/include/asm/mmu_context.h | 1
arch/s390/include/asm/processor.h | 16 ++
arch/s390/include/asm/setup.h | 14 ++
arch/s390/include/asm/sigp.h | 8 +
arch/s390/include/asm/switch_to.h | 100 ++++++++++++
arch/s390/include/asm/system.h | 281 -----------------------------------
arch/s390/include/asm/uaccess.h | 6 +
arch/s390/kernel/compat_signal.c | 1
arch/s390/kernel/early.c | 1
arch/s390/kernel/process.c | 1
arch/s390/kernel/ptrace.c | 1
arch/s390/kernel/setup.c | 1
arch/s390/kernel/signal.c | 1
arch/s390/kernel/smp.c | 1
arch/s390/kernel/suspend.c | 1
arch/s390/kernel/vdso.c | 1
arch/s390/kvm/kvm-s390.c | 1
arch/s390/mm/fault.c | 1
arch/s390/mm/init.c | 1
arch/s390/mm/maccess.c | 1
arch/s390/oprofile/hwsampler.c | 1
drivers/s390/char/sclp_cmd.c | 1
drivers/s390/cio/crw.c | 1
drivers/s390/crypto/ap_bus.c | 1
32 files changed, 330 insertions(+), 282 deletions(-)
create mode 100644 arch/s390/include/asm/barrier.h
create mode 100644 arch/s390/include/asm/ctl_reg.h
create mode 100644 arch/s390/include/asm/exec.h
create mode 100644 arch/s390/include/asm/facility.h
create mode 100644 arch/s390/include/asm/switch_to.h
delete mode 100644 arch/s390/include/asm/system.h

diff --git a/arch/s390/crypto/crypt_s390.h b/arch/s390/crypto/crypt_s390.h
index ffd1ac2..9178db6 100644
--- a/arch/s390/crypto/crypt_s390.h
+++ b/arch/s390/crypto/crypt_s390.h
@@ -17,6 +17,7 @@
#define _CRYPTO_ARCH_S390_CRYPT_S390_H

#include <asm/errno.h>
+#include <asm/facility.h>

#define CRYPT_S390_OP_MASK 0xFF00
#define CRYPT_S390_FUNC_MASK 0x00FF
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index 1a77c09..748347b 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -15,6 +15,7 @@

#include <linux/compiler.h>
#include <linux/types.h>
+#include <asm/cmpxchg.h>

#define ATOMIC_INIT(i) { (i) }

diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h
new file mode 100644
index 0000000..451273a
--- /dev/null
+++ b/arch/s390/include/asm/barrier.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright IBM Corp. 1999, 2009
+ *
+ * Author(s): Martin Schwidefsky <[email protected]>
+ */
+
+#ifndef __ASM_BARRIER_H
+#define __ASM_BARRIER_H
+
+/*
+ * Force strict CPU ordering.
+ * And yes, this is required on UP too when we're talking
+ * to devices.
+ *
+ * This is very similar to the ppc eieio/sync instruction in that is
+ * does a checkpoint syncronisation & makes sure that
+ * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
+ */
+
+#define eieio() asm volatile("bcr 15,0" : : : "memory")
+#define SYNC_OTHER_CORES(x) eieio()
+#define mb() eieio()
+#define rmb() eieio()
+#define wmb() eieio()
+#define read_barrier_depends() do { } while(0)
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_read_barrier_depends() read_barrier_depends()
+#define smp_mb__before_clear_bit() smp_mb()
+#define smp_mb__after_clear_bit() smp_mb()
+
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+
+#endif /* __ASM_BARRIER_H */
diff --git a/arch/s390/include/asm/ctl_reg.h b/arch/s390/include/asm/ctl_reg.h
new file mode 100644
index 0000000..ecde941
--- /dev/null
+++ b/arch/s390/include/asm/ctl_reg.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright IBM Corp. 1999, 2009
+ *
+ * Author(s): Martin Schwidefsky <[email protected]>
+ */
+
+#ifndef __ASM_CTL_REG_H
+#define __ASM_CTL_REG_H
+
+#ifdef __s390x__
+
+#define __ctl_load(array, low, high) ({ \
+ typedef struct { char _[sizeof(array)]; } addrtype; \
+ asm volatile( \
+ " lctlg %1,%2,%0\n" \
+ : : "Q" (*(addrtype *)(&array)), \
+ "i" (low), "i" (high)); \
+ })
+
+#define __ctl_store(array, low, high) ({ \
+ typedef struct { char _[sizeof(array)]; } addrtype; \
+ asm volatile( \
+ " stctg %1,%2,%0\n" \
+ : "=Q" (*(addrtype *)(&array)) \
+ : "i" (low), "i" (high)); \
+ })
+
+#else /* __s390x__ */
+
+#define __ctl_load(array, low, high) ({ \
+ typedef struct { char _[sizeof(array)]; } addrtype; \
+ asm volatile( \
+ " lctl %1,%2,%0\n" \
+ : : "Q" (*(addrtype *)(&array)), \
+ "i" (low), "i" (high)); \
+})
+
+#define __ctl_store(array, low, high) ({ \
+ typedef struct { char _[sizeof(array)]; } addrtype; \
+ asm volatile( \
+ " stctl %1,%2,%0\n" \
+ : "=Q" (*(addrtype *)(&array)) \
+ : "i" (low), "i" (high)); \
+ })
+
+#endif /* __s390x__ */
+
+#define __ctl_set_bit(cr, bit) ({ \
+ unsigned long __dummy; \
+ __ctl_store(__dummy, cr, cr); \
+ __dummy |= 1UL << (bit); \
+ __ctl_load(__dummy, cr, cr); \
+})
+
+#define __ctl_clear_bit(cr, bit) ({ \
+ unsigned long __dummy; \
+ __ctl_store(__dummy, cr, cr); \
+ __dummy &= ~(1UL << (bit)); \
+ __ctl_load(__dummy, cr, cr); \
+})
+
+#ifdef CONFIG_SMP
+
+extern void smp_ctl_set_bit(int cr, int bit);
+extern void smp_ctl_clear_bit(int cr, int bit);
+#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
+#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
+
+#else
+
+#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
+#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
+
+#endif /* CONFIG_SMP */
+
+#endif /* __ASM_CTL_REG_H */
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index 547f1a6..c4ee39f 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -129,7 +129,6 @@ typedef s390_fp_regs compat_elf_fpregset_t;
typedef s390_compat_regs compat_elf_gregset_t;

#include <linux/sched.h> /* for task_struct */
-#include <asm/system.h> /* for save_access_regs */
#include <asm/mmu_context.h>

#include <asm/vdso.h>
diff --git a/arch/s390/include/asm/exec.h b/arch/s390/include/asm/exec.h
new file mode 100644
index 0000000..c4a93d6
--- /dev/null
+++ b/arch/s390/include/asm/exec.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright IBM Corp. 1999, 2009
+ *
+ * Author(s): Martin Schwidefsky <[email protected]>
+ */
+
+#ifndef __ASM_EXEC_H
+#define __ASM_EXEC_H
+
+extern unsigned long arch_align_stack(unsigned long sp);
+
+#endif /* __ASM_EXEC_H */
diff --git a/arch/s390/include/asm/facility.h b/arch/s390/include/asm/facility.h
new file mode 100644
index 0000000..0890581
--- /dev/null
+++ b/arch/s390/include/asm/facility.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright IBM Corp. 1999, 2009
+ *
+ * Author(s): Martin Schwidefsky <[email protected]>
+ */
+
+#ifndef __ASM_FACILITY_H
+#define __ASM_FACILITY_H
+
+#include <asm/lowcore.h>
+
+#define MAX_FACILITY_BIT (256*8) /* stfle_fac_list has 256 bytes */
+
+/*
+ * The test_facility function uses the bit odering where the MSB is bit 0.
+ * That makes it easier to query facility bits with the bit number as
+ * documented in the Principles of Operation.
+ */
+static inline int test_facility(unsigned long nr)
+{
+ unsigned char *ptr;
+
+ if (nr >= MAX_FACILITY_BIT)
+ return 0;
+ ptr = (unsigned char *) &S390_lowcore.stfle_fac_list + (nr >> 3);
+ return (*ptr & (0x80 >> (nr & 7))) != 0;
+}
+
+#endif /* __ASM_FACILITY_H */
diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h
index 4506791..1c7d6ce 100644
--- a/arch/s390/include/asm/mmu.h
+++ b/arch/s390/include/asm/mmu.h
@@ -21,4 +21,18 @@ typedef struct {
.context.pgtable_list = LIST_HEAD_INIT(name.context.pgtable_list), \
.context.gmap_list = LIST_HEAD_INIT(name.context.gmap_list),

+static inline int tprot(unsigned long addr)
+{
+ int rc = -EFAULT;
+
+ asm volatile(
+ " tprot 0(%1),0\n"
+ "0: ipm %0\n"
+ " srl %0,28\n"
+ "1:\n"
+ EX_TABLE(0b,1b)
+ : "+d" (rc) : "a" (addr) : "cc");
+ return rc;
+}
+
#endif
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index 5682f16..5d09e40 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -12,6 +12,7 @@
#include <asm/pgalloc.h>
#include <asm/uaccess.h>
#include <asm/tlbflush.h>
+#include <asm/ctl_reg.h>
#include <asm-generic/mm_hooks.h>

static inline int init_new_context(struct task_struct *tsk,
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index d25843a..320aa82 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -14,6 +14,7 @@
#define __ASM_S390_PROCESSOR_H

#include <linux/linkage.h>
+#include <linux/irqflags.h>
#include <asm/cpu.h>
#include <asm/page.h>
#include <asm/ptrace.h>
@@ -304,6 +305,21 @@ static inline void __noreturn disabled_wait(unsigned long code)
}

/*
+ * Use to set psw mask except for the first byte which
+ * won't be changed by this function.
+ */
+static inline void
+__set_psw_mask(unsigned long mask)
+{
+ __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8)));
+}
+
+#define local_mcck_enable() \
+ __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT | PSW_MASK_MCHECK)
+#define local_mcck_disable() \
+ __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT)
+
+/*
* Basic Machine Check/Program Check Handler.
*/

diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index 097183c..b21e46e 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -140,6 +140,20 @@ extern char vmpoff_cmd[];
#define NSS_NAME_SIZE 8
extern char kernel_nss_name[];

+#ifdef CONFIG_PFAULT
+extern int pfault_init(void);
+extern void pfault_fini(void);
+#else /* CONFIG_PFAULT */
+#define pfault_init() ({-1;})
+#define pfault_fini() do { } while (0)
+#endif /* CONFIG_PFAULT */
+
+extern void cmma_init(void);
+
+extern void (*_machine_restart)(char *command);
+extern void (*_machine_halt)(void);
+extern void (*_machine_power_off)(void);
+
#else /* __ASSEMBLY__ */

#ifndef __s390x__
diff --git a/arch/s390/include/asm/sigp.h b/arch/s390/include/asm/sigp.h
index 06faf6a..d7008d1 100644
--- a/arch/s390/include/asm/sigp.h
+++ b/arch/s390/include/asm/sigp.h
@@ -14,6 +14,14 @@
/* Get real cpu address from logical cpu number. */
extern unsigned short __cpu_logical_map[];

+static inline unsigned short stap(void)
+{
+ unsigned short cpu_address;
+
+ asm volatile("stap %0" : "=m" (cpu_address));
+ return cpu_address;
+}
+
static inline int cpu_logical_map(int cpu)
{
#ifdef CONFIG_SMP
diff --git a/arch/s390/include/asm/switch_to.h b/arch/s390/include/asm/switch_to.h
new file mode 100644
index 0000000..6ad1fc7
--- /dev/null
+++ b/arch/s390/include/asm/switch_to.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright IBM Corp. 1999, 2009
+ *
+ * Author(s): Martin Schwidefsky <[email protected]>
+ */
+
+#ifndef __ASM_SWITCH_TO_H
+#define __ASM_SWITCH_TO_H
+
+struct task_struct;
+
+extern struct task_struct *__switch_to(void *, void *);
+extern void update_per_regs(struct task_struct *task);
+
+static inline void save_fp_regs(s390_fp_regs *fpregs)
+{
+ asm volatile(
+ " std 0,%O0+8(%R0)\n"
+ " std 2,%O0+24(%R0)\n"
+ " std 4,%O0+40(%R0)\n"
+ " std 6,%O0+56(%R0)"
+ : "=Q" (*fpregs) : "Q" (*fpregs));
+ if (!MACHINE_HAS_IEEE)
+ return;
+ asm volatile(
+ " stfpc %0\n"
+ " std 1,%O0+16(%R0)\n"
+ " std 3,%O0+32(%R0)\n"
+ " std 5,%O0+48(%R0)\n"
+ " std 7,%O0+64(%R0)\n"
+ " std 8,%O0+72(%R0)\n"
+ " std 9,%O0+80(%R0)\n"
+ " std 10,%O0+88(%R0)\n"
+ " std 11,%O0+96(%R0)\n"
+ " std 12,%O0+104(%R0)\n"
+ " std 13,%O0+112(%R0)\n"
+ " std 14,%O0+120(%R0)\n"
+ " std 15,%O0+128(%R0)\n"
+ : "=Q" (*fpregs) : "Q" (*fpregs));
+}
+
+static inline void restore_fp_regs(s390_fp_regs *fpregs)
+{
+ asm volatile(
+ " ld 0,%O0+8(%R0)\n"
+ " ld 2,%O0+24(%R0)\n"
+ " ld 4,%O0+40(%R0)\n"
+ " ld 6,%O0+56(%R0)"
+ : : "Q" (*fpregs));
+ if (!MACHINE_HAS_IEEE)
+ return;
+ asm volatile(
+ " lfpc %0\n"
+ " ld 1,%O0+16(%R0)\n"
+ " ld 3,%O0+32(%R0)\n"
+ " ld 5,%O0+48(%R0)\n"
+ " ld 7,%O0+64(%R0)\n"
+ " ld 8,%O0+72(%R0)\n"
+ " ld 9,%O0+80(%R0)\n"
+ " ld 10,%O0+88(%R0)\n"
+ " ld 11,%O0+96(%R0)\n"
+ " ld 12,%O0+104(%R0)\n"
+ " ld 13,%O0+112(%R0)\n"
+ " ld 14,%O0+120(%R0)\n"
+ " ld 15,%O0+128(%R0)\n"
+ : : "Q" (*fpregs));
+}
+
+static inline void save_access_regs(unsigned int *acrs)
+{
+ asm volatile("stam 0,15,%0" : "=Q" (*acrs));
+}
+
+static inline void restore_access_regs(unsigned int *acrs)
+{
+ asm volatile("lam 0,15,%0" : : "Q" (*acrs));
+}
+
+#define switch_to(prev,next,last) do { \
+ if (prev->mm) { \
+ save_fp_regs(&prev->thread.fp_regs); \
+ save_access_regs(&prev->thread.acrs[0]); \
+ } \
+ if (next->mm) { \
+ restore_fp_regs(&next->thread.fp_regs); \
+ restore_access_regs(&next->thread.acrs[0]); \
+ update_per_regs(next); \
+ } \
+ prev = __switch_to(prev,next); \
+} while (0)
+
+extern void account_vtime(struct task_struct *, struct task_struct *);
+extern void account_tick_vtime(struct task_struct *);
+
+#define finish_arch_switch(prev) do { \
+ set_fs(current->thread.mm_segment); \
+ account_vtime(prev, current); \
+} while (0)
+
+#endif /* __ASM_SWITCH_TO_H */
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
deleted file mode 100644
index d73cc6b..0000000
--- a/arch/s390/include/asm/system.h
+++ /dev/null
@@ -1,281 +0,0 @@
-/*
- * Copyright IBM Corp. 1999, 2009
- *
- * Author(s): Martin Schwidefsky <[email protected]>
- */
-
-#ifndef __ASM_SYSTEM_H
-#define __ASM_SYSTEM_H
-
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <asm/types.h>
-#include <asm/ptrace.h>
-#include <asm/setup.h>
-#include <asm/processor.h>
-#include <asm/lowcore.h>
-#include <asm/cmpxchg.h>
-
-#ifdef __KERNEL__
-
-struct task_struct;
-
-extern struct task_struct *__switch_to(void *, void *);
-extern void update_per_regs(struct task_struct *task);
-
-static inline void save_fp_regs(s390_fp_regs *fpregs)
-{
- asm volatile(
- " std 0,%O0+8(%R0)\n"
- " std 2,%O0+24(%R0)\n"
- " std 4,%O0+40(%R0)\n"
- " std 6,%O0+56(%R0)"
- : "=Q" (*fpregs) : "Q" (*fpregs));
- if (!MACHINE_HAS_IEEE)
- return;
- asm volatile(
- " stfpc %0\n"
- " std 1,%O0+16(%R0)\n"
- " std 3,%O0+32(%R0)\n"
- " std 5,%O0+48(%R0)\n"
- " std 7,%O0+64(%R0)\n"
- " std 8,%O0+72(%R0)\n"
- " std 9,%O0+80(%R0)\n"
- " std 10,%O0+88(%R0)\n"
- " std 11,%O0+96(%R0)\n"
- " std 12,%O0+104(%R0)\n"
- " std 13,%O0+112(%R0)\n"
- " std 14,%O0+120(%R0)\n"
- " std 15,%O0+128(%R0)\n"
- : "=Q" (*fpregs) : "Q" (*fpregs));
-}
-
-static inline void restore_fp_regs(s390_fp_regs *fpregs)
-{
- asm volatile(
- " ld 0,%O0+8(%R0)\n"
- " ld 2,%O0+24(%R0)\n"
- " ld 4,%O0+40(%R0)\n"
- " ld 6,%O0+56(%R0)"
- : : "Q" (*fpregs));
- if (!MACHINE_HAS_IEEE)
- return;
- asm volatile(
- " lfpc %0\n"
- " ld 1,%O0+16(%R0)\n"
- " ld 3,%O0+32(%R0)\n"
- " ld 5,%O0+48(%R0)\n"
- " ld 7,%O0+64(%R0)\n"
- " ld 8,%O0+72(%R0)\n"
- " ld 9,%O0+80(%R0)\n"
- " ld 10,%O0+88(%R0)\n"
- " ld 11,%O0+96(%R0)\n"
- " ld 12,%O0+104(%R0)\n"
- " ld 13,%O0+112(%R0)\n"
- " ld 14,%O0+120(%R0)\n"
- " ld 15,%O0+128(%R0)\n"
- : : "Q" (*fpregs));
-}
-
-static inline void save_access_regs(unsigned int *acrs)
-{
- asm volatile("stam 0,15,%0" : "=Q" (*acrs));
-}
-
-static inline void restore_access_regs(unsigned int *acrs)
-{
- asm volatile("lam 0,15,%0" : : "Q" (*acrs));
-}
-
-#define switch_to(prev,next,last) do { \
- if (prev->mm) { \
- save_fp_regs(&prev->thread.fp_regs); \
- save_access_regs(&prev->thread.acrs[0]); \
- } \
- if (next->mm) { \
- restore_fp_regs(&next->thread.fp_regs); \
- restore_access_regs(&next->thread.acrs[0]); \
- update_per_regs(next); \
- } \
- prev = __switch_to(prev,next); \
-} while (0)
-
-extern void account_vtime(struct task_struct *, struct task_struct *);
-extern void account_tick_vtime(struct task_struct *);
-
-#ifdef CONFIG_PFAULT
-extern int pfault_init(void);
-extern void pfault_fini(void);
-#else /* CONFIG_PFAULT */
-#define pfault_init() ({-1;})
-#define pfault_fini() do { } while (0)
-#endif /* CONFIG_PFAULT */
-
-extern void cmma_init(void);
-extern int memcpy_real(void *, void *, size_t);
-extern void copy_to_absolute_zero(void *dest, void *src, size_t count);
-extern int copy_to_user_real(void __user *dest, void *src, size_t count);
-extern int copy_from_user_real(void *dest, void __user *src, size_t count);
-
-#define finish_arch_switch(prev) do { \
- set_fs(current->thread.mm_segment); \
- account_vtime(prev, current); \
-} while (0)
-
-#define nop() asm volatile("nop")
-
-/*
- * Force strict CPU ordering.
- * And yes, this is required on UP too when we're talking
- * to devices.
- *
- * This is very similar to the ppc eieio/sync instruction in that is
- * does a checkpoint syncronisation & makes sure that
- * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
- */
-
-#define eieio() asm volatile("bcr 15,0" : : : "memory")
-#define SYNC_OTHER_CORES(x) eieio()
-#define mb() eieio()
-#define rmb() eieio()
-#define wmb() eieio()
-#define read_barrier_depends() do { } while(0)
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#define smp_mb__before_clear_bit() smp_mb()
-#define smp_mb__after_clear_bit() smp_mb()
-
-
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#ifdef __s390x__
-
-#define __ctl_load(array, low, high) ({ \
- typedef struct { char _[sizeof(array)]; } addrtype; \
- asm volatile( \
- " lctlg %1,%2,%0\n" \
- : : "Q" (*(addrtype *)(&array)), \
- "i" (low), "i" (high)); \
- })
-
-#define __ctl_store(array, low, high) ({ \
- typedef struct { char _[sizeof(array)]; } addrtype; \
- asm volatile( \
- " stctg %1,%2,%0\n" \
- : "=Q" (*(addrtype *)(&array)) \
- : "i" (low), "i" (high)); \
- })
-
-#else /* __s390x__ */
-
-#define __ctl_load(array, low, high) ({ \
- typedef struct { char _[sizeof(array)]; } addrtype; \
- asm volatile( \
- " lctl %1,%2,%0\n" \
- : : "Q" (*(addrtype *)(&array)), \
- "i" (low), "i" (high)); \
-})
-
-#define __ctl_store(array, low, high) ({ \
- typedef struct { char _[sizeof(array)]; } addrtype; \
- asm volatile( \
- " stctl %1,%2,%0\n" \
- : "=Q" (*(addrtype *)(&array)) \
- : "i" (low), "i" (high)); \
- })
-
-#endif /* __s390x__ */
-
-#define __ctl_set_bit(cr, bit) ({ \
- unsigned long __dummy; \
- __ctl_store(__dummy, cr, cr); \
- __dummy |= 1UL << (bit); \
- __ctl_load(__dummy, cr, cr); \
-})
-
-#define __ctl_clear_bit(cr, bit) ({ \
- unsigned long __dummy; \
- __ctl_store(__dummy, cr, cr); \
- __dummy &= ~(1UL << (bit)); \
- __ctl_load(__dummy, cr, cr); \
-})
-
-/*
- * Use to set psw mask except for the first byte which
- * won't be changed by this function.
- */
-static inline void
-__set_psw_mask(unsigned long mask)
-{
- __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8)));
-}
-
-#define local_mcck_enable() \
- __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT | PSW_MASK_MCHECK)
-#define local_mcck_disable() \
- __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT)
-
-#ifdef CONFIG_SMP
-
-extern void smp_ctl_set_bit(int cr, int bit);
-extern void smp_ctl_clear_bit(int cr, int bit);
-#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
-#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
-
-#else
-
-#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
-#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
-
-#endif /* CONFIG_SMP */
-
-#define MAX_FACILITY_BIT (256*8) /* stfle_fac_list has 256 bytes */
-
-/*
- * The test_facility function uses the bit odering where the MSB is bit 0.
- * That makes it easier to query facility bits with the bit number as
- * documented in the Principles of Operation.
- */
-static inline int test_facility(unsigned long nr)
-{
- unsigned char *ptr;
-
- if (nr >= MAX_FACILITY_BIT)
- return 0;
- ptr = (unsigned char *) &S390_lowcore.stfle_fac_list + (nr >> 3);
- return (*ptr & (0x80 >> (nr & 7))) != 0;
-}
-
-static inline unsigned short stap(void)
-{
- unsigned short cpu_address;
-
- asm volatile("stap %0" : "=m" (cpu_address));
- return cpu_address;
-}
-
-extern void (*_machine_restart)(char *command);
-extern void (*_machine_halt)(void);
-extern void (*_machine_power_off)(void);
-
-extern unsigned long arch_align_stack(unsigned long sp);
-
-static inline int tprot(unsigned long addr)
-{
- int rc = -EFAULT;
-
- asm volatile(
- " tprot 0(%1),0\n"
- "0: ipm %0\n"
- " srl %0,28\n"
- "1:\n"
- EX_TABLE(0b,1b)
- : "+d" (rc) : "a" (addr) : "cc");
- return rc;
-}
-
-#endif /* __KERNEL__ */
-
-#endif
diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h
index 2b23885..8f2cada 100644
--- a/arch/s390/include/asm/uaccess.h
+++ b/arch/s390/include/asm/uaccess.h
@@ -16,6 +16,7 @@
*/
#include <linux/sched.h>
#include <linux/errno.h>
+#include <asm/ctl_reg.h>

#define VERIFY_READ 0
#define VERIFY_WRITE 1
@@ -375,4 +376,9 @@ clear_user(void __user *to, unsigned long n)
return n;
}

+extern int memcpy_real(void *, void *, size_t);
+extern void copy_to_absolute_zero(void *dest, void *src, size_t count);
+extern int copy_to_user_real(void __user *dest, void *src, size_t count);
+extern int copy_from_user_real(void *dest, void __user *src, size_t count);
+
#endif /* __S390_UACCESS_H */
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index 6fe78c2..9ad08ad 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -27,6 +27,7 @@
#include <asm/ucontext.h>
#include <asm/uaccess.h>
#include <asm/lowcore.h>
+#include <asm/switch_to.h>
#include "compat_linux.h"
#include "compat_ptrace.h"
#include "entry.h"
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 52098d6..7e859f2 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -29,6 +29,7 @@
#include <asm/sysinfo.h>
#include <asm/cpcmd.h>
#include <asm/sclp.h>
+#include <asm/facility.h>
#include "entry.h"

/*
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 9672514..ae8fdd3 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -29,6 +29,7 @@
#include <asm/timer.h>
#include <asm/nmi.h>
#include <asm/smp.h>
+#include <asm/switch_to.h>
#include "entry.h"

asmlinkage void ret_from_fork(void) asm ("ret_from_fork");
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 441b5ada..02f300f 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -28,6 +28,7 @@
#include <asm/pgalloc.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
+#include <asm/switch_to.h>
#include "entry.h"

#ifdef CONFIG_COMPAT
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index b7bcd21..1d7cbd3 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -61,6 +61,7 @@
#include <asm/ebcdic.h>
#include <asm/kvm_virtio.h>
#include <asm/diag.h>
+#include <asm/facility.h>

long psw_kernel_bits = PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_PRIMARY |
PSW_MASK_EA | PSW_MASK_BA;
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 2d421d9..f7abd73 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -30,6 +30,7 @@
#include <asm/ucontext.h>
#include <asm/uaccess.h>
#include <asm/lowcore.h>
+#include <asm/switch_to.h>
#include "entry.h"

#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 2398ce6..baf1a98 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -53,6 +53,7 @@
#include <asm/cputime.h>
#include <asm/vdso.h>
#include <asm/cpu.h>
+#include <asm/facility.h>
#include "entry.h"

/* logical cpu to cpu address */
diff --git a/arch/s390/kernel/suspend.c b/arch/s390/kernel/suspend.c
index 3d8ab80..aa1494d 100644
--- a/arch/s390/kernel/suspend.c
+++ b/arch/s390/kernel/suspend.c
@@ -9,6 +9,7 @@
#include <linux/pfn.h>
#include <linux/suspend.h>
#include <linux/mm.h>
+#include <asm/ctl_reg.h>

/*
* References to section boundaries
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index 8187da6..aed1e65 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -30,6 +30,7 @@
#include <asm/mmu_context.h>
#include <asm/sections.h>
#include <asm/vdso.h>
+#include <asm/facility.h>

#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
extern char vdso32_start, vdso32_end;
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 78d3f8a..d56de16 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -27,6 +27,7 @@
#include <asm/lowcore.h>
#include <asm/pgtable.h>
#include <asm/nmi.h>
+#include <asm/switch_to.h>
#include "kvm-s390.h"
#include "gaccess.h"

diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 7620f61..3915870 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -35,6 +35,7 @@
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
+#include <asm/facility.h>
#include "../kernel/entry.h"

#ifndef CONFIG_64BIT
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index 2e4870e..2bea060 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -37,6 +37,7 @@
#include <asm/tlb.h>
#include <asm/tlbflush.h>
#include <asm/sections.h>
+#include <asm/ctl_reg.h>

pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__((__aligned__(PAGE_SIZE)));

diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 6ea70a0..7bb15fc 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -12,6 +12,7 @@
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/gfp.h>
+#include <asm/ctl_reg.h>

/*
* This function writes to kernel memory bypassing DAT and possible
diff --git a/arch/s390/oprofile/hwsampler.c b/arch/s390/oprofile/hwsampler.c
index 9daee91..f9a0e5d 100644
--- a/arch/s390/oprofile/hwsampler.c
+++ b/arch/s390/oprofile/hwsampler.c
@@ -18,6 +18,7 @@
#include <linux/oom.h>
#include <linux/oprofile.h>

+#include <asm/facility.h>
#include <asm/lowcore.h>
#include <asm/irq.h>

diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c
index 0b54a91..2e58f47 100644
--- a/drivers/s390/char/sclp_cmd.c
+++ b/drivers/s390/char/sclp_cmd.c
@@ -21,6 +21,7 @@
#include <asm/chpid.h>
#include <asm/sclp.h>
#include <asm/setup.h>
+#include <asm/ctl_reg.h>

#include "sclp.h"

diff --git a/drivers/s390/cio/crw.c b/drivers/s390/cio/crw.c
index 425f741..d0a2dff 100644
--- a/drivers/s390/cio/crw.c
+++ b/drivers/s390/cio/crw.c
@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/wait.h>
#include <asm/crw.h>
+#include <asm/ctl_reg.h>

static DEFINE_MUTEX(crw_handler_mutex);
static crw_handler_t crw_handlers[NR_RSCS];
diff --git a/drivers/s390/crypto/ap_bus.c b/drivers/s390/crypto/ap_bus.c
index 090ea2a..be0caae 100644
--- a/drivers/s390/crypto/ap_bus.c
+++ b/drivers/s390/crypto/ap_bus.c
@@ -45,6 +45,7 @@
#include <asm/isc.h>
#include <linux/hrtimer.h>
#include <linux/ktime.h>
+#include <asm/facility.h>

#include "ap_bus.h"


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 21/29] Disintegrate asm/system.h for PowerPC
March 07, 2012 09:06PM
Disintegrate asm/system.h for PowerPC.

Signed-off-by: David Howells <[email protected]>
---

arch/powerpc/include/asm/atomic.h | 299 ++++++++++++++
arch/powerpc/include/asm/auxvec.h | 2
arch/powerpc/include/asm/barrier.h | 68 +++
arch/powerpc/include/asm/bug.h | 11 +
arch/powerpc/include/asm/cache.h | 16 +
arch/powerpc/include/asm/debug.h | 56 +++
arch/powerpc/include/asm/exec.h | 9
arch/powerpc/include/asm/hw_breakpoint.h | 1
arch/powerpc/include/asm/irq.h | 1
arch/powerpc/include/asm/processor.h | 30 +
arch/powerpc/include/asm/reg_booke.h | 5
arch/powerpc/include/asm/rtas.h | 2
arch/powerpc/include/asm/setup.h | 24 +
arch/powerpc/include/asm/switch_to.h | 65 +++
arch/powerpc/include/asm/system.h | 554 --------------------------
arch/powerpc/kernel/align.c | 1
arch/powerpc/kernel/cputable.c | 1
arch/powerpc/kernel/crash.c | 1
arch/powerpc/kernel/ppc_ksyms.c | 1
arch/powerpc/kernel/process.c | 2
arch/powerpc/kernel/ptrace.c | 1
arch/powerpc/kernel/ptrace32.c | 1
arch/powerpc/kernel/signal.c | 1
arch/powerpc/kernel/signal_32.c | 1
arch/powerpc/kernel/signal_64.c | 1
arch/powerpc/kernel/smp.c | 1
arch/powerpc/kernel/swsusp.c | 1
arch/powerpc/kernel/sys_ppc32.c | 1
arch/powerpc/kernel/traps.c | 2
arch/powerpc/kvm/book3s_hv.c | 1
arch/powerpc/lib/alloc.c | 1
arch/powerpc/lib/copyuser_power7_vmx.c | 1
arch/powerpc/mm/fault.c | 1
arch/powerpc/mm/numa.c | 1
arch/powerpc/mm/pgtable_32.c | 1
arch/powerpc/platforms/pasemi/setup.c | 1
arch/powerpc/platforms/powermac/bootx_init.c | 1
arch/powerpc/platforms/powermac/cpufreq_32.c | 1
arch/powerpc/platforms/ps3/mm.c | 1
arch/powerpc/platforms/pseries/dtl.c | 1
arch/powerpc/sysdev/msi_bitmap.c | 1
arch/powerpc/xmon/xmon.c | 1
42 files changed, 617 insertions(+), 555 deletions(-)
create mode 100644 arch/powerpc/include/asm/barrier.h
create mode 100644 arch/powerpc/include/asm/debug.h
create mode 100644 arch/powerpc/include/asm/exec.h
create mode 100644 arch/powerpc/include/asm/switch_to.h
delete mode 100644 arch/powerpc/include/asm/system.h

diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 357a3ef..81dbffa 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -470,5 +470,304 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)

#endif /* __powerpc64__ */

+/*
+ * Atomic exchange
+ *
+ * Changes the memory location '*ptr' to be val and returns
+ * the previous value stored there.
+ */
+static __always_inline unsigned long
+__xchg_u32(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+ PPC_RELEASE_BARRIER
+"1: lwarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stwcx. %3,0,%2 \n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+
+/*
+ * Atomic exchange
+ *
+ * Changes the memory location '*ptr' to be val and returns
+ * the previous value stored there.
+ */
+static __always_inline unsigned long
+__xchg_u32_local(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+"1: lwarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stwcx. %3,0,%2 \n\
+ bne- 1b"
+ : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+
+#ifdef CONFIG_PPC64
+static __always_inline unsigned long
+__xchg_u64(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+ PPC_RELEASE_BARRIER
+"1: ldarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stdcx. %3,0,%2 \n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+
+static __always_inline unsigned long
+__xchg_u64_local(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+"1: ldarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stdcx. %3,0,%2 \n\
+ bne- 1b"
+ : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+#endif
+
+/*
+ * This function doesn't exist, so you'll get a linker error
+ * if something tries to do an invalid xchg().
+ */
+extern void __xchg_called_with_bad_pointer(void);
+
+static __always_inline unsigned long
+__xchg(volatile void *ptr, unsigned long x, unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __xchg_u32(ptr, x);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __xchg_u64(ptr, x);
+#endif
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+
+static __always_inline unsigned long
+__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __xchg_u32_local(ptr, x);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __xchg_u64_local(ptr, x);
+#endif
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+#define xchg(ptr,x) \
+ ({ \
+ __typeof__(*(ptr)) _x_ = (x); \
+ (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
+ })
+
+#define xchg_local(ptr,x) \
+ ({ \
+ __typeof__(*(ptr)) _x_ = (x); \
+ (__typeof__(*(ptr))) __xchg_local((ptr), \
+ (unsigned long)_x_, sizeof(*(ptr))); \
+ })
+
+/*
+ * Compare and exchange - if *p == old, set it to new,
+ * and return the old value of *p.
+ */
+#define __HAVE_ARCH_CMPXCHG 1
+
+static __always_inline unsigned long
+__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
+{
+ unsigned int prev;
+
+ __asm__ __volatile__ (
+ PPC_RELEASE_BARRIER
+"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
+ cmpw 0,%0,%3\n\
+ bne- 2f\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %4,0,%2\n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+
+static __always_inline unsigned long
+__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
+ unsigned long new)
+{
+ unsigned int prev;
+
+ __asm__ __volatile__ (
+"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
+ cmpw 0,%0,%3\n\
+ bne- 2f\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %4,0,%2\n\
+ bne- 1b"
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+
+#ifdef CONFIG_PPC64
+static __always_inline unsigned long
+__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__ (
+ PPC_RELEASE_BARRIER
+"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
+ cmpd 0,%0,%3\n\
+ bne- 2f\n\
+ stdcx. %4,0,%2\n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+
+static __always_inline unsigned long
+__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
+ unsigned long new)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__ (
+"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
+ cmpd 0,%0,%3\n\
+ bne- 2f\n\
+ stdcx. %4,0,%2\n\
+ bne- 1b"
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+#endif
+
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static __always_inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
+ unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __cmpxchg_u64(ptr, old, new);
+#endif
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+static __always_inline unsigned long
+__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
+ unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32_local(ptr, old, new);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __cmpxchg_u64_local(ptr, old, new);
+#endif
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr, o, n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+ })
+
+
+#define cmpxchg_local(ptr, o, n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+ })
+
+#ifdef CONFIG_PPC64
+#define cmpxchg64(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg((ptr), (o), (n)); \
+ })
+#define cmpxchg64_local(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg_local((ptr), (o), (n)); \
+ })
+#else
+#include <asm-generic/cmpxchg-local.h>
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+#endif
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/arch/powerpc/include/asm/auxvec.h b/arch/powerpc/include/asm/auxvec.h
index 19a099b..ce17d2c 100644
--- a/arch/powerpc/include/asm/auxvec.h
+++ b/arch/powerpc/include/asm/auxvec.h
@@ -16,4 +16,6 @@
*/
#define AT_SYSINFO_EHDR 33

+#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
+
#endif
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
new file mode 100644
index 0000000..ae78225
--- /dev/null
+++ b/arch/powerpc/include/asm/barrier.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <[email protected]>
+ */
+#ifndef _ASM_POWERPC_BARRIER_H
+#define _ASM_POWERPC_BARRIER_H
+
+/*
+ * Memory barrier.
+ * The sync instruction guarantees that all memory accesses initiated
+ * by this processor have been performed (with respect to all other
+ * mechanisms that access memory). The eieio instruction is a barrier
+ * providing an ordering (separately) for (a) cacheable stores and (b)
+ * loads and stores to non-cacheable memory (e.g. I/O devices).
+ *
+ * mb() prevents loads and stores being reordered across this point.
+ * rmb() prevents loads being reordered across this point.
+ * wmb() prevents stores being reordered across this point.
+ * read_barrier_depends() prevents data-dependent loads being reordered
+ * across this point (nop on PPC).
+ *
+ * *mb() variants without smp_ prefix must order all types of memory
+ * operations with one another. sync is the only instruction sufficient
+ * to do this.
+ *
+ * For the smp_ barriers, ordering is for cacheable memory operations
+ * only. We have to use the sync instruction for smp_mb(), since lwsync
+ * doesn't order loads with respect to previous stores. Lwsync can be
+ * used for smp_rmb() and smp_wmb().
+ *
+ * However, on CPUs that don't support lwsync, lwsync actually maps to a
+ * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
+ */
+#define mb() __asm__ __volatile__ ("sync" : : : "memory")
+#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
+#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
+#define read_barrier_depends() do { } while(0)
+
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+
+#ifdef CONFIG_SMP
+
+#ifdef __SUBARCH_HAS_LWSYNC
+# define SMPWMB LWSYNC
+#else
+# define SMPWMB eieio
+#endif
+
+#define smp_mb() mb()
+#define smp_rmb() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
+#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while(0)
+#endif /* CONFIG_SMP */
+
+/*
+ * This is a barrier which prevents following instructions from being
+ * started until the value of the argument x is known. For example, if
+ * x is a variable loaded from memory, this prevents following
+ * instructions from being executed until the load has been performed.
+ */
+#define data_barrier(x) \
+ asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
+
+#endif /* _ASM_POWERPC_BARRIER_H */
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index 065c590..3eb53d7 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -126,5 +126,16 @@

#include <asm-generic/bug.h>

+#ifndef __ASSEMBLY__
+
+struct pt_regs;
+extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
+extern void bad_page_fault(struct pt_regs *, unsigned long, int);
+extern void _exception(int, struct pt_regs *, int, unsigned long);
+extern void die(const char *, struct pt_regs *, long);
+extern void print_backtrace(unsigned long *);
+
+#endif /* !__ASSEMBLY__ */
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_BUG_H */
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 4b50941..9e495c9 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -42,8 +42,24 @@ extern struct ppc64_caches ppc64_caches;
#endif /* __powerpc64__ && ! __ASSEMBLY__ */

#if !defined(__ASSEMBLY__)
+
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
+
+#ifdef CONFIG_6xx
+extern long _get_L2CR(void);
+extern long _get_L3CR(void);
+extern void _set_L2CR(unsigned long);
+extern void _set_L3CR(unsigned long);
+#else
+#define _get_L2CR() 0L
+#define _get_L3CR() 0L
+#define _set_L2CR(val) do { } while(0)
+#define _set_L3CR(val) do { } while(0)
#endif

+extern void cacheable_memzero(void *p, unsigned int nb);
+extern void *cacheable_memcpy(void *, const void *, unsigned int);
+
+#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_CACHE_H */
diff --git a/arch/powerpc/include/asm/debug.h b/arch/powerpc/include/asm/debug.h
new file mode 100644
index 0000000..716d2f0
--- /dev/null
+++ b/arch/powerpc/include/asm/debug.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <[email protected]>
+ */
+#ifndef _ASM_POWERPC_DEBUG_H
+#define _ASM_POWERPC_DEBUG_H
+
+struct pt_regs;
+
+extern struct dentry *powerpc_debugfs_root;
+
+#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
+
+extern int (*__debugger)(struct pt_regs *regs);
+extern int (*__debugger_ipi)(struct pt_regs *regs);
+extern int (*__debugger_bpt)(struct pt_regs *regs);
+extern int (*__debugger_sstep)(struct pt_regs *regs);
+extern int (*__debugger_iabr_match)(struct pt_regs *regs);
+extern int (*__debugger_dabr_match)(struct pt_regs *regs);
+extern int (*__debugger_fault_handler)(struct pt_regs *regs);
+
+#define DEBUGGER_BOILERPLATE(__NAME) \
+static inline int __NAME(struct pt_regs *regs) \
+{ \
+ if (unlikely(__ ## __NAME)) \
+ return __ ## __NAME(regs); \
+ return 0; \
+}
+
+DEBUGGER_BOILERPLATE(debugger)
+DEBUGGER_BOILERPLATE(debugger_ipi)
+DEBUGGER_BOILERPLATE(debugger_bpt)
+DEBUGGER_BOILERPLATE(debugger_sstep)
+DEBUGGER_BOILERPLATE(debugger_iabr_match)
+DEBUGGER_BOILERPLATE(debugger_dabr_match)
+DEBUGGER_BOILERPLATE(debugger_fault_handler)
+
+#else
+static inline int debugger(struct pt_regs *regs) { return 0; }
+static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
+static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
+static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
+static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
+static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
+static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
+#endif
+
+extern int set_dabr(unsigned long dabr);
+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
+extern void do_send_trap(struct pt_regs *regs, unsigned long address,
+ unsigned long error_code, int signal_code, int brkpt);
+#else
+extern void do_dabr(struct pt_regs *regs, unsigned long address,
+ unsigned long error_code);
+#endif
+
+#endif /* _ASM_POWERPC_DEBUG_H */
diff --git a/arch/powerpc/include/asm/exec.h b/arch/powerpc/include/asm/exec.h
new file mode 100644
index 0000000..8196e9c
--- /dev/null
+++ b/arch/powerpc/include/asm/exec.h
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <[email protected]>
+ */
+#ifndef _ASM_POWERPC_EXEC_H
+#define _ASM_POWERPC_EXEC_H
+
+extern unsigned long arch_align_stack(unsigned long sp);
+
+#endif /* _ASM_POWERPC_EXEC_H */
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index bc4f7ef..be04330 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -35,6 +35,7 @@ struct arch_hw_breakpoint {

#include <linux/kdebug.h>
#include <asm/reg.h>
+#include <asm/debug.h>

struct perf_event;
struct pmu;
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index c0e1bc3..034c5ca 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -68,6 +68,7 @@ typedef unsigned long irq_hw_number_t;
*/
struct irq_host;
struct radix_tree_root;
+struct device_node;

/* Functions below are provided by the host and called whenever a new mapping
* is created or an old mapping is disposed. The host can then proceed to
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index b585bff..8e2d037 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -385,6 +385,36 @@ static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
extern unsigned long cpuidle_disable;
enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};

+extern int powersave_nap; /* set if nap mode can be used in idle loop */
+void cpu_idle_wait(void);
+
+#ifdef CONFIG_PSERIES_IDLE
+extern void update_smt_snooze_delay(int snooze);
+extern int pseries_notify_cpuidle_add_cpu(int cpu);
+#else
+static inline void update_smt_snooze_delay(int snooze) {}
+static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
+#endif
+
+extern void flush_instruction_cache(void);
+extern void hard_reset_now(void);
+extern void poweroff_now(void);
+extern int fix_alignment(struct pt_regs *);
+extern void cvt_fd(float *from, double *to);
+extern void cvt_df(double *from, float *to);
+extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
+
+#ifdef CONFIG_PPC64
+/*
+ * We handle most unaligned accesses in hardware. On the other hand
+ * unaligned DMA can be very expensive on some ppc64 IO chips (it does
+ * powers of 2 writes until it reaches sufficient alignment).
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN 0
+#endif
+
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_PROCESSOR_H */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 500fe1d..0e94450 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -15,6 +15,11 @@
#ifndef __ASM_POWERPC_REG_BOOKE_H__
#define __ASM_POWERPC_REG_BOOKE_H__

+#ifdef CONFIG_BOOKE_WDT
+extern u32 booke_wdt_enabled;
+extern u32 booke_wdt_period;
+#endif /* CONFIG_BOOKE_WDT */
+
/* Machine State Register (MSR) Fields */
#define MSR_GS (1<<28) /* Guest state */
#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 01c143b..9d6c37a 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -325,5 +325,7 @@ static inline int page_is_rtas_user_buf(unsigned long pfn)
static inline int page_is_rtas_user_buf(unsigned long pfn) { return 0;}
#endif

+extern int call_rtas(const char *, int, int, unsigned long *, ...);
+
#endif /* __KERNEL__ */
#endif /* _POWERPC_RTAS_H */
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 186e0fb..d084ce1 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -5,6 +5,28 @@

#ifndef __ASSEMBLY__
extern void ppc_printk_progress(char *s, unsigned short hex);
-#endif
+
+extern unsigned int rtas_data;
+extern int mem_init_done; /* set on boot once kmalloc can be called */
+extern int init_bootmem_done; /* set once bootmem is available */
+extern phys_addr_t memory_limit;
+extern unsigned long klimit;
+extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
+
+extern void via_cuda_init(void);
+extern void read_rtc_time(void);
+extern void pmac_find_display(void);
+
+struct device_node;
+extern void note_scsi_host(struct device_node *, void *);
+
+/* Used in very early kernel initialization. */
+extern unsigned long reloc_offset(void);
+extern unsigned long add_reloc_offset(unsigned long);
+extern void reloc_got2(unsigned long);
+
+#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
+
+#endif /* !__ASSEMBLY__ */

#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
new file mode 100644
index 0000000..caf82d0
--- /dev/null
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <[email protected]>
+ */
+#ifndef _ASM_POWERPC_SWITCH_TO_H
+#define _ASM_POWERPC_SWITCH_TO_H
+
+struct thread_struct;
+struct task_struct;
+struct pt_regs;
+
+extern struct task_struct *__switch_to(struct task_struct *,
+ struct task_struct *);
+#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
+
+struct thread_struct;
+extern struct task_struct *_switch(struct thread_struct *prev,
+ struct thread_struct *next);
+
+extern void giveup_fpu(struct task_struct *);
+extern void disable_kernel_fp(void);
+extern void enable_kernel_fp(void);
+extern void flush_fp_to_thread(struct task_struct *);
+extern void enable_kernel_altivec(void);
+extern void giveup_altivec(struct task_struct *);
+extern void load_up_altivec(struct task_struct *);
+extern int emulate_altivec(struct pt_regs *);
+extern void __giveup_vsx(struct task_struct *);
+extern void giveup_vsx(struct task_struct *);
+extern void enable_kernel_spe(void);
+extern void giveup_spe(struct task_struct *);
+extern void load_up_spe(struct task_struct *);
+
+#ifndef CONFIG_SMP
+extern void discard_lazy_cpu_state(void);
+#else
+static inline void discard_lazy_cpu_state(void)
+{
+}
+#endif
+
+#ifdef CONFIG_ALTIVEC
+extern void flush_altivec_to_thread(struct task_struct *);
+#else
+static inline void flush_altivec_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#ifdef CONFIG_VSX
+extern void flush_vsx_to_thread(struct task_struct *);
+#else
+static inline void flush_vsx_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#ifdef CONFIG_SPE
+extern void flush_spe_to_thread(struct task_struct *);
+#else
+static inline void flush_spe_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#endif /* _ASM_POWERPC_SWITCH_TO_H */
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
deleted file mode 100644
index c377457..0000000
--- a/arch/powerpc/include/asm/system.h
+++ /dev/null
@@ -1,554 +0,0 @@
-/*
- * Copyright (C) 1999 Cort Dougan <[email protected]>
- */
-#ifndef _ASM_POWERPC_SYSTEM_H
-#define _ASM_POWERPC_SYSTEM_H
-
-#include <linux/kernel.h>
-#include <linux/irqflags.h>
-
-#include <asm/hw_irq.h>
-
-/*
- * Memory barrier.
- * The sync instruction guarantees that all memory accesses initiated
- * by this processor have been performed (with respect to all other
- * mechanisms that access memory). The eieio instruction is a barrier
- * providing an ordering (separately) for (a) cacheable stores and (b)
- * loads and stores to non-cacheable memory (e.g. I/O devices).
- *
- * mb() prevents loads and stores being reordered across this point.
- * rmb() prevents loads being reordered across this point.
- * wmb() prevents stores being reordered across this point.
- * read_barrier_depends() prevents data-dependent loads being reordered
- * across this point (nop on PPC).
- *
- * *mb() variants without smp_ prefix must order all types of memory
- * operations with one another. sync is the only instruction sufficient
- * to do this.
- *
- * For the smp_ barriers, ordering is for cacheable memory operations
- * only. We have to use the sync instruction for smp_mb(), since lwsync
- * doesn't order loads with respect to previous stores. Lwsync can be
- * used for smp_rmb() and smp_wmb().
- *
- * However, on CPUs that don't support lwsync, lwsync actually maps to a
- * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
- */
-#define mb() __asm__ __volatile__ ("sync" : : : "memory")
-#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
-#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
-#define read_barrier_depends() do { } while(0)
-
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#ifdef __KERNEL__
-#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
-#ifdef CONFIG_SMP
-
-#ifdef __SUBARCH_HAS_LWSYNC
-# define SMPWMB LWSYNC
-#else
-# define SMPWMB eieio
-#endif
-
-#define smp_mb() mb()
-#define smp_rmb() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
-#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif /* CONFIG_SMP */
-
-/*
- * This is a barrier which prevents following instructions from being
- * started until the value of the argument x is known. For example, if
- * x is a variable loaded from memory, this prevents following
- * instructions from being executed until the load has been performed.
- */
-#define data_barrier(x) \
- asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
-
-struct task_struct;
-struct pt_regs;
-
-#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
-
-extern int (*__debugger)(struct pt_regs *regs);
-extern int (*__debugger_ipi)(struct pt_regs *regs);
-extern int (*__debugger_bpt)(struct pt_regs *regs);
-extern int (*__debugger_sstep)(struct pt_regs *regs);
-extern int (*__debugger_iabr_match)(struct pt_regs *regs);
-extern int (*__debugger_dabr_match)(struct pt_regs *regs);
-extern int (*__debugger_fault_handler)(struct pt_regs *regs);
-
-#define DEBUGGER_BOILERPLATE(__NAME) \
-static inline int __NAME(struct pt_regs *regs) \
-{ \
- if (unlikely(__ ## __NAME)) \
- return __ ## __NAME(regs); \
- return 0; \
-}
-
-DEBUGGER_BOILERPLATE(debugger)
-DEBUGGER_BOILERPLATE(debugger_ipi)
-DEBUGGER_BOILERPLATE(debugger_bpt)
-DEBUGGER_BOILERPLATE(debugger_sstep)
-DEBUGGER_BOILERPLATE(debugger_iabr_match)
-DEBUGGER_BOILERPLATE(debugger_dabr_match)
-DEBUGGER_BOILERPLATE(debugger_fault_handler)
-
-#else
-static inline int debugger(struct pt_regs *regs) { return 0; }
-static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
-static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
-static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
-static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
-static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
-static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
-#endif
-
-extern int set_dabr(unsigned long dabr);
-#ifdef CONFIG_PPC_ADV_DEBUG_REGS
-extern void do_send_trap(struct pt_regs *regs, unsigned long address,
- unsigned long error_code, int signal_code, int brkpt);
-#else
-extern void do_dabr(struct pt_regs *regs, unsigned long address,
- unsigned long error_code);
-#endif
-extern void print_backtrace(unsigned long *);
-extern void flush_instruction_cache(void);
-extern void hard_reset_now(void);
-extern void poweroff_now(void);
-
-#ifdef CONFIG_6xx
-extern long _get_L2CR(void);
-extern long _get_L3CR(void);
-extern void _set_L2CR(unsigned long);
-extern void _set_L3CR(unsigned long);
-#else
-#define _get_L2CR() 0L
-#define _get_L3CR() 0L
-#define _set_L2CR(val) do { } while(0)
-#define _set_L3CR(val) do { } while(0)
-#endif
-
-extern void via_cuda_init(void);
-extern void read_rtc_time(void);
-extern void pmac_find_display(void);
-extern void giveup_fpu(struct task_struct *);
-extern void disable_kernel_fp(void);
-extern void enable_kernel_fp(void);
-extern void flush_fp_to_thread(struct task_struct *);
-extern void enable_kernel_altivec(void);
-extern void giveup_altivec(struct task_struct *);
-extern void load_up_altivec(struct task_struct *);
-extern int emulate_altivec(struct pt_regs *);
-extern void __giveup_vsx(struct task_struct *);
-extern void giveup_vsx(struct task_struct *);
-extern void enable_kernel_spe(void);
-extern void giveup_spe(struct task_struct *);
-extern void load_up_spe(struct task_struct *);
-extern int fix_alignment(struct pt_regs *);
-extern void cvt_fd(float *from, double *to);
-extern void cvt_df(double *from, float *to);
-
-#ifndef CONFIG_SMP
-extern void discard_lazy_cpu_state(void);
-#else
-static inline void discard_lazy_cpu_state(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ALTIVEC
-extern void flush_altivec_to_thread(struct task_struct *);
-#else
-static inline void flush_altivec_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-#ifdef CONFIG_VSX
-extern void flush_vsx_to_thread(struct task_struct *);
-#else
-static inline void flush_vsx_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-#ifdef CONFIG_SPE
-extern void flush_spe_to_thread(struct task_struct *);
-#else
-static inline void flush_spe_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-extern int call_rtas(const char *, int, int, unsigned long *, ...);
-extern void cacheable_memzero(void *p, unsigned int nb);
-extern void *cacheable_memcpy(void *, const void *, unsigned int);
-extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
-extern void bad_page_fault(struct pt_regs *, unsigned long, int);
-extern void _exception(int, struct pt_regs *, int, unsigned long);
-extern void die(const char *, struct pt_regs *, long);
-extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
-
-#ifdef CONFIG_BOOKE_WDT
-extern u32 booke_wdt_enabled;
-extern u32 booke_wdt_period;
-#endif /* CONFIG_BOOKE_WDT */
-
-struct device_node;
-extern void note_scsi_host(struct device_node *, void *);
-
-extern struct task_struct *__switch_to(struct task_struct *,
- struct task_struct *);
-#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
-
-struct thread_struct;
-extern struct task_struct *_switch(struct thread_struct *prev,
- struct thread_struct *next);
-
-extern unsigned int rtas_data;
-extern int mem_init_done; /* set on boot once kmalloc can be called */
-extern int init_bootmem_done; /* set once bootmem is available */
-extern phys_addr_t memory_limit;
-extern unsigned long klimit;
-extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
-
-extern int powersave_nap; /* set if nap mode can be used in idle loop */
-void cpu_idle_wait(void);
-
-#ifdef CONFIG_PSERIES_IDLE
-extern void update_smt_snooze_delay(int snooze);
-extern int pseries_notify_cpuidle_add_cpu(int cpu);
-#else
-static inline void update_smt_snooze_delay(int snooze) {}
-static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
-#endif
-
-/*
- * Atomic exchange
- *
- * Changes the memory location '*ptr' to be val and returns
- * the previous value stored there.
- */
-static __always_inline unsigned long
-__xchg_u32(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
- PPC_RELEASE_BARRIER
-"1: lwarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stwcx. %3,0,%2 \n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-/*
- * Atomic exchange
- *
- * Changes the memory location '*ptr' to be val and returns
- * the previous value stored there.
- */
-static __always_inline unsigned long
-__xchg_u32_local(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stwcx. %3,0,%2 \n\
- bne- 1b"
- : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-#ifdef CONFIG_PPC64
-static __always_inline unsigned long
-__xchg_u64(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
- PPC_RELEASE_BARRIER
-"1: ldarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stdcx. %3,0,%2 \n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
-__xchg_u64_local(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
-"1: ldarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stdcx. %3,0,%2 \n\
- bne- 1b"
- : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-#endif
-
-/*
- * This function doesn't exist, so you'll get a linker error
- * if something tries to do an invalid xchg().
- */
-extern void __xchg_called_with_bad_pointer(void);
-
-static __always_inline unsigned long
-__xchg(volatile void *ptr, unsigned long x, unsigned int size)
-{
- switch (size) {
- case 4:
- return __xchg_u32(ptr, x);
-#ifdef CONFIG_PPC64
- case 8:
- return __xchg_u64(ptr, x);
-#endif
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-
-static __always_inline unsigned long
-__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
-{
- switch (size) {
- case 4:
- return __xchg_u32_local(ptr, x);
-#ifdef CONFIG_PPC64
- case 8:
- return __xchg_u64_local(ptr, x);
-#endif
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-#define xchg(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
- })
-
-#define xchg_local(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg_local((ptr), \
- (unsigned long)_x_, sizeof(*(ptr))); \
- })
-
-/*
- * Compare and exchange - if *p == old, set it to new,
- * and return the old value of *p.
- */
-#define __HAVE_ARCH_CMPXCHG 1
-
-static __always_inline unsigned long
-__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
-{
- unsigned int prev;
-
- __asm__ __volatile__ (
- PPC_RELEASE_BARRIER
-"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
- cmpw 0,%0,%3\n\
- bne- 2f\n"
- PPC405_ERR77(0,%2)
-" stwcx. %4,0,%2\n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
-__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
- unsigned long new)
-{
- unsigned int prev;
-
- __asm__ __volatile__ (
-"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
- cmpw 0,%0,%3\n\
- bne- 2f\n"
- PPC405_ERR77(0,%2)
-" stwcx. %4,0,%2\n\
- bne- 1b"
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-
-#ifdef CONFIG_PPC64
-static __always_inline unsigned long
-__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
-{
- unsigned long prev;
-
- __asm__ __volatile__ (
- PPC_RELEASE_BARRIER
-"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
- cmpd 0,%0,%3\n\
- bne- 2f\n\
- stdcx. %4,0,%2\n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
-__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
- unsigned long new)
-{
- unsigned long prev;
-
- __asm__ __volatile__ (
-"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
- cmpd 0,%0,%3\n\
- bne- 2f\n\
- stdcx. %4,0,%2\n\
- bne- 1b"
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-#endif
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static __always_inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
- unsigned int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
-#ifdef CONFIG_PPC64
- case 8:
- return __cmpxchg_u64(ptr, old, new);
-#endif
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-static __always_inline unsigned long
-__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
- unsigned int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32_local(ptr, old, new);
-#ifdef CONFIG_PPC64
- case 8:
- return __cmpxchg_u64_local(ptr, old, new);
-#endif
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-
-#define cmpxchg_local(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-#ifdef CONFIG_PPC64
-/*
- * We handle most unaligned accesses in hardware. On the other hand
- * unaligned DMA can be very expensive on some ppc64 IO chips (it does
- * powers of 2 writes until it reaches sufficient alignment).
- *
- * Based on this we disable the IP header alignment in network drivers.
- */
-#define NET_IP_ALIGN 0
-
-#define cmpxchg64(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg((ptr), (o), (n)); \
- })
-#define cmpxchg64_local(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg_local((ptr), (o), (n)); \
- })
-#else
-#include <asm-generic/cmpxchg-local.h>
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-#endif
-
-extern unsigned long arch_align_stack(unsigned long sp);
-
-/* Used in very early kernel initialization. */
-extern unsigned long reloc_offset(void);
-extern unsigned long add_reloc_offset(unsigned long);
-extern void reloc_got2(unsigned long);
-
-#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
-
-extern struct dentry *powerpc_debugfs_root;
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_POWERPC_SYSTEM_H */
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 5aad9aa..ee5b690 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -24,6 +24,7 @@
#include <asm/cache.h>
#include <asm/cputable.h>
#include <asm/emulated_ops.h>
+#include <asm/switch_to.h>

struct aligninfo {
unsigned char len;
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 81db9e2..ff381f4 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -20,6 +20,7 @@
#include <asm/cputable.h>
#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
#include <asm/mmu.h>
+#include <asm/setup.h>

struct cpu_spec* cur_cpu_spec = NULL;
EXPORT_SYMBOL(cur_cpu_spec);
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index b6b6fba..fdcd8f5 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -28,6 +28,7 @@
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/setjmp.h>
+#include <asm/debug.h>

/*
* The primary CPU waits a while for all secondary CPUs to enter. This is to
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 298eb9d..786a270 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -42,6 +42,7 @@
#include <asm/signal.h>
#include <asm/dcr.h>
#include <asm/ftrace.h>
+#include <asm/switch_to.h>

#ifdef CONFIG_PPC32
extern void transfer_to_handler(void);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index d76021d..bb67db0 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -48,6 +48,8 @@
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/syscalls.h>
+#include <asm/switch_to.h>
+#include <asm/debug.h>
#ifdef CONFIG_PPC64
#include <asm/firmware.h>
#endif
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 4b9f5a3..8d8e028 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -36,6 +36,7 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
+#include <asm/switch_to.h>

#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 24352e2..469349d 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -32,6 +32,7 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
+#include <asm/switch_to.h>

/*
* does not yet catch signals sent when the child dies.
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index ac6e437..d9e9ca9 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -15,6 +15,7 @@
#include <asm/hw_breakpoint.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
+#include <asm/debug.h>

#include "signal.h"

diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 836a5a1..6d10f8c 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -43,6 +43,7 @@
#include <asm/syscalls.h>
#include <asm/sigcontext.h>
#include <asm/vdso.h>
+#include <asm/switch_to.h>
#ifdef CONFIG_PPC64
#include "ppc32.h"
#include <asm/unistd.h>
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index a50b5ec..2692efd 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -33,6 +33,7 @@
#include <asm/cacheflush.h>
#include <asm/syscalls.h>
#include <asm/vdso.h>
+#include <asm/switch_to.h>

#include "signal.h"

diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index c7d33c5..d9f9441 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -48,6 +48,7 @@
#ifdef CONFIG_PPC64
#include <asm/paca.h>
#endif
+#include <asm/debug.h>

#ifdef DEBUG
#include <asm/udbg.h>
diff --git a/arch/powerpc/kernel/swsusp.c b/arch/powerpc/kernel/swsusp.c
index 3d4c59a..eae33e1 100644
--- a/arch/powerpc/kernel/swsusp.c
+++ b/arch/powerpc/kernel/swsusp.c
@@ -12,6 +12,7 @@
#include <linux/sched.h>
#include <asm/current.h>
#include <asm/mmu_context.h>
+#include <asm/switch_to.h>

void save_processor_state(void)
{
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index 4e5bf1e..81c5706 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -50,6 +50,7 @@
#include <asm/mmu_context.h>
#include <asm/ppc-pci.h>
#include <asm/syscalls.h>
+#include <asm/switch_to.h>


asmlinkage long ppc32_select(u32 n, compat_ulong_t __user *inp,
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index cffc683..db1ede7 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -56,6 +56,8 @@
#include <asm/kexec.h>
#include <asm/ppc-opcode.h>
#include <asm/rio.h>
+#include <asm/switch_to.h>
+#include <asm/debug.h>

#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
int (*__debugger)(struct pt_regs *regs) __read_mostly;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 336983d..6efde9c 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -45,6 +45,7 @@
#include <asm/cputhreads.h>
#include <asm/page.h>
#include <asm/hvcall.h>
+#include <asm/switch_to.h>
#include <linux/gfp.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
diff --git a/arch/powerpc/lib/alloc.c b/arch/powerpc/lib/alloc.c
index d8d7806..da22c84 100644
--- a/arch/powerpc/lib/alloc.c
+++ b/arch/powerpc/lib/alloc.c
@@ -3,6 +3,7 @@
#include <linux/slab.h>
#include <linux/bootmem.h>
#include <linux/string.h>
+#include <asm/setup.h>


void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
diff --git a/arch/powerpc/lib/copyuser_power7_vmx.c b/arch/powerpc/lib/copyuser_power7_vmx.c
index 6e1efad..bf2654f 100644
--- a/arch/powerpc/lib/copyuser_power7_vmx.c
+++ b/arch/powerpc/lib/copyuser_power7_vmx.c
@@ -20,6 +20,7 @@
*/
#include <linux/uaccess.h>
#include <linux/hardirq.h>
+#include <asm/switch_to.h>

int enter_vmx_copy(void)
{
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index b402733..253e6f5 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -41,6 +41,7 @@
#include <asm/uaccess.h>
#include <asm/tlbflush.h>
#include <asm/siginfo.h>
+#include <asm/debug.h>
#include <mm/mmu_decl.h>

#include "icswx.h"
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 69bad1a..b6edbb3 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -28,6 +28,7 @@
#include <asm/firmware.h>
#include <asm/paca.h>
#include <asm/hvcall.h>
+#include <asm/setup.h>

static int numa_enabled = 1;

diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 51f8795..e9c513a 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -33,6 +33,7 @@
#include <asm/pgalloc.h>
#include <asm/fixmap.h>
#include <asm/io.h>
+#include <asm/setup.h>

#include "mmu_decl.h"

diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 35fa6d2..dd981728 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -38,6 +38,7 @@
#include <asm/smp.h>
#include <asm/time.h>
#include <asm/mmu.h>
+#include <asm/debug.h>

#include <pcmcia/ss.h>
#include <pcmcia/cistpl.h>
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index 84d7fd9..3e91ef5 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -19,6 +19,7 @@
#include <asm/bootx.h>
#include <asm/btext.h>
#include <asm/io.h>
+#include <asm/setup.h>

#undef DEBUG
#define SET_BOOT_BAT
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 4d34687..6417119 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -35,6 +35,7 @@
#include <asm/time.h>
#include <asm/mpic.h>
#include <asm/keylargo.h>
+#include <asm/switch_to.h>

/* WARNING !!! This will cause calibrate_delay() to be called,
* but this is an __init function ! So you MUST go edit
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index 8bd6ba5..de2aea4 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -29,6 +29,7 @@
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/lv1call.h>
+#include <asm/setup.h>

#include "platform.h"

diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index 0ef143d..a764854 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -28,6 +28,7 @@
#include <asm/uaccess.h>
#include <asm/firmware.h>
#include <asm/lppaca.h>
+#include <asm/debug.h>

#include "plpar_wrappers.h"

diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 5287e95..0968b66 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/bitmap.h>
#include <asm/msi_bitmap.h>
+#include <asm/setup.h>

int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num)
{
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index cb95eea..d240f0c 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -42,6 +42,7 @@
#include <asm/firmware.h>
#include <asm/setjmp.h>
#include <asm/reg.h>
+#include <asm/debug.h>

#ifdef CONFIG_PPC64
#include <asm/hvcall.h>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 24/29] Disintegrate asm/system.h for SH
March 07, 2012 09:06PM
Disintegrate asm/system.h for SH.

Signed-off-by: David Howells <[email protected]>
---

arch/sh/include/asm/atomic-irq.h | 2
arch/sh/include/asm/atomic.h | 53 ++++++++
arch/sh/include/asm/auxvec.h | 2
arch/sh/include/asm/barrier.h | 54 ++++++++
arch/sh/include/asm/bl_bit.h | 10 +
arch/sh/include/asm/bl_bit_32.h | 33 +++++
arch/sh/include/asm/bl_bit_64.h | 38 +++++
arch/sh/include/asm/bug.h | 5 +
arch/sh/include/asm/cache_insns.h | 11 ++
arch/sh/include/asm/cache_insns_32.h | 19 +++
arch/sh/include/asm/cache_insns_64.h | 23 +++
arch/sh/include/asm/exec.h | 10 +
arch/sh/include/asm/processor.h | 15 ++
arch/sh/include/asm/setup.h | 1
arch/sh/include/asm/switch_to.h | 19 +++
arch/sh/include/asm/switch_to_32.h | 134 +++++++++++++++++++
arch/sh/include/asm/switch_to_64.h | 35 +++++
arch/sh/include/asm/system.h | 183 --------------------------
arch/sh/include/asm/system_32.h | 236 ----------------------------------
arch/sh/include/asm/system_64.h | 79 -----------
arch/sh/include/asm/traps.h | 20 +++
arch/sh/include/asm/traps_32.h | 68 ++++++++++
arch/sh/include/asm/traps_64.h | 24 +++
arch/sh/include/asm/uaccess.h | 14 ++
arch/sh/kernel/cpu/init.c | 1
arch/sh/kernel/hw_breakpoint.c | 1
arch/sh/kernel/idle.c | 1
arch/sh/kernel/process_64.c | 1
arch/sh/kernel/ptrace_64.c | 1
arch/sh/kernel/reboot.c | 1
arch/sh/kernel/traps.c | 1
arch/sh/kernel/traps_32.c | 2
arch/sh/mm/fault_32.c | 1
arch/sh/mm/flush-sh4.c | 1
34 files changed, 601 insertions(+), 498 deletions(-)
create mode 100644 arch/sh/include/asm/barrier.h
create mode 100644 arch/sh/include/asm/bl_bit.h
create mode 100644 arch/sh/include/asm/bl_bit_32.h
create mode 100644 arch/sh/include/asm/bl_bit_64.h
create mode 100644 arch/sh/include/asm/cache_insns.h
create mode 100644 arch/sh/include/asm/cache_insns_32.h
create mode 100644 arch/sh/include/asm/cache_insns_64.h
create mode 100644 arch/sh/include/asm/exec.h
create mode 100644 arch/sh/include/asm/switch_to.h
create mode 100644 arch/sh/include/asm/switch_to_32.h
create mode 100644 arch/sh/include/asm/switch_to_64.h
delete mode 100644 arch/sh/include/asm/system.h
delete mode 100644 arch/sh/include/asm/system_32.h
delete mode 100644 arch/sh/include/asm/system_64.h
create mode 100644 arch/sh/include/asm/traps.h
create mode 100644 arch/sh/include/asm/traps_32.h
create mode 100644 arch/sh/include/asm/traps_64.h

diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h
index 467d941..9f7c566 100644
--- a/arch/sh/include/asm/atomic-irq.h
+++ b/arch/sh/include/asm/atomic-irq.h
@@ -1,6 +1,8 @@
#ifndef __ASM_SH_ATOMIC_IRQ_H
#define __ASM_SH_ATOMIC_IRQ_H

+#include <linux/irqflags.h>
+
/*
* To get proper branch prediction for the main line, we must branch
* forward to code at the end of this object's .text section, then
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 31f4a9a..de3a173 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -17,10 +17,13 @@

#if defined(CONFIG_GUSA_RB)
#include <asm/atomic-grb.h>
+#include <asm/cmpxchg-grb.h>
#elif defined(CONFIG_CPU_SH4A)
#include <asm/atomic-llsc.h>
+#include <asm/cmpxchg-llsc.h>
#else
#include <asm/atomic-irq.h>
+#include <asm/cmpxchg-irq.h>
#endif

#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
@@ -33,6 +36,56 @@
#define atomic_inc(v) atomic_add(1, (v))
#define atomic_dec(v) atomic_sub(1, (v))

+extern void __xchg_called_with_bad_pointer(void);
+
+#define __xchg(ptr, x, size) \
+({ \
+ unsigned long __xchg__res; \
+ volatile void *__xchg_ptr = (ptr); \
+ switch (size) { \
+ case 4: \
+ __xchg__res = xchg_u32(__xchg_ptr, x); \
+ break; \
+ case 1: \
+ __xchg__res = xchg_u8(__xchg_ptr, x); \
+ break; \
+ default: \
+ __xchg_called_with_bad_pointer(); \
+ __xchg__res = x; \
+ break; \
+ } \
+ \
+ __xchg__res; \
+})
+
+#define xchg(ptr,x) \
+ ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr))))
+
+/* This function doesn't exist, so you'll get a linker error
+ * if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr,o,n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+ })
+
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))

diff --git a/arch/sh/include/asm/auxvec.h b/arch/sh/include/asm/auxvec.h
index 483effd..8bcc51a 100644
--- a/arch/sh/include/asm/auxvec.h
+++ b/arch/sh/include/asm/auxvec.h
@@ -33,4 +33,6 @@
#define AT_L1D_CACHESHAPE 35
#define AT_L2_CACHESHAPE 36

+#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
+
#endif /* __ASM_SH_AUXVEC_H */
diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h
new file mode 100644
index 0000000..72c103d
--- /dev/null
+++ b/arch/sh/include/asm/barrier.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
+ * Copyright (C) 2002 Paul Mundt
+ */
+#ifndef __ASM_SH_BARRIER_H
+#define __ASM_SH_BARRIER_H
+
+#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
+#include <asm/cache_insns.h>
+#endif
+
+/*
+ * A brief note on ctrl_barrier(), the control register write barrier.
+ *
+ * Legacy SH cores typically require a sequence of 8 nops after
+ * modification of a control register in order for the changes to take
+ * effect. On newer cores (like the sh4a and sh5) this is accomplished
+ * with icbi.
+ *
+ * Also note that on sh4a in the icbi case we can forego a synco for the
+ * write barrier, as it's not necessary for control registers.
+ *
+ * Historically we have only done this type of barrier for the MMUCR, but
+ * it's also necessary for the CCR, so we make it generic here instead.
+ */
+#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
+#define mb() __asm__ __volatile__ ("synco": : :"memory")
+#define rmb() mb()
+#define wmb() __asm__ __volatile__ ("synco": : :"memory")
+#define ctrl_barrier() __icbi(PAGE_OFFSET)
+#define read_barrier_depends() do { } while(0)
+#else
+#define mb() __asm__ __volatile__ ("": : :"memory")
+#define rmb() mb()
+#define wmb() __asm__ __volatile__ ("": : :"memory")
+#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")
+#define read_barrier_depends() do { } while(0)
+#endif
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while(0)
+#endif
+
+#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
+
+#endif /* __ASM_SH_BARRIER_H */
diff --git a/arch/sh/include/asm/bl_bit.h b/arch/sh/include/asm/bl_bit.h
new file mode 100644
index 0000000..45e6b9f
--- /dev/null
+++ b/arch/sh/include/asm/bl_bit.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_SH_BL_BIT_H
+#define __ASM_SH_BL_BIT_H
+
+#ifdef CONFIG_SUPERH32
+# include "bl_bit_32.h"
+#else
+# include "bl_bit_64.h"
+#endif
+
+#endif /* __ASM_SH_BL_BIT_H */
diff --git a/arch/sh/include/asm/bl_bit_32.h b/arch/sh/include/asm/bl_bit_32.h
new file mode 100644
index 0000000..fd21eee
--- /dev/null
+++ b/arch/sh/include/asm/bl_bit_32.h
@@ -0,0 +1,33 @@
+#ifndef __ASM_SH_BL_BIT_32_H
+#define __ASM_SH_BL_BIT_32_H
+
+static inline void set_bl_bit(void)
+{
+ unsigned long __dummy0, __dummy1;
+
+ __asm__ __volatile__ (
+ "stc sr, %0\n\t"
+ "or %2, %0\n\t"
+ "and %3, %0\n\t"
+ "ldc %0, sr\n\t"
+ : "=&r" (__dummy0), "=r" (__dummy1)
+ : "r" (0x10000000), "r" (0xffffff0f)
+ : "memory"
+ );
+}
+
+static inline void clear_bl_bit(void)
+{
+ unsigned long __dummy0, __dummy1;
+
+ __asm__ __volatile__ (
+ "stc sr, %0\n\t"
+ "and %2, %0\n\t"
+ "ldc %0, sr\n\t"
+ : "=&r" (__dummy0), "=r" (__dummy1)
+ : "1" (~0x10000000)
+ : "memory"
+ );
+}
+
+#endif /* __ASM_SH_BL_BIT_32_H */
diff --git a/arch/sh/include/asm/bl_bit_64.h b/arch/sh/include/asm/bl_bit_64.h
new file mode 100644
index 0000000..8ec480c
--- /dev/null
+++ b/arch/sh/include/asm/bl_bit_64.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2000, 2001 Paolo Alberelli
+ * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2004 Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_BL_BIT_64_H
+#define __ASM_SH_BL_BIT_64_H
+
+#define SR_BL_LL 0x0000000010000000LL
+
+static inline void set_bl_bit(void)
+{
+ unsigned long long __dummy0, __dummy1 = SR_BL_LL;
+
+ __asm__ __volatile__("getcon " __SR ", %0\n\t"
+ "or %0, %1, %0\n\t"
+ "putcon %0, " __SR "\n\t"
+ : "=&r" (__dummy0)
+ : "r" (__dummy1));
+
+}
+
+static inline void clear_bl_bit(void)
+{
+ unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
+
+ __asm__ __volatile__("getcon " __SR ", %0\n\t"
+ "and %0, %1, %0\n\t"
+ "putcon %0, " __SR "\n\t"
+ : "=&r" (__dummy0)
+ : "r" (__dummy1));
+}
+
+#endif /* __ASM_SH_BL_BIT_64_H */
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h
index 6323f86..2b87d86 100644
--- a/arch/sh/include/asm/bug.h
+++ b/arch/sh/include/asm/bug.h
@@ -1,6 +1,8 @@
#ifndef __ASM_SH_BUG_H
#define __ASM_SH_BUG_H

+#include <linux/linkage.h>
+
#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */
#define BUGFLAG_UNWINDER (1 << 1)

@@ -107,4 +109,7 @@ do { \

#include <asm-generic/bug.h>

+struct pt_regs;
+extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
+
#endif /* __ASM_SH_BUG_H */
diff --git a/arch/sh/include/asm/cache_insns.h b/arch/sh/include/asm/cache_insns.h
new file mode 100644
index 0000000..d25fbe5
--- /dev/null
+++ b/arch/sh/include/asm/cache_insns.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_SH_CACHE_INSNS_H
+#define __ASM_SH_CACHE_INSNS_H
+
+
+#ifdef CONFIG_SUPERH32
+# include "cache_insns_32.h"
+#else
+# include "cache_insns_64.h"
+#endif
+
+#endif /* __ASM_SH_CACHE_INSNS_H */
diff --git a/arch/sh/include/asm/cache_insns_32.h b/arch/sh/include/asm/cache_insns_32.h
new file mode 100644
index 0000000..7d1bb50
--- /dev/null
+++ b/arch/sh/include/asm/cache_insns_32.h
@@ -0,0 +1,19 @@
+#ifndef __ASM_SH_CACHE_INSNS_32_H
+#define __ASM_SH_CACHE_INSNS_32_H
+
+#if defined(CONFIG_CPU_SH4A)
+#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
+#else
+#define __icbi(addr) mb()
+#endif
+
+#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
+#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
+#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
+
+static inline reg_size_t register_align(void *val)
+{
+ return (unsigned long)(signed long)val;
+}
+
+#endif /* __ASM_SH_CACHE_INSNS_32_H */
diff --git a/arch/sh/include/asm/cache_insns_64.h b/arch/sh/include/asm/cache_insns_64.h
new file mode 100644
index 0000000..70b6357
--- /dev/null
+++ b/arch/sh/include/asm/cache_insns_64.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2000, 2001 Paolo Alberelli
+ * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2004 Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_CACHE_INSNS_64_H
+#define __ASM_SH_CACHE_INSNS_64_H
+
+#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
+#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
+#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
+#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
+
+static inline reg_size_t register_align(void *val)
+{
+ return (unsigned long long)(signed long long)(signed long)val;
+}
+
+#endif /* __ASM_SH_CACHE_INSNS_64_H */
diff --git a/arch/sh/include/asm/exec.h b/arch/sh/include/asm/exec.h
new file mode 100644
index 0000000..69486a9
--- /dev/null
+++ b/arch/sh/include/asm/exec.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
+ * Copyright (C) 2002 Paul Mundt
+ */
+#ifndef __ASM_SH_EXEC_H
+#define __ASM_SH_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __ASM_SH_EXEC_H */
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 9c7bdfc..a229c39 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -101,6 +101,10 @@ extern struct sh_cpuinfo cpu_data[];
#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
#define cpu_relax() barrier()

+void default_idle(void);
+void cpu_idle_wait(void);
+void stop_this_cpu(void *);
+
/* Forward decl */
struct seq_operations;
struct task_struct;
@@ -161,6 +165,17 @@ int vsyscall_init(void);
#define vsyscall_init() do { } while (0)
#endif

+/*
+ * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks.
+ */
+#ifdef CONFIG_CPU_SH2A
+extern unsigned int instruction_size(unsigned int insn);
+#elif defined(CONFIG_SUPERH32)
+#define instruction_size(insn) (2)
+#else
+#define instruction_size(insn) (4)
+#endif
+
#endif /* __ASSEMBLY__ */

#ifdef CONFIG_SUPERH32
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index 01fa17a..465a22d 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -20,6 +20,7 @@

void sh_mv_setup(void);
void check_for_initrd(void);
+void per_cpu_trap_init(void);

#endif /* __KERNEL__ */

diff --git a/arch/sh/include/asm/switch_to.h b/arch/sh/include/asm/switch_to.h
new file mode 100644
index 0000000..62b1941
--- /dev/null
+++ b/arch/sh/include/asm/switch_to.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2000, 2001 Paolo Alberelli
+ * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2004 Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_SWITCH_TO_H
+#define __ASM_SH_SWITCH_TO_H
+
+#ifdef CONFIG_SUPERH32
+# include "switch_to_32.h"
+#else
+# include "switch_to_64.h"
+#endif
+
+#endif /* __ASM_SH_SWITCH_TO_H */
diff --git a/arch/sh/include/asm/switch_to_32.h b/arch/sh/include/asm/switch_to_32.h
new file mode 100644
index 0000000..0c06551
--- /dev/null
+++ b/arch/sh/include/asm/switch_to_32.h
@@ -0,0 +1,134 @@
+#ifndef __ASM_SH_SWITCH_TO_32_H
+#define __ASM_SH_SWITCH_TO_32_H
+
+#ifdef CONFIG_SH_DSP
+
+#define is_dsp_enabled(tsk) \
+ (!!(tsk->thread.dsp_status.status & SR_DSP))
+
+#define __restore_dsp(tsk) \
+do { \
+ register u32 *__ts2 __asm__ ("r2") = \
+ (u32 *)&tsk->thread.dsp_status; \
+ __asm__ __volatile__ ( \
+ ".balign 4\n\t" \
+ "movs.l @r2+, a0\n\t" \
+ "movs.l @r2+, a1\n\t" \
+ "movs.l @r2+, a0g\n\t" \
+ "movs.l @r2+, a1g\n\t" \
+ "movs.l @r2+, m0\n\t" \
+ "movs.l @r2+, m1\n\t" \
+ "movs.l @r2+, x0\n\t" \
+ "movs.l @r2+, x1\n\t" \
+ "movs.l @r2+, y0\n\t" \
+ "movs.l @r2+, y1\n\t" \
+ "lds.l @r2+, dsr\n\t" \
+ "ldc.l @r2+, rs\n\t" \
+ "ldc.l @r2+, re\n\t" \
+ "ldc.l @r2+, mod\n\t" \
+ : : "r" (__ts2)); \
+} while (0)
+
+#define __save_dsp(tsk) \
+do { \
+ register u32 *__ts2 __asm__ ("r2") = \
+ (u32 *)&tsk->thread.dsp_status + 14; \
+ \
+ __asm__ __volatile__ ( \
+ ".balign 4\n\t" \
+ "stc.l mod, @-r2\n\t" \
+ "stc.l re, @-r2\n\t" \
+ "stc.l rs, @-r2\n\t" \
+ "sts.l dsr, @-r2\n\t" \
+ "movs.l y1, @-r2\n\t" \
+ "movs.l y0, @-r2\n\t" \
+ "movs.l x1, @-r2\n\t" \
+ "movs.l x0, @-r2\n\t" \
+ "movs.l m1, @-r2\n\t" \
+ "movs.l m0, @-r2\n\t" \
+ "movs.l a1g, @-r2\n\t" \
+ "movs.l a0g, @-r2\n\t" \
+ "movs.l a1, @-r2\n\t" \
+ "movs.l a0, @-r2\n\t" \
+ : : "r" (__ts2)); \
+} while (0)
+
+#else
+
+#define is_dsp_enabled(tsk) (0)
+#define __save_dsp(tsk) do { } while (0)
+#define __restore_dsp(tsk) do { } while (0)
+#endif
+
+struct task_struct *__switch_to(struct task_struct *prev,
+ struct task_struct *next);
+
+/*
+ * switch_to() should switch tasks to task nr n, first
+ */
+#define switch_to(prev, next, last) \
+do { \
+ register u32 *__ts1 __asm__ ("r1"); \
+ register u32 *__ts2 __asm__ ("r2"); \
+ register u32 *__ts4 __asm__ ("r4"); \
+ register u32 *__ts5 __asm__ ("r5"); \
+ register u32 *__ts6 __asm__ ("r6"); \
+ register u32 __ts7 __asm__ ("r7"); \
+ struct task_struct *__last; \
+ \
+ if (is_dsp_enabled(prev)) \
+ __save_dsp(prev); \
+ \
+ __ts1 = (u32 *)&prev->thread.sp; \
+ __ts2 = (u32 *)&prev->thread.pc; \
+ __ts4 = (u32 *)prev; \
+ __ts5 = (u32 *)next; \
+ __ts6 = (u32 *)&next->thread.sp; \
+ __ts7 = next->thread.pc; \
+ \
+ __asm__ __volatile__ ( \
+ ".balign 4\n\t" \
+ "stc.l gbr, @-r15\n\t" \
+ "sts.l pr, @-r15\n\t" \
+ "mov.l r8, @-r15\n\t" \
+ "mov.l r9, @-r15\n\t" \
+ "mov.l r10, @-r15\n\t" \
+ "mov.l r11, @-r15\n\t" \
+ "mov.l r12, @-r15\n\t" \
+ "mov.l r13, @-r15\n\t" \
+ "mov.l r14, @-r15\n\t" \
+ "mov.l r15, @r1\t! save SP\n\t" \
+ "mov.l @r6, r15\t! change to new stack\n\t" \
+ "mova 1f, %0\n\t" \
+ "mov.l %0, @r2\t! save PC\n\t" \
+ "mov.l 2f, %0\n\t" \
+ "jmp @%0\t! call __switch_to\n\t" \
+ " lds r7, pr\t! with return to new PC\n\t" \
+ ".balign 4\n" \
+ "2:\n\t" \
+ ".long __switch_to\n" \
+ "1:\n\t" \
+ "mov.l @r15+, r14\n\t" \
+ "mov.l @r15+, r13\n\t" \
+ "mov.l @r15+, r12\n\t" \
+ "mov.l @r15+, r11\n\t" \
+ "mov.l @r15+, r10\n\t" \
+ "mov.l @r15+, r9\n\t" \
+ "mov.l @r15+, r8\n\t" \
+ "lds.l @r15+, pr\n\t" \
+ "ldc.l @r15+, gbr\n\t" \
+ : "=z" (__last) \
+ : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
+ "r" (__ts5), "r" (__ts6), "r" (__ts7) \
+ : "r3", "t"); \
+ \
+ last = __last; \
+} while (0)
+
+#define finish_arch_switch(prev) \
+do { \
+ if (is_dsp_enabled(prev)) \
+ __restore_dsp(prev); \
+} while (0)
+
+#endif /* __ASM_SH_SWITCH_TO_32_H */
diff --git a/arch/sh/include/asm/switch_to_64.h b/arch/sh/include/asm/switch_to_64.h
new file mode 100644
index 0000000..ba3129d
--- /dev/null
+++ b/arch/sh/include/asm/switch_to_64.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2000, 2001 Paolo Alberelli
+ * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2004 Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_SWITCH_TO_64_H
+#define __ASM_SH_SWITCH_TO_64_H
+
+struct thread_struct;
+struct task_struct;
+
+/*
+ * switch_to() should switch tasks to task nr n, first
+ */
+struct task_struct *sh64_switch_to(struct task_struct *prev,
+ struct thread_struct *prev_thread,
+ struct task_struct *next,
+ struct thread_struct *next_thread);
+
+#define switch_to(prev,next,last) \
+do { \
+ if (last_task_used_math != next) { \
+ struct pt_regs *regs = next->thread.uregs; \
+ if (regs) regs->sr |= SR_FD; \
+ } \
+ last = sh64_switch_to(prev, &prev->thread, next, \
+ &next->thread); \
+} while (0)
+
+
+#endif /* __ASM_SH_SWITCH_TO_64_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
deleted file mode 100644
index 11fa6f3..0000000
--- a/arch/sh/include/asm/system.h
+++ /dev/null
@@ -1,183 +0,0 @@
-#ifndef __ASM_SH_SYSTEM_H
-#define __ASM_SH_SYSTEM_H
-
-/*
- * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
- * Copyright (C) 2002 Paul Mundt
- */
-
-#include <linux/irqflags.h>
-#include <linux/compiler.h>
-#include <linux/linkage.h>
-#include <asm/types.h>
-#include <asm/uncached.h>
-
-#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
-
-/*
- * A brief note on ctrl_barrier(), the control register write barrier.
- *
- * Legacy SH cores typically require a sequence of 8 nops after
- * modification of a control register in order for the changes to take
- * effect. On newer cores (like the sh4a and sh5) this is accomplished
- * with icbi.
- *
- * Also note that on sh4a in the icbi case we can forego a synco for the
- * write barrier, as it's not necessary for control registers.
- *
- * Historically we have only done this type of barrier for the MMUCR, but
- * it's also necessary for the CCR, so we make it generic here instead.
- */
-#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
-#define mb() __asm__ __volatile__ ("synco": : :"memory")
-#define rmb() mb()
-#define wmb() __asm__ __volatile__ ("synco": : :"memory")
-#define ctrl_barrier() __icbi(PAGE_OFFSET)
-#define read_barrier_depends() do { } while(0)
-#else
-#define mb() __asm__ __volatile__ ("": : :"memory")
-#define rmb() mb()
-#define wmb() __asm__ __volatile__ ("": : :"memory")
-#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")
-#define read_barrier_depends() do { } while(0)
-#endif
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif
-
-#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
-
-#ifdef CONFIG_GUSA_RB
-#include <asm/cmpxchg-grb.h>
-#elif defined(CONFIG_CPU_SH4A)
-#include <asm/cmpxchg-llsc.h>
-#else
-#include <asm/cmpxchg-irq.h>
-#endif
-
-extern void __xchg_called_with_bad_pointer(void);
-
-#define __xchg(ptr, x, size) \
-({ \
- unsigned long __xchg__res; \
- volatile void *__xchg_ptr = (ptr); \
- switch (size) { \
- case 4: \
- __xchg__res = xchg_u32(__xchg_ptr, x); \
- break; \
- case 1: \
- __xchg__res = xchg_u8(__xchg_ptr, x); \
- break; \
- default: \
- __xchg_called_with_bad_pointer(); \
- __xchg__res = x; \
- break; \
- } \
- \
- __xchg__res; \
-})
-
-#define xchg(ptr,x) \
- ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr))))
-
-/* This function doesn't exist, so you'll get a linker error
- * if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr,o,n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-struct pt_regs;
-
-extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
-void free_initrd_mem(unsigned long start, unsigned long end);
-
-extern void *set_exception_table_vec(unsigned int vec, void *handler);
-
-static inline void *set_exception_table_evt(unsigned int evt, void *handler)
-{
- return set_exception_table_vec(evt >> 5, handler);
-}
-
-/*
- * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks.
- */
-#ifdef CONFIG_CPU_SH2A
-extern unsigned int instruction_size(unsigned int insn);
-#elif defined(CONFIG_SUPERH32)
-#define instruction_size(insn) (2)
-#else
-#define instruction_size(insn) (4)
-#endif
-
-void per_cpu_trap_init(void);
-void default_idle(void);
-void cpu_idle_wait(void);
-void stop_this_cpu(void *);
-
-#ifdef CONFIG_SUPERH32
-#define BUILD_TRAP_HANDLER(name) \
-asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \
- unsigned long r6, unsigned long r7, \
- struct pt_regs __regs)
-
-#define TRAP_HANDLER_DECL \
- struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \
- unsigned int vec = regs->tra; \
- (void)vec;
-#else
-#define BUILD_TRAP_HANDLER(name) \
-asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
-#define TRAP_HANDLER_DECL
-#endif
-
-BUILD_TRAP_HANDLER(address_error);
-BUILD_TRAP_HANDLER(debug);
-BUILD_TRAP_HANDLER(bug);
-BUILD_TRAP_HANDLER(breakpoint);
-BUILD_TRAP_HANDLER(singlestep);
-BUILD_TRAP_HANDLER(fpu_error);
-BUILD_TRAP_HANDLER(fpu_state_restore);
-BUILD_TRAP_HANDLER(nmi);
-
-#define arch_align_stack(x) (x)
-
-struct mem_access {
- unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt);
- unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt);
-};
-
-#ifdef CONFIG_SUPERH32
-# include "system_32.h"
-#else
-# include "system_64.h"
-#endif
-
-#endif
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
deleted file mode 100644
index a4ad1cd..0000000
--- a/arch/sh/include/asm/system_32.h
+++ /dev/null
@@ -1,236 +0,0 @@
-#ifndef __ASM_SH_SYSTEM_32_H
-#define __ASM_SH_SYSTEM_32_H
-
-#include <linux/types.h>
-#include <asm/mmu.h>
-
-#ifdef CONFIG_SH_DSP
-
-#define is_dsp_enabled(tsk) \
- (!!(tsk->thread.dsp_status.status & SR_DSP))
-
-#define __restore_dsp(tsk) \
-do { \
- register u32 *__ts2 __asm__ ("r2") = \
- (u32 *)&tsk->thread.dsp_status; \
- __asm__ __volatile__ ( \
- ".balign 4\n\t" \
- "movs.l @r2+, a0\n\t" \
- "movs.l @r2+, a1\n\t" \
- "movs.l @r2+, a0g\n\t" \
- "movs.l @r2+, a1g\n\t" \
- "movs.l @r2+, m0\n\t" \
- "movs.l @r2+, m1\n\t" \
- "movs.l @r2+, x0\n\t" \
- "movs.l @r2+, x1\n\t" \
- "movs.l @r2+, y0\n\t" \
- "movs.l @r2+, y1\n\t" \
- "lds.l @r2+, dsr\n\t" \
- "ldc.l @r2+, rs\n\t" \
- "ldc.l @r2+, re\n\t" \
- "ldc.l @r2+, mod\n\t" \
- : : "r" (__ts2)); \
-} while (0)
-
-
-#define __save_dsp(tsk) \
-do { \
- register u32 *__ts2 __asm__ ("r2") = \
- (u32 *)&tsk->thread.dsp_status + 14; \
- \
- __asm__ __volatile__ ( \
- ".balign 4\n\t" \
- "stc.l mod, @-r2\n\t" \
- "stc.l re, @-r2\n\t" \
- "stc.l rs, @-r2\n\t" \
- "sts.l dsr, @-r2\n\t" \
- "movs.l y1, @-r2\n\t" \
- "movs.l y0, @-r2\n\t" \
- "movs.l x1, @-r2\n\t" \
- "movs.l x0, @-r2\n\t" \
- "movs.l m1, @-r2\n\t" \
- "movs.l m0, @-r2\n\t" \
- "movs.l a1g, @-r2\n\t" \
- "movs.l a0g, @-r2\n\t" \
- "movs.l a1, @-r2\n\t" \
- "movs.l a0, @-r2\n\t" \
- : : "r" (__ts2)); \
-} while (0)
-
-#else
-
-#define is_dsp_enabled(tsk) (0)
-#define __save_dsp(tsk) do { } while (0)
-#define __restore_dsp(tsk) do { } while (0)
-#endif
-
-#if defined(CONFIG_CPU_SH4A)
-#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
-#else
-#define __icbi(addr) mb()
-#endif
-
-#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
-#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
-#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
-
-struct task_struct *__switch_to(struct task_struct *prev,
- struct task_struct *next);
-
-/*
- * switch_to() should switch tasks to task nr n, first
- */
-#define switch_to(prev, next, last) \
-do { \
- register u32 *__ts1 __asm__ ("r1"); \
- register u32 *__ts2 __asm__ ("r2"); \
- register u32 *__ts4 __asm__ ("r4"); \
- register u32 *__ts5 __asm__ ("r5"); \
- register u32 *__ts6 __asm__ ("r6"); \
- register u32 __ts7 __asm__ ("r7"); \
- struct task_struct *__last; \
- \
- if (is_dsp_enabled(prev)) \
- __save_dsp(prev); \
- \
- __ts1 = (u32 *)&prev->thread.sp; \
- __ts2 = (u32 *)&prev->thread.pc; \
- __ts4 = (u32 *)prev; \
- __ts5 = (u32 *)next; \
- __ts6 = (u32 *)&next->thread.sp; \
- __ts7 = next->thread.pc; \
- \
- __asm__ __volatile__ ( \
- ".balign 4\n\t" \
- "stc.l gbr, @-r15\n\t" \
- "sts.l pr, @-r15\n\t" \
- "mov.l r8, @-r15\n\t" \
- "mov.l r9, @-r15\n\t" \
- "mov.l r10, @-r15\n\t" \
- "mov.l r11, @-r15\n\t" \
- "mov.l r12, @-r15\n\t" \
- "mov.l r13, @-r15\n\t" \
- "mov.l r14, @-r15\n\t" \
- "mov.l r15, @r1\t! save SP\n\t" \
- "mov.l @r6, r15\t! change to new stack\n\t" \
- "mova 1f, %0\n\t" \
- "mov.l %0, @r2\t! save PC\n\t" \
- "mov.l 2f, %0\n\t" \
- "jmp @%0\t! call __switch_to\n\t" \
- " lds r7, pr\t! with return to new PC\n\t" \
- ".balign 4\n" \
- "2:\n\t" \
- ".long __switch_to\n" \
- "1:\n\t" \
- "mov.l @r15+, r14\n\t" \
- "mov.l @r15+, r13\n\t" \
- "mov.l @r15+, r12\n\t" \
- "mov.l @r15+, r11\n\t" \
- "mov.l @r15+, r10\n\t" \
- "mov.l @r15+, r9\n\t" \
- "mov.l @r15+, r8\n\t" \
- "lds.l @r15+, pr\n\t" \
- "ldc.l @r15+, gbr\n\t" \
- : "=z" (__last) \
- : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
- "r" (__ts5), "r" (__ts6), "r" (__ts7) \
- : "r3", "t"); \
- \
- last = __last; \
-} while (0)
-
-#define finish_arch_switch(prev) \
-do { \
- if (is_dsp_enabled(prev)) \
- __restore_dsp(prev); \
-} while (0)
-
-#ifdef CONFIG_CPU_HAS_SR_RB
-#define lookup_exception_vector() \
-({ \
- unsigned long _vec; \
- \
- __asm__ __volatile__ ( \
- "stc r2_bank, %0\n\t" \
- : "=r" (_vec) \
- ); \
- \
- _vec; \
-})
-#else
-#define lookup_exception_vector() \
-({ \
- unsigned long _vec; \
- __asm__ __volatile__ ( \
- "mov r4, %0\n\t" \
- : "=r" (_vec) \
- ); \
- \
- _vec; \
-})
-#endif
-
-static inline reg_size_t register_align(void *val)
-{
- return (unsigned long)(signed long)val;
-}
-
-int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
- struct mem_access *ma, int, unsigned long address);
-
-static inline void trigger_address_error(void)
-{
- __asm__ __volatile__ (
- "ldc %0, sr\n\t"
- "mov.l @%1, %0"
- :
- : "r" (0x10000000), "r" (0x80000001)
- );
-}
-
-asmlinkage void do_address_error(struct pt_regs *regs,
- unsigned long writeaccess,
- unsigned long address);
-asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7,
- struct pt_regs __regs);
-asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7,
- struct pt_regs __regs);
-asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7,
- struct pt_regs __regs);
-asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7,
- struct pt_regs __regs);
-
-static inline void set_bl_bit(void)
-{
- unsigned long __dummy0, __dummy1;
-
- __asm__ __volatile__ (
- "stc sr, %0\n\t"
- "or %2, %0\n\t"
- "and %3, %0\n\t"
- "ldc %0, sr\n\t"
- : "=&r" (__dummy0), "=r" (__dummy1)
- : "r" (0x10000000), "r" (0xffffff0f)
- : "memory"
- );
-}
-
-static inline void clear_bl_bit(void)
-{
- unsigned long __dummy0, __dummy1;
-
- __asm__ __volatile__ (
- "stc sr, %0\n\t"
- "and %2, %0\n\t"
- "ldc %0, sr\n\t"
- : "=&r" (__dummy0), "=r" (__dummy1)
- : "1" (~0x10000000)
- : "memory"
- );
-}
-
-#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
deleted file mode 100644
index 8593bc8d..0000000
--- a/arch/sh/include/asm/system_64.h
+++ /dev/null
@@ -1,79 +0,0 @@
-#ifndef __ASM_SH_SYSTEM_64_H
-#define __ASM_SH_SYSTEM_64_H
-
-/*
- * include/asm-sh/system_64.h
- *
- * Copyright (C) 2000, 2001 Paolo Alberelli
- * Copyright (C) 2003 Paul Mundt
- * Copyright (C) 2004 Richard Curnow
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <cpu/registers.h>
-#include <asm/processor.h>
-
-/*
- * switch_to() should switch tasks to task nr n, first
- */
-struct thread_struct;
-struct task_struct *sh64_switch_to(struct task_struct *prev,
- struct thread_struct *prev_thread,
- struct task_struct *next,
- struct thread_struct *next_thread);
-
-#define switch_to(prev,next,last) \
-do { \
- if (last_task_used_math != next) { \
- struct pt_regs *regs = next->thread.uregs; \
- if (regs) regs->sr |= SR_FD; \
- } \
- last = sh64_switch_to(prev, &prev->thread, next, \
- &next->thread); \
-} while (0)
-
-#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
-#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
-#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
-#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
-
-static inline reg_size_t register_align(void *val)
-{
- return (unsigned long long)(signed long long)(signed long)val;
-}
-
-extern void phys_stext(void);
-
-static inline void trigger_address_error(void)
-{
- phys_stext();
-}
-
-#define SR_BL_LL 0x0000000010000000LL
-
-static inline void set_bl_bit(void)
-{
- unsigned long long __dummy0, __dummy1 = SR_BL_LL;
-
- __asm__ __volatile__("getcon " __SR ", %0\n\t"
- "or %0, %1, %0\n\t"
- "putcon %0, " __SR "\n\t"
- : "=&r" (__dummy0)
- : "r" (__dummy1));
-
-}
-
-static inline void clear_bl_bit(void)
-{
- unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
-
- __asm__ __volatile__("getcon " __SR ", %0\n\t"
- "and %0, %1, %0\n\t"
- "putcon %0, " __SR "\n\t"
- : "=&r" (__dummy0)
- : "r" (__dummy1));
-}
-
-#endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/arch/sh/include/asm/traps.h b/arch/sh/include/asm/traps.h
new file mode 100644
index 0000000..fe95168
--- /dev/null
+++ b/arch/sh/include/asm/traps.h
@@ -0,0 +1,20 @@
+#ifndef __ASM_SH_TRAPS_H
+#define __ASM_SH_TRAPS_H
+
+
+#ifdef CONFIG_SUPERH32
+# include "traps_32.h"
+#else
+# include "traps_64.h"
+#endif
+
+BUILD_TRAP_HANDLER(address_error);
+BUILD_TRAP_HANDLER(debug);
+BUILD_TRAP_HANDLER(bug);
+BUILD_TRAP_HANDLER(breakpoint);
+BUILD_TRAP_HANDLER(singlestep);
+BUILD_TRAP_HANDLER(fpu_error);
+BUILD_TRAP_HANDLER(fpu_state_restore);
+BUILD_TRAP_HANDLER(nmi);
+
+#endif /* __ASM_SH_TRAPS_H */
diff --git a/arch/sh/include/asm/traps_32.h b/arch/sh/include/asm/traps_32.h
new file mode 100644
index 0000000..cfd55ff
--- /dev/null
+++ b/arch/sh/include/asm/traps_32.h
@@ -0,0 +1,68 @@
+#ifndef __ASM_SH_TRAPS_32_H
+#define __ASM_SH_TRAPS_32_H
+
+#include <linux/types.h>
+#include <asm/mmu.h>
+
+#ifdef CONFIG_CPU_HAS_SR_RB
+#define lookup_exception_vector() \
+({ \
+ unsigned long _vec; \
+ \
+ __asm__ __volatile__ ( \
+ "stc r2_bank, %0\n\t" \
+ : "=r" (_vec) \
+ ); \
+ \
+ _vec; \
+})
+#else
+#define lookup_exception_vector() \
+({ \
+ unsigned long _vec; \
+ __asm__ __volatile__ ( \
+ "mov r4, %0\n\t" \
+ : "=r" (_vec) \
+ ); \
+ \
+ _vec; \
+})
+#endif
+
+static inline void trigger_address_error(void)
+{
+ __asm__ __volatile__ (
+ "ldc %0, sr\n\t"
+ "mov.l @%1, %0"
+ :
+ : "r" (0x10000000), "r" (0x80000001)
+ );
+}
+
+asmlinkage void do_address_error(struct pt_regs *regs,
+ unsigned long writeaccess,
+ unsigned long address);
+asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ struct pt_regs __regs);
+asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ struct pt_regs __regs);
+asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ struct pt_regs __regs);
+asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ struct pt_regs __regs);
+
+#define BUILD_TRAP_HANDLER(name) \
+asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \
+ unsigned long r6, unsigned long r7, \
+ struct pt_regs __regs)
+
+#define TRAP_HANDLER_DECL \
+ struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \
+ unsigned int vec = regs->tra; \
+ (void)vec;
+
+#endif /* __ASM_SH_TRAPS_32_H */
diff --git a/arch/sh/include/asm/traps_64.h b/arch/sh/include/asm/traps_64.h
new file mode 100644
index 0000000..c52d7f9
--- /dev/null
+++ b/arch/sh/include/asm/traps_64.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2000, 2001 Paolo Alberelli
+ * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2004 Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_TRAPS_64_H
+#define __ASM_SH_TRAPS_64_H
+
+extern void phys_stext(void);
+
+static inline void trigger_address_error(void)
+{
+ phys_stext();
+}
+
+#define BUILD_TRAP_HANDLER(name) \
+asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
+#define TRAP_HANDLER_DECL
+
+#endif /* __ASM_SH_TRAPS_64_H */
diff --git a/arch/sh/include/asm/uaccess.h b/arch/sh/include/asm/uaccess.h
index 075848f..050f221 100644
--- a/arch/sh/include/asm/uaccess.h
+++ b/arch/sh/include/asm/uaccess.h
@@ -254,5 +254,19 @@ int fixup_exception(struct pt_regs *regs);
unsigned long search_exception_table(unsigned long addr);
const struct exception_table_entry *search_exception_tables(unsigned long addr);

+extern void *set_exception_table_vec(unsigned int vec, void *handler);
+
+static inline void *set_exception_table_evt(unsigned int evt, void *handler)
+{
+ return set_exception_table_vec(evt >> 5, handler);
+}
+
+struct mem_access {
+ unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt);
+ unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt);
+};
+
+int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
+ struct mem_access *ma, int, unsigned long address);

#endif /* __ASM_SH_UACCESS_H */
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index b95f84c..61a07da 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <asm/smp.h>
#include <asm/sh_bios.h>
+#include <asm/setup.h>

#ifdef CONFIG_SH_FPU
#define cpu_has_fpu 1
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
index efae6ab..f917376 100644
--- a/arch/sh/kernel/hw_breakpoint.c
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -22,6 +22,7 @@
#include <asm/hw_breakpoint.h>
#include <asm/mmu_context.h>
#include <asm/ptrace.h>
+#include <asm/traps.h>

/*
* Stores the breakpoints currently in use on each breakpoint address
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 17ad04f..b7c8f68 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -20,6 +20,7 @@
#include <asm/pgalloc.h>
#include <linux/atomic.h>
#include <asm/smp.h>
+#include <asm/bl_bit.h>

void (*pm_idle)(void);

diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index cbd4e4b..4264583 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -30,6 +30,7 @@
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
#include <asm/fpu.h>
+#include <asm/switch_to.h>

struct task_struct *last_task_used_math = NULL;

diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 663c9ae..bc81e07 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -38,6 +38,7 @@
#include <asm/mmu_context.h>
#include <asm/syscalls.h>
#include <asm/fpu.h>
+#include <asm/traps.h>

#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c
index 7cc034b..04afe5b 100644
--- a/arch/sh/kernel/reboot.c
+++ b/arch/sh/kernel/reboot.c
@@ -9,6 +9,7 @@
#include <asm/addrspace.h>
#include <asm/reboot.h>
#include <asm/tlbflush.h>
+#include <asm/traps.h>

void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 931baa8..a87e58a 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -7,6 +7,7 @@
#include <linux/uaccess.h>
#include <linux/hardirq.h>
#include <asm/unwinder.h>
+#include <asm/traps.h>

#ifdef CONFIG_GENERIC_BUG
static void handle_BUG(struct pt_regs *regs)
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 227c21a..a37175d 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -30,6 +30,8 @@
#include <asm/alignment.h>
#include <asm/fpu.h>
#include <asm/kprobes.h>
+#include <asm/traps.h>
+#include <asm/bl_bit.h>

#ifdef CONFIG_CPU_SH2
# define TRAP_RESERVED_INST 4
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index ddbc2d4..324eef9 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -19,6 +19,7 @@
#include <asm/io_trapped.h>
#include <asm/mmu_context.h>
#include <asm/tlbflush.h>
+#include <asm/traps.h>

static inline int notify_page_fault(struct pt_regs *regs, int trap)
{
diff --git a/arch/sh/mm/flush-sh4.c b/arch/sh/mm/flush-sh4.c
index cef4026..75a17f5 100644
--- a/arch/sh/mm/flush-sh4.c
+++ b/arch/sh/mm/flush-sh4.c
@@ -1,6 +1,7 @@
#include <linux/mm.h>
#include <asm/mmu_context.h>
#include <asm/cacheflush.h>
+#include <asm/traps.h>

/*
* Write back the dirty D-caches, but not invalidate them.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 25/29] Disintegrate asm/system.h for Sparc
March 07, 2012 09:07PM
Disintegrate asm/system.h for Sparc.

Signed-off-by: David Howells <[email protected]>
---

arch/sparc/include/asm/atomic_32.h | 97 +++++++++
arch/sparc/include/asm/atomic_64.h | 137 +++++++++++++
arch/sparc/include/asm/barrier.h | 8 +
arch/sparc/include/asm/barrier_32.h | 15 +
arch/sparc/include/asm/barrier_64.h | 56 +++++
arch/sparc/include/asm/bug.h | 3
arch/sparc/include/asm/cacheflush_32.h | 9 +
arch/sparc/include/asm/cacheflush_64.h | 10 +
arch/sparc/include/asm/cpu_type.h | 34 +++
arch/sparc/include/asm/exec.h | 6 +
arch/sparc/include/asm/irqflags_32.h | 1
arch/sparc/include/asm/perfctr.h | 23 ++
arch/sparc/include/asm/pgtable_32.h | 1
arch/sparc/include/asm/processor.h | 3
arch/sparc/include/asm/processor_64.h | 3
arch/sparc/include/asm/ptrace.h | 2
arch/sparc/include/asm/setup.h | 16 ++
arch/sparc/include/asm/switch_to.h | 8 +
arch/sparc/include/asm/switch_to_32.h | 106 ++++++++++
arch/sparc/include/asm/switch_to_64.h | 73 +++++++
arch/sparc/include/asm/system.h | 8 -
arch/sparc/include/asm/system_32.h | 284 ---------------------------
arch/sparc/include/asm/system_64.h | 331 --------------------------------
arch/sparc/include/asm/timer_32.h | 3
arch/sparc/kernel/auxio_32.c | 1
arch/sparc/kernel/devices.c | 1
arch/sparc/kernel/irq.h | 1
arch/sparc/kernel/kgdb_32.c | 1
arch/sparc/kernel/module.c | 1
arch/sparc/kernel/nmi.c | 1
arch/sparc/kernel/pcr.c | 1
arch/sparc/kernel/perf_event.c | 2
arch/sparc/kernel/process_32.c | 1
arch/sparc/kernel/ptrace_32.c | 1
arch/sparc/kernel/reboot.c | 1
arch/sparc/kernel/setup_32.c | 1
arch/sparc/kernel/setup_64.c | 1
arch/sparc/kernel/signal32.c | 1
arch/sparc/kernel/signal_32.c | 1
arch/sparc/kernel/signal_64.c | 2
arch/sparc/kernel/sigutil_32.c | 1
arch/sparc/kernel/sigutil_64.c | 1
arch/sparc/kernel/sparc_ksyms_64.c | 1
arch/sparc/kernel/traps_64.c | 1
arch/sparc/kernel/unaligned_64.c | 1
arch/sparc/kernel/visemul.c | 1
arch/sparc/math-emu/math_64.c | 1
drivers/tty/serial/sunhv.c | 1
drivers/tty/serial/sunsab.c | 1
drivers/tty/serial/sunsu.c | 1
drivers/tty/serial/sunzilog.c | 1
kernel/signal.c | 2
kernel/sysctl.c | 3
53 files changed, 646 insertions(+), 625 deletions(-)
create mode 100644 arch/sparc/include/asm/barrier.h
create mode 100644 arch/sparc/include/asm/barrier_32.h
create mode 100644 arch/sparc/include/asm/barrier_64.h
create mode 100644 arch/sparc/include/asm/cpu_type.h
create mode 100644 arch/sparc/include/asm/exec.h
create mode 100644 arch/sparc/include/asm/switch_to.h
create mode 100644 arch/sparc/include/asm/switch_to_32.h
create mode 100644 arch/sparc/include/asm/switch_to_64.h
delete mode 100644 arch/sparc/include/asm/system.h
delete mode 100644 arch/sparc/include/asm/system_32.h
delete mode 100644 arch/sparc/include/asm/system_64.h

diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index e6d75af..21fec1b 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -12,6 +12,7 @@
#define __ARCH_SPARC_ATOMIC__

#include <linux/types.h>
+#include <asm/btfixup.h>

#include <asm-generic/atomic64.h>

@@ -57,4 +58,100 @@ extern void atomic_set(atomic_t *, int);
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()

+/* This has special calling conventions */
+#ifndef CONFIG_SMP
+BTFIXUPDEF_CALL(void, ___xchg32, void)
+#endif
+
+static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
+{
+#ifdef CONFIG_SMP
+ __asm__ __volatile__("swap [%2], %0"
+ : "=&r" (val)
+ : "0" (val), "r" (m)
+ : "memory");
+ return val;
+#else
+ register unsigned long *ptr asm("g1");
+ register unsigned long ret asm("g2");
+
+ ptr = (unsigned long *) m;
+ ret = val;
+
+ /* Note: this is magic and the nop there is
+ really needed. */
+ __asm__ __volatile__(
+ "mov %%o7, %%g4\n\t"
+ "call ___f____xchg32\n\t"
+ " nop\n\t"
+ : "=&r" (ret)
+ : "0" (ret), "r" (ptr)
+ : "g3", "g4", "g7", "memory", "cc");
+
+ return ret;
+#endif
+}
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
+{
+ switch (size) {
+ case 4:
+ return xchg_u32(ptr, x);
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+/* Emulate cmpxchg() the same way we emulate atomics,
+ * by hashing the object address and indexing into an array
+ * of spinlocks to get a bit of performance...
+ *
+ * See arch/sparc/lib/atomic32.c for implementation.
+ *
+ * Cribbed from <asm-parisc/atomic.h>
+ */
+#define __HAVE_ARCH_CMPXCHG 1
+
+/* bug catcher for when unsupported size is used - won't link */
+extern void __cmpxchg_called_with_bad_pointer(void);
+/* we only need to support cmpxchg of a u32 on sparc */
+extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
+
+/* don't worry...optimizer will get rid of most of this */
+static inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
+ default:
+ __cmpxchg_called_with_bad_pointer();
+ break;
+ }
+ return old;
+}
+
+#define cmpxchg(ptr, o, n) \
+({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+})
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
#endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index 5ab4e89..913b45e 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -66,6 +66,142 @@ extern long atomic64_sub_ret(long, atomic64_t *);
#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0)
#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0)

+static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
+{
+ unsigned long tmp1, tmp2;
+
+ __asm__ __volatile__(
+" mov %0, %1\n"
+"1: lduw [%4], %2\n"
+" cas [%4], %2, %0\n"
+" cmp %2, %0\n"
+" bne,a,pn %%icc, 1b\n"
+" mov %1, %0\n"
+ : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
+ : "0" (val), "r" (m)
+ : "cc", "memory");
+ return val;
+}
+
+static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
+{
+ unsigned long tmp1, tmp2;
+
+ __asm__ __volatile__(
+" mov %0, %1\n"
+"1: ldx [%4], %2\n"
+" casx [%4], %2, %0\n"
+" cmp %2, %0\n"
+" bne,a,pn %%xcc, 1b\n"
+" mov %1, %0\n"
+ : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
+ : "0" (val), "r" (m)
+ : "cc", "memory");
+ return val;
+}
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
+ int size)
+{
+ switch (size) {
+ case 4:
+ return xchg32(ptr, x);
+ case 8:
+ return xchg64(ptr, x);
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+
+/*
+ * Atomic compare and exchange. Compare OLD with MEM, if identical,
+ * store NEW in MEM. Return the initial value in MEM. Success is
+ * indicated by comparing RETURN with OLD.
+ */
+
+#include <asm-generic/cmpxchg-local.h>
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long
+__cmpxchg_u32(volatile int *m, int old, int new)
+{
+ __asm__ __volatile__("cas [%2], %3, %0"
+ : "=&r" (new)
+ : "0" (new), "r" (m), "r" (old)
+ : "memory");
+
+ return new;
+}
+
+static inline unsigned long
+__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
+{
+ __asm__ __volatile__("casx [%2], %3, %0"
+ : "=&r" (new)
+ : "0" (new), "r" (m), "r" (old)
+ : "memory");
+
+ return new;
+}
+
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+ case 8:
+ return __cmpxchg_u64(ptr, old, new);
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr,o,n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+ })
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+ unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ case 8: return __cmpxchg(ptr, old, new, size);
+ default:
+ return __cmpxchg_local_generic(ptr, old, new, size);
+ }
+
+ return old;
+}
+
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg_local((ptr), (o), (n)); \
+ })
+
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

@@ -84,7 +220,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
return c;
}

-
#define atomic64_cmpxchg(v, o, n) \
((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
diff --git a/arch/sparc/include/asm/barrier.h b/arch/sparc/include/asm/barrier.h
new file mode 100644
index 0000000..b25f02a
--- /dev/null
+++ b/arch/sparc/include/asm/barrier.h
@@ -0,0 +1,8 @@
+#ifndef ___ASM_SPARC_BARRIER_H
+#define ___ASM_SPARC_BARRIER_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm/barrier_64.h>
+#else
+#include <asm/barrier_32.h>
+#endif
+#endif
diff --git a/arch/sparc/include/asm/barrier_32.h b/arch/sparc/include/asm/barrier_32.h
new file mode 100644
index 0000000..c1b7665
--- /dev/null
+++ b/arch/sparc/include/asm/barrier_32.h
@@ -0,0 +1,15 @@
+#ifndef __SPARC_BARRIER_H
+#define __SPARC_BARRIER_H
+
+/* XXX Change this if we ever use a PSO mode kernel. */
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+#define rmb() mb()
+#define wmb() mb()
+#define read_barrier_depends() do { } while(0)
+#define set_mb(__var, __value) do { __var = __value; mb(); } while(0)
+#define smp_mb() __asm__ __volatile__("":::"memory")
+#define smp_rmb() __asm__ __volatile__("":::"memory")
+#define smp_wmb() __asm__ __volatile__("":::"memory")
+#define smp_read_barrier_depends() do { } while(0)
+
+#endif /* !(__SPARC_BARRIER_H) */
diff --git a/arch/sparc/include/asm/barrier_64.h b/arch/sparc/include/asm/barrier_64.h
new file mode 100644
index 0000000..95d4598
--- /dev/null
+++ b/arch/sparc/include/asm/barrier_64.h
@@ -0,0 +1,56 @@
+#ifndef __SPARC64_BARRIER_H
+#define __SPARC64_BARRIER_H
+
+/* These are here in an effort to more fully work around Spitfire Errata
+ * #51. Essentially, if a memory barrier occurs soon after a mispredicted
+ * branch, the chip can stop executing instructions until a trap occurs.
+ * Therefore, if interrupts are disabled, the chip can hang forever.
+ *
+ * It used to be believed that the memory barrier had to be right in the
+ * delay slot, but a case has been traced recently wherein the memory barrier
+ * was one instruction after the branch delay slot and the chip still hung.
+ * The offending sequence was the following in sym_wakeup_done() of the
+ * sym53c8xx_2 driver:
+ *
+ * call sym_ccb_from_dsa, 0
+ * movge %icc, 0, %l0
+ * brz,pn %o0, .LL1303
+ * mov %o0, %l2
+ * membar #LoadLoad
+ *
+ * The branch has to be mispredicted for the bug to occur. Therefore, we put
+ * the memory barrier explicitly into a "branch always, predicted taken"
+ * delay slot to avoid the problem case.
+ */
+#define membar_safe(type) \
+do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
+ " membar " type "\n" \
+ "1:\n" \
+ : : : "memory"); \
+} while (0)
+
+/* The kernel always executes in TSO memory model these days,
+ * and furthermore most sparc64 chips implement more stringent
+ * memory ordering than required by the specifications.
+ */
+#define mb() membar_safe("#StoreLoad")
+#define rmb() __asm__ __volatile__("":::"memory")
+#define wmb() __asm__ __volatile__("":::"memory")
+
+#define read_barrier_depends() do { } while(0)
+#define set_mb(__var, __value) \
+ do { __var = __value; membar_safe("#StoreLoad"); } while(0)
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#else
+#define smp_mb() __asm__ __volatile__("":::"memory")
+#define smp_rmb() __asm__ __volatile__("":::"memory")
+#define smp_wmb() __asm__ __volatile__("":::"memory")
+#endif
+
+#define smp_read_barrier_depends() do { } while(0)
+
+#endif /* !(__SPARC64_BARRIER_H) */
diff --git a/arch/sparc/include/asm/bug.h b/arch/sparc/include/asm/bug.h
index 8a59e5a..6bd9f43 100644
--- a/arch/sparc/include/asm/bug.h
+++ b/arch/sparc/include/asm/bug.h
@@ -19,4 +19,7 @@ extern void do_BUG(const char *file, int line);

#include <asm-generic/bug.h>

+struct pt_regs;
+extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
+
#endif
diff --git a/arch/sparc/include/asm/cacheflush_32.h b/arch/sparc/include/asm/cacheflush_32.h
index 2e46877..68431b4 100644
--- a/arch/sparc/include/asm/cacheflush_32.h
+++ b/arch/sparc/include/asm/cacheflush_32.h
@@ -83,4 +83,13 @@ extern void sparc_flush_page_to_ram(struct page *page);
#define flush_cache_vmap(start, end) flush_cache_all()
#define flush_cache_vunmap(start, end) flush_cache_all()

+/* When a context switch happens we must flush all user windows so that
+ * the windows of the current process are flushed onto its stack. This
+ * way the windows are all clean for the next process and the stack
+ * frames are up to date.
+ */
+extern void flush_user_windows(void);
+extern void kill_user_windows(void);
+extern void flushw_all(void);
+
#endif /* _SPARC_CACHEFLUSH_H */
diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h
index b953840..2efea2f 100644
--- a/arch/sparc/include/asm/cacheflush_64.h
+++ b/arch/sparc/include/asm/cacheflush_64.h
@@ -9,6 +9,16 @@

/* Cache flush operations. */

+
+#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
+#define flushw_all() __asm__ __volatile__("flushw")
+
+extern void __flushw_user(void);
+#define flushw_user() __flushw_user()
+
+#define flush_user_windows flushw_user
+#define flush_register_windows flushw_all
+
/* These are the same regardless of whether this is an SMP kernel or not. */
#define flush_cache_mm(__mm) \
do { if ((__mm) == current->mm) flushw_user(); } while(0)
diff --git a/arch/sparc/include/asm/cpu_type.h b/arch/sparc/include/asm/cpu_type.h
new file mode 100644
index 0000000..4ca184d
--- /dev/null
+++ b/arch/sparc/include/asm/cpu_type.h
@@ -0,0 +1,34 @@
+#ifndef __ASM_CPU_TYPE_H
+#define __ASM_CPU_TYPE_H
+
+/*
+ * Sparc (general) CPU types
+ */
+enum sparc_cpu {
+ sun4 = 0x00,
+ sun4c = 0x01,
+ sun4m = 0x02,
+ sun4d = 0x03,
+ sun4e = 0x04,
+ sun4u = 0x05, /* V8 ploos ploos */
+ sun_unknown = 0x06,
+ ap1000 = 0x07, /* almost a sun4m */
+ sparc_leon = 0x08, /* Leon SoC */
+};
+
+#ifdef CONFIG_SPARC32
+extern enum sparc_cpu sparc_cpu_model;
+
+#define ARCH_SUN4C (sparc_cpu_model==sun4c)
+
+#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */
+
+#else
+
+#define sparc_cpu_model sun4u
+
+/* This cannot ever be a sun4c :) That's just history. */
+#define ARCH_SUN4C 0
+#endif
+
+#endif /* __ASM_CPU_TYPE_H */
diff --git a/arch/sparc/include/asm/exec.h b/arch/sparc/include/asm/exec.h
new file mode 100644
index 0000000..2e08588
--- /dev/null
+++ b/arch/sparc/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef __SPARC_EXEC_H
+#define __SPARC_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __SPARC_EXEC_H */
diff --git a/arch/sparc/include/asm/irqflags_32.h b/arch/sparc/include/asm/irqflags_32.h
index 1484890..e414c06 100644
--- a/arch/sparc/include/asm/irqflags_32.h
+++ b/arch/sparc/include/asm/irqflags_32.h
@@ -13,6 +13,7 @@
#ifndef __ASSEMBLY__

#include <linux/types.h>
+#include <asm/psr.h>

extern void arch_local_irq_restore(unsigned long);
extern unsigned long arch_local_irq_save(void);
diff --git a/arch/sparc/include/asm/perfctr.h b/arch/sparc/include/asm/perfctr.h
index 8d8720a..3332d2c 100644
--- a/arch/sparc/include/asm/perfctr.h
+++ b/arch/sparc/include/asm/perfctr.h
@@ -168,6 +168,29 @@ struct vcounter_struct {
unsigned long long vcnt1;
};

+#else /* !(__KERNEL__) */
+
+#ifndef CONFIG_SPARC32
+
+/* Performance counter register access. */
+#define read_pcr(__p) __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p))
+#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p))
+#define read_pic(__p) __asm__ __volatile__("rd %%pic, %0" : "=r" (__p))
+
+/* Blackbird errata workaround. See commentary in
+ * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt()
+ * for more information.
+ */
+#define write_pic(__p) \
+ __asm__ __volatile__("ba,pt %%xcc, 99f\n\t" \
+ " nop\n\t" \
+ ".align 64\n" \
+ "99:wr %0, 0x0, %%pic\n\t" \
+ "rd %%pic, %%g0" : : "r" (__p))
+#define reset_pic() write_pic(0)
+
+#endif /* !CONFIG_SPARC32 */
+
#endif /* !(__KERNEL__) */

#endif /* !(PERF_COUNTER_API) */
diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h
index 496664b..3d71018 100644
--- a/arch/sparc/include/asm/pgtable_32.h
+++ b/arch/sparc/include/asm/pgtable_32.h
@@ -21,6 +21,7 @@
#include <asm/vac-ops.h>
#include <asm/oplib.h>
#include <asm/btfixup.h>
+#include <asm/cpu_type.h>


struct vm_area_struct;
diff --git a/arch/sparc/include/asm/processor.h b/arch/sparc/include/asm/processor.h
index 9da9646..2fe99e6 100644
--- a/arch/sparc/include/asm/processor.h
+++ b/arch/sparc/include/asm/processor.h
@@ -5,4 +5,7 @@
#else
#include <asm/processor_32.h>
#endif
+
+#define nop() __asm__ __volatile__ ("nop")
+
#endif
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index 59fcebb..e713db2 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -18,6 +18,9 @@
#include <asm/ptrace.h>
#include <asm/page.h>

+/* Don't hold the runqueue lock over context switch */
+#define __ARCH_WANT_UNLOCKED_CTXSW
+
/* The sparc has no problems with write protection */
#define wp_works_ok 1
#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h
index 0495388..afba9f2 100644
--- a/arch/sparc/include/asm/ptrace.h
+++ b/arch/sparc/include/asm/ptrace.h
@@ -98,6 +98,8 @@ struct sparc_trapf {
*/
#ifndef __ASSEMBLY__

+#include <linux/types.h>
+
struct pt_regs {
unsigned long psr;
unsigned long pc;
diff --git a/arch/sparc/include/asm/setup.h b/arch/sparc/include/asm/setup.h
index 64718ba..00497ab 100644
--- a/arch/sparc/include/asm/setup.h
+++ b/arch/sparc/include/asm/setup.h
@@ -13,14 +13,30 @@

#ifdef __KERNEL__

+extern char reboot_command[];
+
#ifdef CONFIG_SPARC32
/* The CPU that was used for booting
* Only sun4d + leon may have boot_cpu_id != 0
*/
extern unsigned char boot_cpu_id;
extern unsigned char boot_cpu_id4;
+
+extern unsigned long empty_bad_page;
+extern unsigned long empty_bad_page_table;
+extern unsigned long empty_zero_page;
+
+extern int serial_console;
+static inline int con_is_present(void)
+{
+ return serial_console ? 0 : 1;
+}
#endif

+extern void sun_do_break(void);
+extern int stop_a_enabled;
+extern int scons_pwroff;
+
#endif /* __KERNEL__ */

#endif /* _SPARC_SETUP_H */
diff --git a/arch/sparc/include/asm/switch_to.h b/arch/sparc/include/asm/switch_to.h
new file mode 100644
index 0000000..2dc4fa5
--- /dev/null
+++ b/arch/sparc/include/asm/switch_to.h
@@ -0,0 +1,8 @@
+#ifndef ___ASM_SPARC_SWITCH_TO_H
+#define ___ASM_SPARC_SWITCH_TO_H
+#if defined(__sparc__) && defined(__arch64__)
+#include <asm/switch_to_64.h>
+#else
+#include <asm/switch_to_32.h>
+#endif
+#endif
diff --git a/arch/sparc/include/asm/switch_to_32.h b/arch/sparc/include/asm/switch_to_32.h
new file mode 100644
index 0000000..e32e82b
--- /dev/null
+++ b/arch/sparc/include/asm/switch_to_32.h
@@ -0,0 +1,106 @@
+#ifndef __SPARC_SWITCH_TO_H
+#define __SPARC_SWITCH_TO_H
+
+#include <asm/smp.h>
+
+extern struct thread_info *current_set[NR_CPUS];
+
+/*
+ * Flush windows so that the VM switch which follows
+ * would not pull the stack from under us.
+ *
+ * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work)
+ * XXX WTF is the above comment? Found in late teen 2.4.x.
+ */
+#ifdef CONFIG_SMP
+#define SWITCH_ENTER(prv) \
+ do { \
+ if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \
+ put_psr(get_psr() | PSR_EF); \
+ fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \
+ &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \
+ clear_tsk_thread_flag(prv, TIF_USEDFPU); \
+ (prv)->thread.kregs->psr &= ~PSR_EF; \
+ } \
+ } while(0)
+
+#define SWITCH_DO_LAZY_FPU(next) /* */
+#else
+#define SWITCH_ENTER(prv) /* */
+#define SWITCH_DO_LAZY_FPU(nxt) \
+ do { \
+ if (last_task_used_math != (nxt)) \
+ (nxt)->thread.kregs->psr&=~PSR_EF; \
+ } while(0)
+#endif
+
+#define prepare_arch_switch(next) do { \
+ __asm__ __volatile__( \
+ ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \
+ "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
+ "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
+ "save %sp, -0x40, %sp\n\t" \
+ "restore; restore; restore; restore; restore; restore; restore"); \
+} while(0)
+
+ /* Much care has gone into this code, do not touch it.
+ *
+ * We need to loadup regs l0/l1 for the newly forked child
+ * case because the trap return path relies on those registers
+ * holding certain values, gcc is told that they are clobbered.
+ * Gcc needs registers for 3 values in and 1 value out, so we
+ * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM
+ *
+ * Hey Dave, that do not touch sign is too much of an incentive
+ * - Anton & Pete
+ */
+#define switch_to(prev, next, last) do { \
+ SWITCH_ENTER(prev); \
+ SWITCH_DO_LAZY_FPU(next); \
+ cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm)); \
+ __asm__ __volatile__( \
+ "sethi %%hi(here - 0x8), %%o7\n\t" \
+ "mov %%g6, %%g3\n\t" \
+ "or %%o7, %%lo(here - 0x8), %%o7\n\t" \
+ "rd %%psr, %%g4\n\t" \
+ "std %%sp, [%%g6 + %4]\n\t" \
+ "rd %%wim, %%g5\n\t" \
+ "wr %%g4, 0x20, %%psr\n\t" \
+ "nop\n\t" \
+ "std %%g4, [%%g6 + %3]\n\t" \
+ "ldd [%2 + %3], %%g4\n\t" \
+ "mov %2, %%g6\n\t" \
+ ".globl patchme_store_new_current\n" \
+"patchme_store_new_current:\n\t" \
+ "st %2, [%1]\n\t" \
+ "wr %%g4, 0x20, %%psr\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \
+ "ldd [%%g6 + %4], %%sp\n\t" \
+ "wr %%g5, 0x0, %%wim\n\t" \
+ "ldd [%%sp + 0x00], %%l0\n\t" \
+ "ldd [%%sp + 0x38], %%i6\n\t" \
+ "wr %%g4, 0x0, %%psr\n\t" \
+ "nop\n\t" \
+ "nop\n\t" \
+ "jmpl %%o7 + 0x8, %%g0\n\t" \
+ " ld [%%g3 + %5], %0\n\t" \
+ "here:\n" \
+ : "=&r" (last) \
+ : "r" (&(current_set[hard_smp_processor_id()])), \
+ "r" (task_thread_info(next)), \
+ "i" (TI_KPSR), \
+ "i" (TI_KSP), \
+ "i" (TI_TASK) \
+ : "g1", "g2", "g3", "g4", "g5", "g7", \
+ "l0", "l1", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", \
+ "o0", "o1", "o2", "o3", "o7"); \
+ } while(0)
+
+extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
+ void *fpqueue, unsigned long *fpqdepth);
+extern void synchronize_user_stack(void);
+
+#endif /* __SPARC_SWITCH_TO_H */
diff --git a/arch/sparc/include/asm/switch_to_64.h b/arch/sparc/include/asm/switch_to_64.h
new file mode 100644
index 0000000..eb5121b
--- /dev/null
+++ b/arch/sparc/include/asm/switch_to_64.h
@@ -0,0 +1,73 @@
+#ifndef __SPARC64_SWITCH_TO_64_H
+#define __SPARC64_SWITCH_TO_64_H
+
+#include <asm/visasm.h>
+#include <asm/cacheflush.h>
+
+#define prepare_arch_switch(next) \
+do { \
+ flushw_all(); \
+} while (0)
+
+ /* See what happens when you design the chip correctly?
+ *
+ * We tell gcc we clobber all non-fixed-usage registers except
+ * for l0/l1. It will use one for 'next' and the other to hold
+ * the output value of 'last'. 'next' is not referenced again
+ * past the invocation of switch_to in the scheduler, so we need
+ * not preserve it's value. Hairy, but it lets us remove 2 loads
+ * and 2 stores in this critical code path. -DaveM
+ */
+#define switch_to(prev, next, last) \
+do { flush_tlb_pending(); \
+ save_and_clear_fpu(); \
+ /* If you are tempted to conditionalize the following */ \
+ /* so that ASI is only written if it changes, think again. */ \
+ __asm__ __volatile__("wr %%g0, %0, %%asi" \
+ : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\
+ trap_block[current_thread_info()->cpu].thread = \
+ task_thread_info(next); \
+ __asm__ __volatile__( \
+ "mov %%g4, %%g7\n\t" \
+ "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \
+ "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \
+ "rdpr %%wstate, %%o5\n\t" \
+ "stx %%o6, [%%g6 + %6]\n\t" \
+ "stb %%o5, [%%g6 + %5]\n\t" \
+ "rdpr %%cwp, %%o5\n\t" \
+ "stb %%o5, [%%g6 + %8]\n\t" \
+ "wrpr %%g0, 15, %%pil\n\t" \
+ "mov %4, %%g6\n\t" \
+ "ldub [%4 + %8], %%g1\n\t" \
+ "wrpr %%g1, %%cwp\n\t" \
+ "ldx [%%g6 + %6], %%o6\n\t" \
+ "ldub [%%g6 + %5], %%o5\n\t" \
+ "ldub [%%g6 + %7], %%o7\n\t" \
+ "wrpr %%o5, 0x0, %%wstate\n\t" \
+ "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \
+ "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \
+ "ldx [%%g6 + %9], %%g4\n\t" \
+ "wrpr %%g0, 14, %%pil\n\t" \
+ "brz,pt %%o7, switch_to_pc\n\t" \
+ " mov %%g7, %0\n\t" \
+ "sethi %%hi(ret_from_syscall), %%g1\n\t" \
+ "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \
+ " nop\n\t" \
+ ".globl switch_to_pc\n\t" \
+ "switch_to_pc:\n\t" \
+ : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \
+ "=r" (__local_per_cpu_offset) \
+ : "0" (task_thread_info(next)), \
+ "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \
+ "i" (TI_CWP), "i" (TI_TASK) \
+ : "cc", \
+ "g1", "g2", "g3", "g7", \
+ "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
+ "i0", "i1", "i2", "i3", "i4", "i5", \
+ "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \
+} while(0)
+
+extern void synchronize_user_stack(void);
+extern void fault_in_user_windows(void);
+
+#endif /* __SPARC64_SWITCH_TO_64_H */
diff --git a/arch/sparc/include/asm/system.h b/arch/sparc/include/asm/system.h
deleted file mode 100644
index 7944a7c..0000000
--- a/arch/sparc/include/asm/system.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef ___ASM_SPARC_SYSTEM_H
-#define ___ASM_SPARC_SYSTEM_H
-#if defined(__sparc__) && defined(__arch64__)
-#include <asm/system_64.h>
-#else
-#include <asm/system_32.h>
-#endif
-#endif
diff --git a/arch/sparc/include/asm/system_32.h b/arch/sparc/include/asm/system_32.h
deleted file mode 100644
index aba1609..0000000
--- a/arch/sparc/include/asm/system_32.h
+++ /dev/null
@@ -1,284 +0,0 @@
-#ifndef __SPARC_SYSTEM_H
-#define __SPARC_SYSTEM_H
-
-#include <linux/kernel.h>
-#include <linux/threads.h> /* NR_CPUS */
-#include <linux/thread_info.h>
-
-#include <asm/page.h>
-#include <asm/psr.h>
-#include <asm/ptrace.h>
-#include <asm/btfixup.h>
-#include <asm/smp.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/irqflags.h>
-
-/*
- * Sparc (general) CPU types
- */
-enum sparc_cpu {
- sun4 = 0x00,
- sun4c = 0x01,
- sun4m = 0x02,
- sun4d = 0x03,
- sun4e = 0x04,
- sun4u = 0x05, /* V8 ploos ploos */
- sun_unknown = 0x06,
- ap1000 = 0x07, /* almost a sun4m */
- sparc_leon = 0x08, /* Leon SoC */
-};
-
-/* Really, userland should not be looking at any of this... */
-#ifdef __KERNEL__
-
-extern enum sparc_cpu sparc_cpu_model;
-
-#define ARCH_SUN4C (sparc_cpu_model==sun4c)
-
-#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */
-
-extern char reboot_command[];
-
-extern struct thread_info *current_set[NR_CPUS];
-
-extern unsigned long empty_bad_page;
-extern unsigned long empty_bad_page_table;
-extern unsigned long empty_zero_page;
-
-extern void sun_do_break(void);
-extern int serial_console;
-extern int stop_a_enabled;
-extern int scons_pwroff;
-
-static inline int con_is_present(void)
-{
- return serial_console ? 0 : 1;
-}
-
-/* When a context switch happens we must flush all user windows so that
- * the windows of the current process are flushed onto its stack. This
- * way the windows are all clean for the next process and the stack
- * frames are up to date.
- */
-extern void flush_user_windows(void);
-extern void kill_user_windows(void);
-extern void synchronize_user_stack(void);
-extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
- void *fpqueue, unsigned long *fpqdepth);
-
-#ifdef CONFIG_SMP
-#define SWITCH_ENTER(prv) \
- do { \
- if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \
- put_psr(get_psr() | PSR_EF); \
- fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \
- &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \
- clear_tsk_thread_flag(prv, TIF_USEDFPU); \
- (prv)->thread.kregs->psr &= ~PSR_EF; \
- } \
- } while(0)
-
-#define SWITCH_DO_LAZY_FPU(next) /* */
-#else
-#define SWITCH_ENTER(prv) /* */
-#define SWITCH_DO_LAZY_FPU(nxt) \
- do { \
- if (last_task_used_math != (nxt)) \
- (nxt)->thread.kregs->psr&=~PSR_EF; \
- } while(0)
-#endif
-
-extern void flushw_all(void);
-
-/*
- * Flush windows so that the VM switch which follows
- * would not pull the stack from under us.
- *
- * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work)
- * XXX WTF is the above comment? Found in late teen 2.4.x.
- */
-#define prepare_arch_switch(next) do { \
- __asm__ __volatile__( \
- ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \
- "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
- "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
- "save %sp, -0x40, %sp\n\t" \
- "restore; restore; restore; restore; restore; restore; restore"); \
-} while(0)
-
- /* Much care has gone into this code, do not touch it.
- *
- * We need to loadup regs l0/l1 for the newly forked child
- * case because the trap return path relies on those registers
- * holding certain values, gcc is told that they are clobbered.
- * Gcc needs registers for 3 values in and 1 value out, so we
- * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM
- *
- * Hey Dave, that do not touch sign is too much of an incentive
- * - Anton & Pete
- */
-#define switch_to(prev, next, last) do { \
- SWITCH_ENTER(prev); \
- SWITCH_DO_LAZY_FPU(next); \
- cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm)); \
- __asm__ __volatile__( \
- "sethi %%hi(here - 0x8), %%o7\n\t" \
- "mov %%g6, %%g3\n\t" \
- "or %%o7, %%lo(here - 0x8), %%o7\n\t" \
- "rd %%psr, %%g4\n\t" \
- "std %%sp, [%%g6 + %4]\n\t" \
- "rd %%wim, %%g5\n\t" \
- "wr %%g4, 0x20, %%psr\n\t" \
- "nop\n\t" \
- "std %%g4, [%%g6 + %3]\n\t" \
- "ldd [%2 + %3], %%g4\n\t" \
- "mov %2, %%g6\n\t" \
- ".globl patchme_store_new_current\n" \
-"patchme_store_new_current:\n\t" \
- "st %2, [%1]\n\t" \
- "wr %%g4, 0x20, %%psr\n\t" \
- "nop\n\t" \
- "nop\n\t" \
- "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \
- "ldd [%%g6 + %4], %%sp\n\t" \
- "wr %%g5, 0x0, %%wim\n\t" \
- "ldd [%%sp + 0x00], %%l0\n\t" \
- "ldd [%%sp + 0x38], %%i6\n\t" \
- "wr %%g4, 0x0, %%psr\n\t" \
- "nop\n\t" \
- "nop\n\t" \
- "jmpl %%o7 + 0x8, %%g0\n\t" \
- " ld [%%g3 + %5], %0\n\t" \
- "here:\n" \
- : "=&r" (last) \
- : "r" (&(current_set[hard_smp_processor_id()])), \
- "r" (task_thread_info(next)), \
- "i" (TI_KPSR), \
- "i" (TI_KSP), \
- "i" (TI_TASK) \
- : "g1", "g2", "g3", "g4", "g5", "g7", \
- "l0", "l1", "l3", "l4", "l5", "l6", "l7", \
- "i0", "i1", "i2", "i3", "i4", "i5", \
- "o0", "o1", "o2", "o3", "o7"); \
- } while(0)
-
-/* XXX Change this if we ever use a PSO mode kernel. */
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-#define rmb() mb()
-#define wmb() mb()
-#define read_barrier_depends() do { } while(0)
-#define set_mb(__var, __value) do { __var = __value; mb(); } while(0)
-#define smp_mb() __asm__ __volatile__("":::"memory")
-#define smp_rmb() __asm__ __volatile__("":::"memory")
-#define smp_wmb() __asm__ __volatile__("":::"memory")
-#define smp_read_barrier_depends() do { } while(0)
-
-#define nop() __asm__ __volatile__ ("nop")
-
-/* This has special calling conventions */
-#ifndef CONFIG_SMP
-BTFIXUPDEF_CALL(void, ___xchg32, void)
-#endif
-
-static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
-{
-#ifdef CONFIG_SMP
- __asm__ __volatile__("swap [%2], %0"
- : "=&r" (val)
- : "0" (val), "r" (m)
- : "memory");
- return val;
-#else
- register unsigned long *ptr asm("g1");
- register unsigned long ret asm("g2");
-
- ptr = (unsigned long *) m;
- ret = val;
-
- /* Note: this is magic and the nop there is
- really needed. */
- __asm__ __volatile__(
- "mov %%o7, %%g4\n\t"
- "call ___f____xchg32\n\t"
- " nop\n\t"
- : "=&r" (ret)
- : "0" (ret), "r" (ptr)
- : "g3", "g4", "g7", "memory", "cc");
-
- return ret;
-#endif
-}
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
-{
- switch (size) {
- case 4:
- return xchg_u32(ptr, x);
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-
-/* Emulate cmpxchg() the same way we emulate atomics,
- * by hashing the object address and indexing into an array
- * of spinlocks to get a bit of performance...
- *
- * See arch/sparc/lib/atomic32.c for implementation.
- *
- * Cribbed from <asm-parisc/atomic.h>
- */
-#define __HAVE_ARCH_CMPXCHG 1
-
-/* bug catcher for when unsupported size is used - won't link */
-extern void __cmpxchg_called_with_bad_pointer(void);
-/* we only need to support cmpxchg of a u32 on sparc */
-extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
-
-/* don't worry...optimizer will get rid of most of this */
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
- default:
- __cmpxchg_called_with_bad_pointer();
- break;
- }
- return old;
-}
-
-#define cmpxchg(ptr, o, n) \
-({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
-})
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
-
-#endif /* __KERNEL__ */
-
-#endif /* __ASSEMBLY__ */
-
-#define arch_align_stack(x) (x)
-
-#endif /* !(__SPARC_SYSTEM_H) */
diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h
deleted file mode 100644
index 10bcabc..0000000
--- a/arch/sparc/include/asm/system_64.h
+++ /dev/null
@@ -1,331 +0,0 @@
-#ifndef __SPARC64_SYSTEM_H
-#define __SPARC64_SYSTEM_H
-
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-#include <asm/visasm.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/irqflags.h>
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * Sparc (general) CPU types
- */
-enum sparc_cpu {
- sun4 = 0x00,
- sun4c = 0x01,
- sun4m = 0x02,
- sun4d = 0x03,
- sun4e = 0x04,
- sun4u = 0x05, /* V8 ploos ploos */
- sun_unknown = 0x06,
- ap1000 = 0x07, /* almost a sun4m */
-};
-
-#define sparc_cpu_model sun4u
-
-/* This cannot ever be a sun4c :) That's just history. */
-#define ARCH_SUN4C 0
-
-extern char reboot_command[];
-
-/* These are here in an effort to more fully work around Spitfire Errata
- * #51. Essentially, if a memory barrier occurs soon after a mispredicted
- * branch, the chip can stop executing instructions until a trap occurs.
- * Therefore, if interrupts are disabled, the chip can hang forever.
- *
- * It used to be believed that the memory barrier had to be right in the
- * delay slot, but a case has been traced recently wherein the memory barrier
- * was one instruction after the branch delay slot and the chip still hung.
- * The offending sequence was the following in sym_wakeup_done() of the
- * sym53c8xx_2 driver:
- *
- * call sym_ccb_from_dsa, 0
- * movge %icc, 0, %l0
- * brz,pn %o0, .LL1303
- * mov %o0, %l2
- * membar #LoadLoad
- *
- * The branch has to be mispredicted for the bug to occur. Therefore, we put
- * the memory barrier explicitly into a "branch always, predicted taken"
- * delay slot to avoid the problem case.
- */
-#define membar_safe(type) \
-do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
- " membar " type "\n" \
- "1:\n" \
- : : : "memory"); \
-} while (0)
-
-/* The kernel always executes in TSO memory model these days,
- * and furthermore most sparc64 chips implement more stringent
- * memory ordering than required by the specifications.
- */
-#define mb() membar_safe("#StoreLoad")
-#define rmb() __asm__ __volatile__("":::"memory")
-#define wmb() __asm__ __volatile__("":::"memory")
-
-#endif
-
-#define nop() __asm__ __volatile__ ("nop")
-
-#define read_barrier_depends() do { } while(0)
-#define set_mb(__var, __value) \
- do { __var = __value; membar_safe("#StoreLoad"); } while(0)
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#else
-#define smp_mb() __asm__ __volatile__("":::"memory")
-#define smp_rmb() __asm__ __volatile__("":::"memory")
-#define smp_wmb() __asm__ __volatile__("":::"memory")
-#endif
-
-#define smp_read_barrier_depends() do { } while(0)
-
-#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
-
-#define flushw_all() __asm__ __volatile__("flushw")
-
-/* Performance counter register access. */
-#define read_pcr(__p) __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p))
-#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p))
-#define read_pic(__p) __asm__ __volatile__("rd %%pic, %0" : "=r" (__p))
-
-/* Blackbird errata workaround. See commentary in
- * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt()
- * for more information.
- */
-#define write_pic(__p) \
- __asm__ __volatile__("ba,pt %%xcc, 99f\n\t" \
- " nop\n\t" \
- ".align 64\n" \
- "99:wr %0, 0x0, %%pic\n\t" \
- "rd %%pic, %%g0" : : "r" (__p))
-#define reset_pic() write_pic(0)
-
-#ifndef __ASSEMBLY__
-
-extern void sun_do_break(void);
-extern int stop_a_enabled;
-extern int scons_pwroff;
-
-extern void fault_in_user_windows(void);
-extern void synchronize_user_stack(void);
-
-extern void __flushw_user(void);
-#define flushw_user() __flushw_user()
-
-#define flush_user_windows flushw_user
-#define flush_register_windows flushw_all
-
-/* Don't hold the runqueue lock over context switch */
-#define __ARCH_WANT_UNLOCKED_CTXSW
-#define prepare_arch_switch(next) \
-do { \
- flushw_all(); \
-} while (0)
-
- /* See what happens when you design the chip correctly?
- *
- * We tell gcc we clobber all non-fixed-usage registers except
- * for l0/l1. It will use one for 'next' and the other to hold
- * the output value of 'last'. 'next' is not referenced again
- * past the invocation of switch_to in the scheduler, so we need
- * not preserve it's value. Hairy, but it lets us remove 2 loads
- * and 2 stores in this critical code path. -DaveM
- */
-#define switch_to(prev, next, last) \
-do { flush_tlb_pending(); \
- save_and_clear_fpu(); \
- /* If you are tempted to conditionalize the following */ \
- /* so that ASI is only written if it changes, think again. */ \
- __asm__ __volatile__("wr %%g0, %0, %%asi" \
- : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\
- trap_block[current_thread_info()->cpu].thread = \
- task_thread_info(next); \
- __asm__ __volatile__( \
- "mov %%g4, %%g7\n\t" \
- "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \
- "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \
- "rdpr %%wstate, %%o5\n\t" \
- "stx %%o6, [%%g6 + %6]\n\t" \
- "stb %%o5, [%%g6 + %5]\n\t" \
- "rdpr %%cwp, %%o5\n\t" \
- "stb %%o5, [%%g6 + %8]\n\t" \
- "wrpr %%g0, 15, %%pil\n\t" \
- "mov %4, %%g6\n\t" \
- "ldub [%4 + %8], %%g1\n\t" \
- "wrpr %%g1, %%cwp\n\t" \
- "ldx [%%g6 + %6], %%o6\n\t" \
- "ldub [%%g6 + %5], %%o5\n\t" \
- "ldub [%%g6 + %7], %%o7\n\t" \
- "wrpr %%o5, 0x0, %%wstate\n\t" \
- "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \
- "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \
- "ldx [%%g6 + %9], %%g4\n\t" \
- "wrpr %%g0, 14, %%pil\n\t" \
- "brz,pt %%o7, switch_to_pc\n\t" \
- " mov %%g7, %0\n\t" \
- "sethi %%hi(ret_from_syscall), %%g1\n\t" \
- "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \
- " nop\n\t" \
- ".globl switch_to_pc\n\t" \
- "switch_to_pc:\n\t" \
- : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \
- "=r" (__local_per_cpu_offset) \
- : "0" (task_thread_info(next)), \
- "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \
- "i" (TI_CWP), "i" (TI_TASK) \
- : "cc", \
- "g1", "g2", "g3", "g7", \
- "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
- "i0", "i1", "i2", "i3", "i4", "i5", \
- "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \
-} while(0)
-
-static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
-{
- unsigned long tmp1, tmp2;
-
- __asm__ __volatile__(
-" mov %0, %1\n"
-"1: lduw [%4], %2\n"
-" cas [%4], %2, %0\n"
-" cmp %2, %0\n"
-" bne,a,pn %%icc, 1b\n"
-" mov %1, %0\n"
- : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
- : "0" (val), "r" (m)
- : "cc", "memory");
- return val;
-}
-
-static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
-{
- unsigned long tmp1, tmp2;
-
- __asm__ __volatile__(
-" mov %0, %1\n"
-"1: ldx [%4], %2\n"
-" casx [%4], %2, %0\n"
-" cmp %2, %0\n"
-" bne,a,pn %%xcc, 1b\n"
-" mov %1, %0\n"
- : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
- : "0" (val), "r" (m)
- : "cc", "memory");
- return val;
-}
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
- int size)
-{
- switch (size) {
- case 4:
- return xchg32(ptr, x);
- case 8:
- return xchg64(ptr, x);
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-
-extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
-
-/*
- * Atomic compare and exchange. Compare OLD with MEM, if identical,
- * store NEW in MEM. Return the initial value in MEM. Success is
- * indicated by comparing RETURN with OLD.
- */
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long
-__cmpxchg_u32(volatile int *m, int old, int new)
-{
- __asm__ __volatile__("cas [%2], %3, %0"
- : "=&r" (new)
- : "0" (new), "r" (m), "r" (old)
- : "memory");
-
- return new;
-}
-
-static inline unsigned long
-__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
-{
- __asm__ __volatile__("casx [%2], %3, %0"
- : "=&r" (new)
- : "0" (new), "r" (m), "r" (old)
- : "memory");
-
- return new;
-}
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
- case 8:
- return __cmpxchg_u64(ptr, old, new);
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr,o,n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- case 8: return __cmpxchg(ptr, old, new, size);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg_local((ptr), (o), (n)); \
- })
-
-#endif /* !(__ASSEMBLY__) */
-
-#define arch_align_stack(x) (x)
-
-#endif /* !(__SPARC64_SYSTEM_H) */
diff --git a/arch/sparc/include/asm/timer_32.h b/arch/sparc/include/asm/timer_32.h
index 2ec030e..1a91e11 100644
--- a/arch/sparc/include/asm/timer_32.h
+++ b/arch/sparc/include/asm/timer_32.h
@@ -8,12 +8,13 @@
#ifndef _SPARC_TIMER_H
#define _SPARC_TIMER_H

-#include <asm/system.h> /* For SUN4M_NCPUS */
+#include <asm/cpu_type.h> /* For SUN4M_NCPUS */
#include <asm/btfixup.h>

extern __volatile__ unsigned int *master_l10_counter;

/* FIXME: Make do_[gs]ettimeofday btfixup calls */
+struct timespec;
BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv)
#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv)

diff --git a/arch/sparc/kernel/auxio_32.c b/arch/sparc/kernel/auxio_32.c
index f7ea8f0..56d0f52 100644
--- a/arch/sparc/kernel/auxio_32.c
+++ b/arch/sparc/kernel/auxio_32.c
@@ -13,6 +13,7 @@
#include <asm/io.h>
#include <asm/auxio.h>
#include <asm/string.h> /* memset(), Linux has no bzero() */
+#include <asm/cpu_type.h>

/* Probe and map in the Auxiliary I/O register */

diff --git a/arch/sparc/kernel/devices.c b/arch/sparc/kernel/devices.c
index 876c9f6..6b2f56a 100644
--- a/arch/sparc/kernel/devices.c
+++ b/arch/sparc/kernel/devices.c
@@ -18,6 +18,7 @@
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/cpudata.h>
+#include <asm/cpu_type.h>

extern void clock_stop_probe(void); /* tadpole.c */
extern void sun4c_probe_memerr_reg(void);
diff --git a/arch/sparc/kernel/irq.h b/arch/sparc/kernel/irq.h
index 4285112..5a021dd 100644
--- a/arch/sparc/kernel/irq.h
+++ b/arch/sparc/kernel/irq.h
@@ -1,6 +1,7 @@
#include <linux/platform_device.h>

#include <asm/btfixup.h>
+#include <asm/cpu_type.h>

struct irq_bucket {
struct irq_bucket *next;
diff --git a/arch/sparc/kernel/kgdb_32.c b/arch/sparc/kernel/kgdb_32.c
index 539243b..2e424a5 100644
--- a/arch/sparc/kernel/kgdb_32.c
+++ b/arch/sparc/kernel/kgdb_32.c
@@ -9,6 +9,7 @@
#include <asm/kdebug.h>
#include <asm/ptrace.h>
#include <asm/irq.h>
+#include <asm/cacheflush.h>

extern unsigned long trapbase;

diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index e551987..276359e 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -16,6 +16,7 @@

#include <asm/processor.h>
#include <asm/spitfire.h>
+#include <asm/cacheflush.h>

#include "entry.h"

diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index c76fe0b..eb1c1f0 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -22,6 +22,7 @@
#include <asm/perf_event.h>
#include <asm/ptrace.h>
#include <asm/pcr.h>
+#include <asm/perfctr.h>

#include "kstack.h"

diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
index a24072a..0ce0dd2 100644
--- a/arch/sparc/kernel/pcr.c
+++ b/arch/sparc/kernel/pcr.c
@@ -14,6 +14,7 @@
#include <asm/pcr.h>
#include <asm/nmi.h>
#include <asm/spitfire.h>
+#include <asm/perfctr.h>

/* This code is shared between various users of the performance
* counters. Users will be oprofile, pseudo-NMI watchdog, and the
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 614da62..4361286 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -25,6 +25,8 @@
#include <linux/atomic.h>
#include <asm/nmi.h>
#include <asm/pcr.h>
+#include <asm/perfctr.h>
+#include <asm/cacheflush.h>

#include "kernel.h"
#include "kstack.h"
diff --git a/arch/sparc/kernel/process_32.c b/arch/sparc/kernel/process_32.c
index a2050b3..8a91a0c 100644
--- a/arch/sparc/kernel/process_32.c
+++ b/arch/sparc/kernel/process_32.c
@@ -37,6 +37,7 @@
#include <asm/elf.h>
#include <asm/prom.h>
#include <asm/unistd.h>
+#include <asm/setup.h>

/*
* Power management idle function
diff --git a/arch/sparc/kernel/ptrace_32.c b/arch/sparc/kernel/ptrace_32.c
index 38af4a8..896ba7c 100644
--- a/arch/sparc/kernel/ptrace_32.c
+++ b/arch/sparc/kernel/ptrace_32.c
@@ -24,6 +24,7 @@

#include <asm/pgtable.h>
#include <asm/uaccess.h>
+#include <asm/cacheflush.h>

/* #define ALLOW_INIT_TRACING */

diff --git a/arch/sparc/kernel/reboot.c b/arch/sparc/kernel/reboot.c
index 5384d56..eba7d91 100644
--- a/arch/sparc/kernel/reboot.c
+++ b/arch/sparc/kernel/reboot.c
@@ -9,6 +9,7 @@

#include <asm/oplib.h>
#include <asm/prom.h>
+#include <asm/setup.h>

/* sysctl - toggle power-off restriction for serial console
* systems in machine_power_off()
diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c
index 010f719..d444468 100644
--- a/arch/sparc/kernel/setup_32.c
+++ b/arch/sparc/kernel/setup_32.c
@@ -45,6 +45,7 @@
#include <asm/machines.h>
#include <asm/cpudata.h>
#include <asm/setup.h>
+#include <asm/cacheflush.h>

#include "kernel.h"

diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 0a6b078..1414d16 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -48,6 +48,7 @@
#include <asm/btext.h>
#include <asm/elf.h>
#include <asm/mdesc.h>
+#include <asm/cacheflush.h>

#ifdef CONFIG_IP_PNP
#include <net/ipconfig.h>
diff --git a/arch/sparc/kernel/signal32.c b/arch/sparc/kernel/signal32.c
index 023b886..df3e6c8 100644
--- a/arch/sparc/kernel/signal32.c
+++ b/arch/sparc/kernel/signal32.c
@@ -28,6 +28,7 @@
#include <asm/fpumacro.h>
#include <asm/visasm.h>
#include <asm/compat_signal.h>
+#include <asm/switch_to.h>

#include "sigutil.h"

diff --git a/arch/sparc/kernel/signal_32.c b/arch/sparc/kernel/signal_32.c
index d54c6e5..d260126 100644
--- a/arch/sparc/kernel/signal_32.c
+++ b/arch/sparc/kernel/signal_32.c
@@ -25,6 +25,7 @@
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/cacheflush.h> /* flush_sig_insns */
+#include <asm/switch_to.h>

#include "sigutil.h"

diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index f0836cd..4e50215 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -31,6 +31,8 @@
#include <asm/uctx.h>
#include <asm/siginfo.h>
#include <asm/visasm.h>
+#include <asm/switch_to.h>
+#include <asm/cacheflush.h>

#include "entry.h"
#include "systbls.h"
diff --git a/arch/sparc/kernel/sigutil_32.c b/arch/sparc/kernel/sigutil_32.c
index 35c7897..0f6eebe 100644
--- a/arch/sparc/kernel/sigutil_32.c
+++ b/arch/sparc/kernel/sigutil_32.c
@@ -7,6 +7,7 @@
#include <asm/sigcontext.h>
#include <asm/fpumacro.h>
#include <asm/ptrace.h>
+#include <asm/switch_to.h>

#include "sigutil.h"

diff --git a/arch/sparc/kernel/sigutil_64.c b/arch/sparc/kernel/sigutil_64.c
index b19570d..387834a 100644
--- a/arch/sparc/kernel/sigutil_64.c
+++ b/arch/sparc/kernel/sigutil_64.c
@@ -7,6 +7,7 @@
#include <asm/sigcontext.h>
#include <asm/fpumacro.h>
#include <asm/ptrace.h>
+#include <asm/switch_to.h>

#include "sigutil.h"

diff --git a/arch/sparc/kernel/sparc_ksyms_64.c b/arch/sparc/kernel/sparc_ksyms_64.c
index af39e3f..9f5e24d 100644
--- a/arch/sparc/kernel/sparc_ksyms_64.c
+++ b/arch/sparc/kernel/sparc_ksyms_64.c
@@ -15,6 +15,7 @@
#include <asm/spitfire.h>
#include <asm/oplib.h>
#include <asm/hypervisor.h>
+#include <asm/cacheflush.h>

struct poll {
int fd;
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index bd3d285..c72fdf5 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -40,6 +40,7 @@
#include <asm/head.h>
#include <asm/prom.h>
#include <asm/memctrl.h>
+#include <asm/cacheflush.h>

#include "entry.h"
#include "kstack.h"
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index 622f653..dae85bc 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -23,6 +23,7 @@
#include <linux/ratelimit.h>
#include <linux/bitops.h>
#include <asm/fpumacro.h>
+#include <asm/cacheflush.h>

enum direction {
load, /* ld, ldd, ldh, ldsh */
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index 8573025..08e074b7 100644
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -11,6 +11,7 @@
#include <asm/pstate.h>
#include <asm/fpumacro.h>
#include <asm/uaccess.h>
+#include <asm/cacheflush.h>

/* OPF field of various VIS instructions. */

diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c
index e575bd2..2bbe2f2 100644
--- a/arch/sparc/math-emu/math_64.c
+++ b/arch/sparc/math-emu/math_64.c
@@ -16,6 +16,7 @@
#include <asm/fpumacro.h>
#include <asm/ptrace.h>
#include <asm/uaccess.h>
+#include <asm/cacheflush.h>

#include "sfp-util_64.h"
#include <math-emu/soft-fp.h>
diff --git a/drivers/tty/serial/sunhv.c b/drivers/tty/serial/sunhv.c
index c0b7246..143fb50 100644
--- a/drivers/tty/serial/sunhv.c
+++ b/drivers/tty/serial/sunhv.c
@@ -23,6 +23,7 @@
#include <asm/spitfire.h>
#include <asm/prom.h>
#include <asm/irq.h>
+#include <asm/setup.h>

#if defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
diff --git a/drivers/tty/serial/sunsab.c b/drivers/tty/serial/sunsab.c
index b5fa2a5..3b63165 100644
--- a/drivers/tty/serial/sunsab.c
+++ b/drivers/tty/serial/sunsab.c
@@ -37,6 +37,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
+#include <asm/setup.h>

#if defined(CONFIG_SERIAL_SUNSAB_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c
index ad0f8f5..c53d737 100644
--- a/drivers/tty/serial/sunsu.c
+++ b/drivers/tty/serial/sunsu.c
@@ -41,6 +41,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
+#include <asm/setup.h>

#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c
index 8e916e7..f0ca0ac 100644
--- a/drivers/tty/serial/sunzilog.c
+++ b/drivers/tty/serial/sunzilog.c
@@ -37,6 +37,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
+#include <asm/setup.h>

#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
diff --git a/kernel/signal.c b/kernel/signal.c
index c73c428..7e41ae3 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -36,6 +36,8 @@
#include <asm/uaccess.h>
#include <asm/unistd.h>
#include <asm/siginfo.h>
+#include <asm/switch_to.h>
+#include <asm/cacheflush.h>
#include "audit.h" /* audit_signal_info() */

/*
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 79f799c..e739679 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -67,6 +67,9 @@
#include <asm/stacktrace.h>
#include <asm/io.h>
#endif
+#ifdef CONFIG_SPARC
+#include <asm/setup.h>
+#endif
#ifdef CONFIG_BSD_PROCESS_ACCT
#include <linux/acct.h>
#endif

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 26/29] Disintegrate asm/system.h for Tile
March 07, 2012 09:07PM
Disintegrate asm/system.h for Tile. Not compiled.

Signed-off-by: David Howells <[email protected]>
---

arch/tile/include/asm/barrier.h | 140 +++++++++++++++++++
arch/tile/include/asm/cacheflush.h | 10 +
arch/tile/include/asm/exec.h | 20 +++
arch/tile/include/asm/setup.h | 21 +++
arch/tile/include/asm/switch_to.h | 72 ++++++++++
arch/tile/include/asm/system.h | 261 ------------------------------------
arch/tile/include/asm/timex.h | 2
arch/tile/include/asm/unaligned.h | 15 ++
8 files changed, 280 insertions(+), 261 deletions(-)
create mode 100644 arch/tile/include/asm/barrier.h
create mode 100644 arch/tile/include/asm/exec.h
create mode 100644 arch/tile/include/asm/switch_to.h
delete mode 100644 arch/tile/include/asm/system.h

diff --git a/arch/tile/include/asm/barrier.h b/arch/tile/include/asm/barrier.h
new file mode 100644
index 0000000..e1bb6ae
--- /dev/null
+++ b/arch/tile/include/asm/barrier.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, version 2.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _ASM_TILE_BARRIER_H
+#define _ASM_TILE_BARRIER_H
+
+/*
+ * read_barrier_depends - Flush all pending reads that subsequents reads
+ * depend on.
+ *
+ * No data-dependent reads from memory-like regions are ever reordered
+ * over this barrier. All reads preceding this primitive are guaranteed
+ * to access memory (but not necessarily other CPUs' caches) before any
+ * reads following this primitive that depend on the data return by
+ * any of the preceding reads. This primitive is much lighter weight than
+ * rmb() on most CPUs, and is never heavier weight than is
+ * rmb().
+ *
+ * These ordering constraints are respected by both the local CPU
+ * and the compiler.
+ *
+ * Ordering is not guaranteed by anything other than these primitives,
+ * not even by data dependencies. See the documentation for
+ * memory_barrier() for examples and URLs to more information.
+ *
+ * For example, the following code would force ordering (the initial
+ * value of "a" is zero, "b" is one, and "p" is "&a"):
+ *
+ * <programlisting>
+ * CPU 0 CPU 1
+ *
+ * b = 2;
+ * memory_barrier();
+ * p = &b; q = p;
+ * read_barrier_depends();
+ * d = *q;
+ * </programlisting>
+ *
+ * because the read of "*q" depends on the read of "p" and these
+ * two reads are separated by a read_barrier_depends(). However,
+ * the following code, with the same initial values for "a" and "b":
+ *
+ * <programlisting>
+ * CPU 0 CPU 1
+ *
+ * a = 2;
+ * memory_barrier();
+ * b = 3; y = b;
+ * read_barrier_depends();
+ * x = a;
+ * </programlisting>
+ *
+ * does not enforce ordering, since there is no data dependency between
+ * the read of "a" and the read of "b". Therefore, on some CPUs, such
+ * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
+ * in cases like this where there are no data dependencies.
+ */
+#define read_barrier_depends() do { } while (0)
+
+#define __sync() __insn_mf()
+
+#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
+#include <hv/syscall_public.h>
+/*
+ * Issue an uncacheable load to each memory controller, then
+ * wait until those loads have completed.
+ */
+static inline void __mb_incoherent(void)
+{
+ long clobber_r10;
+ asm volatile("swint2"
+ : "=R10" (clobber_r10)
+ : "R10" (HV_SYS_fence_incoherent)
+ : "r0", "r1", "r2", "r3", "r4",
+ "r5", "r6", "r7", "r8", "r9",
+ "r11", "r12", "r13", "r14",
+ "r15", "r16", "r17", "r18", "r19",
+ "r20", "r21", "r22", "r23", "r24",
+ "r25", "r26", "r27", "r28", "r29");
+}
+#endif
+
+/* Fence to guarantee visibility of stores to incoherent memory. */
+static inline void
+mb_incoherent(void)
+{
+ __insn_mf();
+
+#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
+ {
+#if CHIP_HAS_TILE_WRITE_PENDING()
+ const unsigned long WRITE_TIMEOUT_CYCLES = 400;
+ unsigned long start = get_cycles_low();
+ do {
+ if (__insn_mfspr(SPR_TILE_WRITE_PENDING) == 0)
+ return;
+ } while ((get_cycles_low() - start) < WRITE_TIMEOUT_CYCLES);
+#endif /* CHIP_HAS_TILE_WRITE_PENDING() */
+ (void) __mb_incoherent();
+ }
+#endif /* CHIP_HAS_MF_WAITS_FOR_VICTIMS() */
+}
+
+#define fast_wmb() __sync()
+#define fast_rmb() __sync()
+#define fast_mb() __sync()
+#define fast_iob() mb_incoherent()
+
+#define wmb() fast_wmb()
+#define rmb() fast_rmb()
+#define mb() fast_mb()
+#define iob() fast_iob()
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while (0)
+#endif
+
+#define set_mb(var, value) \
+ do { var = value; mb(); } while (0)
+
+#endif _ASM_TILE_BARRIER_H
diff --git a/arch/tile/include/asm/cacheflush.h b/arch/tile/include/asm/cacheflush.h
index c2e0fda..0fc63c4 100644
--- a/arch/tile/include/asm/cacheflush.h
+++ b/arch/tile/include/asm/cacheflush.h
@@ -151,4 +151,14 @@ static inline void finv_buffer_local(void *buffer, size_t size)
*/
void finv_buffer_remote(void *buffer, size_t size, int hfh);

+/*
+ * On SMP systems, when the scheduler does migration-cost autodetection,
+ * it needs a way to flush as much of the CPU's caches as possible:
+ *
+ * TODO: fill this in!
+ */
+static inline void sched_cacheflush(void)
+{
+}
+
#endif /* _ASM_TILE_CACHEFLUSH_H */
diff --git a/arch/tile/include/asm/exec.h b/arch/tile/include/asm/exec.h
new file mode 100644
index 0000000..a714e19
--- /dev/null
+++ b/arch/tile/include/asm/exec.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, version 2.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _ASM_TILE_EXEC_H
+#define _ASM_TILE_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _ASM_TILE_EXEC_H */
diff --git a/arch/tile/include/asm/setup.h b/arch/tile/include/asm/setup.h
index 7caf0f3..43f82dc 100644
--- a/arch/tile/include/asm/setup.h
+++ b/arch/tile/include/asm/setup.h
@@ -31,6 +31,27 @@ void early_panic(const char *fmt, ...);
void warn_early_printk(void);
void __init disable_early_printk(void);

+/* Init-time routine to do tile-specific per-cpu setup. */
+void setup_cpu(int boot);
+
+/* User-level DMA management functions */
+void grant_dma_mpls(void);
+void restrict_dma_mpls(void);
+
+#ifdef CONFIG_HARDWALL
+/* User-level network management functions */
+void reset_network_state(void);
+void grant_network_mpls(void);
+void restrict_network_mpls(void);
+int hardwall_deactivate(struct task_struct *task);
+
+/* Hook hardwall code into changes in affinity. */
+#define arch_set_cpus_allowed(p, new_mask) do { \
+ if (p->thread.hardwall && !cpumask_equal(&p->cpus_allowed, new_mask)) \
+ hardwall_deactivate(p); \
+} while (0)
+#endif
+
#endif /* __KERNEL__ */

#endif /* _ASM_TILE_SETUP_H */
diff --git a/arch/tile/include/asm/switch_to.h b/arch/tile/include/asm/switch_to.h
new file mode 100644
index 0000000..fd6e527
--- /dev/null
+++ b/arch/tile/include/asm/switch_to.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, version 2.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _ASM_TILE_SWITCH_TO_H
+#define _ASM_TILE_SWITCH_TO_H
+
+/*
+ * switch_to(n) should switch tasks to task nr n, first
+ * checking that n isn't the current task, in which case it does nothing.
+ * The number of callee-saved registers saved on the kernel stack
+ * is defined here for use in copy_thread() and must agree with __switch_to().
+ */
+#define CALLEE_SAVED_FIRST_REG 30
+#define CALLEE_SAVED_REGS_COUNT 24 /* r30 to r52, plus an empty to align */
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Pause the DMA engine and static network before task switching.
+ */
+#define prepare_arch_switch(next) _prepare_arch_switch(next)
+void _prepare_arch_switch(struct task_struct *next);
+
+struct task_struct;
+#define switch_to(prev, next, last) ((last) = _switch_to((prev), (next)))
+extern struct task_struct *_switch_to(struct task_struct *prev,
+ struct task_struct *next);
+
+/* Helper function for _switch_to(). */
+extern struct task_struct *__switch_to(struct task_struct *prev,
+ struct task_struct *next,
+ unsigned long new_system_save_k_0);
+
+/* Address that switched-away from tasks are at. */
+extern unsigned long get_switch_to_pc(void);
+
+/*
+ * Kernel threads can check to see if they need to migrate their
+ * stack whenever they return from a context switch; for user
+ * threads, we defer until they are returning to user-space.
+ */
+#define finish_arch_switch(prev) do { \
+ if (unlikely((prev)->state == TASK_DEAD)) \
+ __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_EXIT | \
+ ((prev)->pid << _SIM_CONTROL_OPERATOR_BITS)); \
+ __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_SWITCH | \
+ (current->pid << _SIM_CONTROL_OPERATOR_BITS)); \
+ if (current->mm == NULL && !kstack_hash && \
+ current_thread_info()->homecache_cpu != smp_processor_id()) \
+ homecache_migrate_kthread(); \
+} while (0)
+
+/* Support function for forking a new task. */
+void ret_from_fork(void);
+
+/* Called from ret_from_fork() when a new process starts up. */
+struct task_struct *sim_notify_fork(struct task_struct *prev);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_TILE_SWITCH_TO_H */
diff --git a/arch/tile/include/asm/system.h b/arch/tile/include/asm/system.h
deleted file mode 100644
index 23d1842..0000000
--- a/arch/tile/include/asm/system.h
+++ /dev/null
@@ -1,261 +0,0 @@
-/*
- * Copyright 2010 Tilera Corporation. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation, version 2.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for
- * more details.
- */
-
-#ifndef _ASM_TILE_SYSTEM_H
-#define _ASM_TILE_SYSTEM_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-#include <linux/irqflags.h>
-
-/* NOTE: we can't include <linux/ptrace.h> due to #include dependencies. */
-#include <asm/ptrace.h>
-
-#include <arch/chip.h>
-#include <arch/sim_def.h>
-#include <arch/spr_def.h>
-
-/*
- * read_barrier_depends - Flush all pending reads that subsequents reads
- * depend on.
- *
- * No data-dependent reads from memory-like regions are ever reordered
- * over this barrier. All reads preceding this primitive are guaranteed
- * to access memory (but not necessarily other CPUs' caches) before any
- * reads following this primitive that depend on the data return by
- * any of the preceding reads. This primitive is much lighter weight than
- * rmb() on most CPUs, and is never heavier weight than is
- * rmb().
- *
- * These ordering constraints are respected by both the local CPU
- * and the compiler.
- *
- * Ordering is not guaranteed by anything other than these primitives,
- * not even by data dependencies. See the documentation for
- * memory_barrier() for examples and URLs to more information.
- *
- * For example, the following code would force ordering (the initial
- * value of "a" is zero, "b" is one, and "p" is "&a"):
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * b = 2;
- * memory_barrier();
- * p = &b; q = p;
- * read_barrier_depends();
- * d = *q;
- * </programlisting>
- *
- * because the read of "*q" depends on the read of "p" and these
- * two reads are separated by a read_barrier_depends(). However,
- * the following code, with the same initial values for "a" and "b":
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * a = 2;
- * memory_barrier();
- * b = 3; y = b;
- * read_barrier_depends();
- * x = a;
- * </programlisting>
- *
- * does not enforce ordering, since there is no data dependency between
- * the read of "a" and the read of "b". Therefore, on some CPUs, such
- * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
- * in cases like this where there are no data dependencies.
- */
-
-#define read_barrier_depends() do { } while (0)
-
-#define __sync() __insn_mf()
-
-#if CHIP_HAS_SPLIT_CYCLE()
-#define get_cycles_low() __insn_mfspr(SPR_CYCLE_LOW)
-#else
-#define get_cycles_low() __insn_mfspr(SPR_CYCLE) /* just get all 64 bits */
-#endif
-
-#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
-#include <hv/syscall_public.h>
-/*
- * Issue an uncacheable load to each memory controller, then
- * wait until those loads have completed.
- */
-static inline void __mb_incoherent(void)
-{
- long clobber_r10;
- asm volatile("swint2"
- : "=R10" (clobber_r10)
- : "R10" (HV_SYS_fence_incoherent)
- : "r0", "r1", "r2", "r3", "r4",
- "r5", "r6", "r7", "r8", "r9",
- "r11", "r12", "r13", "r14",
- "r15", "r16", "r17", "r18", "r19",
- "r20", "r21", "r22", "r23", "r24",
- "r25", "r26", "r27", "r28", "r29");
-}
-#endif
-
-/* Fence to guarantee visibility of stores to incoherent memory. */
-static inline void
-mb_incoherent(void)
-{
- __insn_mf();
-
-#if !CHIP_HAS_MF_WAITS_FOR_VICTIMS()
- {
-#if CHIP_HAS_TILE_WRITE_PENDING()
- const unsigned long WRITE_TIMEOUT_CYCLES = 400;
- unsigned long start = get_cycles_low();
- do {
- if (__insn_mfspr(SPR_TILE_WRITE_PENDING) == 0)
- return;
- } while ((get_cycles_low() - start) < WRITE_TIMEOUT_CYCLES);
-#endif /* CHIP_HAS_TILE_WRITE_PENDING() */
- (void) __mb_incoherent();
- }
-#endif /* CHIP_HAS_MF_WAITS_FOR_VICTIMS() */
-}
-
-#define fast_wmb() __sync()
-#define fast_rmb() __sync()
-#define fast_mb() __sync()
-#define fast_iob() mb_incoherent()
-
-#define wmb() fast_wmb()
-#define rmb() fast_rmb()
-#define mb() fast_mb()
-#define iob() fast_iob()
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while (0)
-#endif
-
-#define set_mb(var, value) \
- do { var = value; mb(); } while (0)
-
-/*
- * Pause the DMA engine and static network before task switching.
- */
-#define prepare_arch_switch(next) _prepare_arch_switch(next)
-void _prepare_arch_switch(struct task_struct *next);
-
-
-/*
- * switch_to(n) should switch tasks to task nr n, first
- * checking that n isn't the current task, in which case it does nothing.
- * The number of callee-saved registers saved on the kernel stack
- * is defined here for use in copy_thread() and must agree with __switch_to().
- */
-#endif /* !__ASSEMBLY__ */
-#define CALLEE_SAVED_FIRST_REG 30
-#define CALLEE_SAVED_REGS_COUNT 24 /* r30 to r52, plus an empty to align */
-#ifndef __ASSEMBLY__
-struct task_struct;
-#define switch_to(prev, next, last) ((last) = _switch_to((prev), (next)))
-extern struct task_struct *_switch_to(struct task_struct *prev,
- struct task_struct *next);
-
-/* Helper function for _switch_to(). */
-extern struct task_struct *__switch_to(struct task_struct *prev,
- struct task_struct *next,
- unsigned long new_system_save_k_0);
-
-/* Address that switched-away from tasks are at. */
-extern unsigned long get_switch_to_pc(void);
-
-/*
- * On SMP systems, when the scheduler does migration-cost autodetection,
- * it needs a way to flush as much of the CPU's caches as possible:
- *
- * TODO: fill this in!
- */
-static inline void sched_cacheflush(void)
-{
-}
-
-#define arch_align_stack(x) (x)
-
-/*
- * Is the kernel doing fixups of unaligned accesses? If <0, no kernel
- * intervention occurs and SIGBUS is delivered with no data address
- * info. If 0, the kernel single-steps the instruction to discover
- * the data address to provide with the SIGBUS. If 1, the kernel does
- * a fixup.
- */
-extern int unaligned_fixup;
-
-/* Is the kernel printing on each unaligned fixup? */
-extern int unaligned_printk;
-
-/* Number of unaligned fixups performed */
-extern unsigned int unaligned_fixup_count;
-
-/* Init-time routine to do tile-specific per-cpu setup. */
-void setup_cpu(int boot);
-
-/* User-level DMA management functions */
-void grant_dma_mpls(void);
-void restrict_dma_mpls(void);
-
-#ifdef CONFIG_HARDWALL
-/* User-level network management functions */
-void reset_network_state(void);
-void grant_network_mpls(void);
-void restrict_network_mpls(void);
-int hardwall_deactivate(struct task_struct *task);
-
-/* Hook hardwall code into changes in affinity. */
-#define arch_set_cpus_allowed(p, new_mask) do { \
- if (p->thread.hardwall && !cpumask_equal(&p->cpus_allowed, new_mask)) \
- hardwall_deactivate(p); \
-} while (0)
-#endif
-
-/*
- * Kernel threads can check to see if they need to migrate their
- * stack whenever they return from a context switch; for user
- * threads, we defer until they are returning to user-space.
- */
-#define finish_arch_switch(prev) do { \
- if (unlikely((prev)->state == TASK_DEAD)) \
- __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_EXIT | \
- ((prev)->pid << _SIM_CONTROL_OPERATOR_BITS)); \
- __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_SWITCH | \
- (current->pid << _SIM_CONTROL_OPERATOR_BITS)); \
- if (current->mm == NULL && !kstack_hash && \
- current_thread_info()->homecache_cpu != smp_processor_id()) \
- homecache_migrate_kthread(); \
-} while (0)
-
-/* Support function for forking a new task. */
-void ret_from_fork(void);
-
-/* Called from ret_from_fork() when a new process starts up. */
-struct task_struct *sim_notify_fork(struct task_struct *prev);
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_TILE_SYSTEM_H */
diff --git a/arch/tile/include/asm/timex.h b/arch/tile/include/asm/timex.h
index 29921f0..dc987d5 100644
--- a/arch/tile/include/asm/timex.h
+++ b/arch/tile/include/asm/timex.h
@@ -29,11 +29,13 @@ typedef unsigned long long cycles_t;

#if CHIP_HAS_SPLIT_CYCLE()
cycles_t get_cycles(void);
+#define get_cycles_low() __insn_mfspr(SPR_CYCLE_LOW)
#else
static inline cycles_t get_cycles(void)
{
return __insn_mfspr(SPR_CYCLE);
}
+#define get_cycles_low() __insn_mfspr(SPR_CYCLE) /* just get all 64 bits */
#endif

cycles_t get_clock_rate(void);
diff --git a/arch/tile/include/asm/unaligned.h b/arch/tile/include/asm/unaligned.h
index 137e2de..37dfbe5 100644
--- a/arch/tile/include/asm/unaligned.h
+++ b/arch/tile/include/asm/unaligned.h
@@ -21,4 +21,19 @@
#define get_unaligned __get_unaligned_le
#define put_unaligned __put_unaligned_le

+/*
+ * Is the kernel doing fixups of unaligned accesses? If <0, no kernel
+ * intervention occurs and SIGBUS is delivered with no data address
+ * info. If 0, the kernel single-steps the instruction to discover
+ * the data address to provide with the SIGBUS. If 1, the kernel does
+ * a fixup.
+ */
+extern int unaligned_fixup;
+
+/* Is the kernel printing on each unaligned fixup? */
+extern int unaligned_printk;
+
+/* Number of unaligned fixups performed */
+extern unsigned int unaligned_fixup_count;
+
#endif /* _ASM_TILE_UNALIGNED_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 27/29] Disintegrate asm/system.h for Unicore32
March 07, 2012 09:07PM
Disintegrate asm/system.h for Unicore32. Not Compiled. No asm/atomic.h or
asm/bug.h found prior to patch.

Signed-off-by: David Howells <[email protected]>
---

arch/unicore32/include/asm/atomic.h | 58 ++++++++++++
arch/unicore32/include/asm/barrier.h | 28 ++++++
arch/unicore32/include/asm/bug.h | 32 ++++++
arch/unicore32/include/asm/cr.h | 49 ++++++++++
arch/unicore32/include/asm/exec.h | 15 +++
arch/unicore32/include/asm/pgtable.h | 3 +
arch/unicore32/include/asm/setup.h | 16 +++
arch/unicore32/include/asm/switch_to.h | 30 ++++++
arch/unicore32/include/asm/system.h | 161 --------------------------------
9 files changed, 231 insertions(+), 161 deletions(-)
create mode 100644 arch/unicore32/include/asm/atomic.h
create mode 100644 arch/unicore32/include/asm/barrier.h
create mode 100644 arch/unicore32/include/asm/bug.h
create mode 100644 arch/unicore32/include/asm/cr.h
create mode 100644 arch/unicore32/include/asm/exec.h
create mode 100644 arch/unicore32/include/asm/setup.h
create mode 100644 arch/unicore32/include/asm/switch_to.h
delete mode 100644 arch/unicore32/include/asm/system.h

diff --git a/arch/unicore32/include/asm/atomic.h b/arch/unicore32/include/asm/atomic.h
new file mode 100644
index 0000000..a08d05b
--- /dev/null
+++ b/arch/unicore32/include/asm/atomic.h
@@ -0,0 +1,58 @@
+/*
+ * Atomics for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_ATOMIC_H__
+#define __UNICORE_ATOMIC_H__
+
+static inline unsigned long
+__xchg(unsigned long x, volatile void *ptr, int size)
+{
+ unsigned long ret;
+
+ switch (size) {
+ case 1:
+ asm volatile("@ __xchg1\n"
+ " swapb %0, %1, [%2]"
+ : "=&r" (ret)
+ : "r" (x), "r" (ptr)
+ : "memory", "cc");
+ break;
+ case 4:
+ asm volatile("@ __xchg4\n"
+ " swapw %0, %1, [%2]"
+ : "=&r" (ret)
+ : "r" (x), "r" (ptr)
+ : "memory", "cc");
+ break;
+ default:
+ panic("xchg: bad data size: ptr 0x%p, size %d\n",
+ ptr, size);
+ }
+
+ return ret;
+}
+
+#define xchg(ptr, x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
+ (unsigned long)(o), (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) \
+ __cmpxchg64_local_generic((ptr), (o), (n))
+
+#include <asm-generic/cmpxchg.h>
+
+#endif /* __UNICORE_ATOMIC_H__ */
diff --git a/arch/unicore32/include/asm/barrier.h b/arch/unicore32/include/asm/barrier.h
new file mode 100644
index 0000000..b7e5f82
--- /dev/null
+++ b/arch/unicore32/include/asm/barrier.h
@@ -0,0 +1,28 @@
+/*
+ * Memory barrier implementations for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_BARRIER_H__
+#define __UNICORE_BARRIER_H__
+
+#define isb() __asm__ __volatile__ ("" : : : "memory")
+#define dsb() __asm__ __volatile__ ("" : : : "memory")
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define read_barrier_depends() do { } while (0)
+#define smp_read_barrier_depends() do { } while (0)
+
+#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
+
+#endif /* __UNICORE_BARRIER_H__ */
diff --git a/arch/unicore32/include/asm/bug.h b/arch/unicore32/include/asm/bug.h
new file mode 100644
index 0000000..160366d
--- /dev/null
+++ b/arch/unicore32/include/asm/bug.h
@@ -0,0 +1,32 @@
+/*
+ * Bug handling for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_BUG_H__
+#define __UNICORE_BUG_H__
+
+#include <linux/linkage.h>
+
+struct pt_regs;
+struct siginfo;
+
+void die(const char *msg, struct pt_regs *regs, int err);
+
+void uc32_notify_die(const char *str, struct pt_regs *regs,
+ struct siginfo *info, unsigned long err, unsigned long trap);
+
+void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
+ struct pt_regs *),
+ int sig, int code, const char *name);
+
+extern asmlinkage void __backtrace(void);
+extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
+
+extern void __show_regs(struct pt_regs *);
+
+#endif /* __UNICORE_BUG_H__ */
diff --git a/arch/unicore32/include/asm/cr.h b/arch/unicore32/include/asm/cr.h
new file mode 100644
index 0000000..96510a1
--- /dev/null
+++ b/arch/unicore32/include/asm/cr.h
@@ -0,0 +1,49 @@
+/*
+ * CR registed bits for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_CR_H__
+#define __UNICORE_CR_H__
+
+/*
+ * CR1 bits (CP#0 CR1)
+ */
+#define CR_M (1 << 0) /* MMU enable */
+#define CR_A (1 << 1) /* Alignment abort enable */
+#define CR_D (1 << 2) /* Dcache enable */
+#define CR_I (1 << 3) /* Icache enable */
+#define CR_B (1 << 4) /* Dcache write mechanism: write back */
+#define CR_T (1 << 5) /* Burst enable */
+#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
+
+#ifndef __ASSEMBLY__
+
+#define vectors_high() (cr_alignment & CR_V)
+
+extern unsigned long cr_no_alignment; /* defined in entry-unicore.S */
+extern unsigned long cr_alignment; /* defined in entry-unicore.S */
+
+static inline unsigned int get_cr(void)
+{
+ unsigned int val;
+ asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc");
+ return val;
+}
+
+static inline void set_cr(unsigned int val)
+{
+ asm volatile("movc p0.c1, %0, #0 @set CR"
+ : : "r" (val) : "cc");
+ isb();
+}
+
+extern void adjust_cr(unsigned long mask, unsigned long set);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __UNICORE_CR_H__ */
diff --git a/arch/unicore32/include/asm/exec.h b/arch/unicore32/include/asm/exec.h
new file mode 100644
index 0000000..ae707b3
--- /dev/null
+++ b/arch/unicore32/include/asm/exec.h
@@ -0,0 +1,15 @@
+/*
+ * Process execution bits for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_EXEC_H__
+#define __UNICORE_EXEC_H__
+
+#define arch_align_stack(x) (x)
+
+#endif /* __UNICORE_EXEC_H__ */
diff --git a/arch/unicore32/include/asm/pgtable.h b/arch/unicore32/include/asm/pgtable.h
index 68b2f29..71b5520 100644
--- a/arch/unicore32/include/asm/pgtable.h
+++ b/arch/unicore32/include/asm/pgtable.h
@@ -312,6 +312,9 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];

#define pgtable_cache_init() do { } while (0)

+struct mm_struct;
+extern void show_pte(struct mm_struct *mm, unsigned long addr);
+
#endif /* !__ASSEMBLY__ */

#endif /* __UNICORE_PGTABLE_H__ */
diff --git a/arch/unicore32/include/asm/setup.h b/arch/unicore32/include/asm/setup.h
new file mode 100644
index 0000000..c69c969
--- /dev/null
+++ b/arch/unicore32/include/asm/setup.h
@@ -0,0 +1,16 @@
+/*
+ * Setup code for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_SETUP_H__
+#define __UNICORE_SETUP_H__
+
+extern int cpu_architecture(void);
+extern void cpu_init(void);
+
+#endif /* __UNICORE_SETUP_H__ */
diff --git a/arch/unicore32/include/asm/switch_to.h b/arch/unicore32/include/asm/switch_to.h
new file mode 100644
index 0000000..db7a40c
--- /dev/null
+++ b/arch/unicore32/include/asm/switch_to.h
@@ -0,0 +1,30 @@
+/*
+ * Task switching for PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __UNICORE_SWITCH_TO_H__
+#define __UNICORE_SWITCH_TO_H__
+
+struct task_struct;
+struct thread_info;
+
+/*
+ * switch_to(prev, next) should switch from task `prev' to `next'
+ * `prev' will never be the same as `next'. schedule() itself
+ * contains the memory barrier to tell GCC not to cache `current'.
+ */
+extern struct task_struct *__switch_to(struct task_struct *,
+ struct thread_info *, struct thread_info *);
+
+#define switch_to(prev, next, last) \
+do { \
+ last = __switch_to(prev, \
+ task_thread_info(prev), task_thread_info(next)); \
+} while (0)
+
+#endif /* __UNICORE_SWITCH_TO_H__ */
diff --git a/arch/unicore32/include/asm/system.h b/arch/unicore32/include/asm/system.h
deleted file mode 100644
index 246b71c..0000000
--- a/arch/unicore32/include/asm/system.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * linux/arch/unicore32/include/asm/system.h
- *
- * Code specific to PKUnity SoC and UniCore ISA
- *
- * Copyright (C) 2001-2010 GUAN Xue-tao
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __UNICORE_SYSTEM_H__
-#define __UNICORE_SYSTEM_H__
-
-#ifdef __KERNEL__
-
-/*
- * CR1 bits (CP#0 CR1)
- */
-#define CR_M (1 << 0) /* MMU enable */
-#define CR_A (1 << 1) /* Alignment abort enable */
-#define CR_D (1 << 2) /* Dcache enable */
-#define CR_I (1 << 3) /* Icache enable */
-#define CR_B (1 << 4) /* Dcache write mechanism: write back */
-#define CR_T (1 << 5) /* Burst enable */
-#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-
-struct thread_info;
-struct task_struct;
-
-struct pt_regs;
-
-void die(const char *msg, struct pt_regs *regs, int err);
-
-struct siginfo;
-void uc32_notify_die(const char *str, struct pt_regs *regs,
- struct siginfo *info, unsigned long err, unsigned long trap);
-
-void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
- struct pt_regs *),
- int sig, int code, const char *name);
-
-#define xchg(ptr, x) \
- ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
-
-extern asmlinkage void __backtrace(void);
-extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
-
-struct mm_struct;
-extern void show_pte(struct mm_struct *mm, unsigned long addr);
-extern void __show_regs(struct pt_regs *);
-
-extern int cpu_architecture(void);
-extern void cpu_init(void);
-
-#define vectors_high() (cr_alignment & CR_V)
-
-#define isb() __asm__ __volatile__ ("" : : : "memory")
-#define dsb() __asm__ __volatile__ ("" : : : "memory")
-#define dmb() __asm__ __volatile__ ("" : : : "memory")
-
-#define mb() barrier()
-#define rmb() barrier()
-#define wmb() barrier()
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define read_barrier_depends() do { } while (0)
-#define smp_read_barrier_depends() do { } while (0)
-
-#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
-#define nop() __asm__ __volatile__("mov\tr0,r0\[email protected] nop\n\t");
-
-extern unsigned long cr_no_alignment; /* defined in entry-unicore.S */
-extern unsigned long cr_alignment; /* defined in entry-unicore.S */
-
-static inline unsigned int get_cr(void)
-{
- unsigned int val;
- asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc");
- return val;
-}
-
-static inline void set_cr(unsigned int val)
-{
- asm volatile("movc p0.c1, %0, #0 @set CR"
- : : "r" (val) : "cc");
- isb();
-}
-
-extern void adjust_cr(unsigned long mask, unsigned long set);
-
-/*
- * switch_to(prev, next) should switch from task `prev' to `next'
- * `prev' will never be the same as `next'. schedule() itself
- * contains the memory barrier to tell GCC not to cache `current'.
- */
-extern struct task_struct *__switch_to(struct task_struct *,
- struct thread_info *, struct thread_info *);
-extern void panic(const char *fmt, ...);
-
-#define switch_to(prev, next, last) \
-do { \
- last = __switch_to(prev, \
- task_thread_info(prev), task_thread_info(next)); \
-} while (0)
-
-static inline unsigned long
-__xchg(unsigned long x, volatile void *ptr, int size)
-{
- unsigned long ret;
-
- switch (size) {
- case 1:
- asm volatile("@ __xchg1\n"
- " swapb %0, %1, [%2]"
- : "=&r" (ret)
- : "r" (x), "r" (ptr)
- : "memory", "cc");
- break;
- case 4:
- asm volatile("@ __xchg4\n"
- " swapw %0, %1, [%2]"
- : "=&r" (ret)
- : "r" (x), "r" (ptr)
- : "memory", "cc");
- break;
- default:
- panic("xchg: bad data size: ptr 0x%p, size %d\n",
- ptr, size);
- }
-
- return ret;
-}
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
- (unsigned long)(o), (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) \
- __cmpxchg64_local_generic((ptr), (o), (n))
-
-#include <asm-generic/cmpxchg.h>
-
-#endif /* __ASSEMBLY__ */
-
-#define arch_align_stack(x) (x)
-
-#endif /* __KERNEL__ */
-
-#endif

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 29/29] Disintegrate asm/system.h for Xtensa
March 07, 2012 09:08PM
Disintegrate asm/system.h for Xtensa.

Signed-off-by: David Howells <[email protected]>
---

arch/xtensa/include/asm/atomic.h | 111 +++++++++++++++++++++
arch/xtensa/include/asm/barrier.h | 29 ++++++
arch/xtensa/include/asm/exec.h | 14 +++
arch/xtensa/include/asm/setup.h | 2
arch/xtensa/include/asm/switch_to.h | 22 ++++
arch/xtensa/include/asm/system.h | 184 -----------------------------------
arch/xtensa/kernel/traps.c | 19 ++++
7 files changed, 197 insertions(+), 184 deletions(-)
create mode 100644 arch/xtensa/include/asm/barrier.h
create mode 100644 arch/xtensa/include/asm/exec.h
create mode 100644 arch/xtensa/include/asm/switch_to.h
delete mode 100644 arch/xtensa/include/asm/system.h

diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h
index 6f2e4da..f6cfe9a 100644
--- a/arch/xtensa/include/asm/atomic.h
+++ b/arch/xtensa/include/asm/atomic.h
@@ -220,6 +220,117 @@ static inline int atomic_sub_return(int i, atomic_t * v)
*/
#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)

+/*
+ * cmpxchg
+ */
+
+static inline unsigned long
+__cmpxchg_u32(volatile int *p, int old, int new)
+{
+ __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
+ "l32i %0, %1, 0 \n\t"
+ "bne %0, %2, 1f \n\t"
+ "s32i %3, %1, 0 \n\t"
+ "1: \n\t"
+ "wsr a15, "__stringify(PS)" \n\t"
+ "rsync \n\t"
+ : "=&a" (old)
+ : "a" (p), "a" (old), "r" (new)
+ : "a15", "memory");
+ return old;
+}
+/* This function doesn't exist, so you'll get a linker error
+ * if something tries to do an invalid cmpxchg(). */
+
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static __inline__ unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
+{
+ switch (size) {
+ case 4: return __cmpxchg_u32(ptr, old, new);
+ default: __cmpxchg_called_with_bad_pointer();
+ return old;
+ }
+}
+
+#define cmpxchg(ptr,o,n) \
+ ({ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof (*(ptr))); \
+ })
+
+#include <asm-generic/cmpxchg-local.h>
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+ unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+ default:
+ return __cmpxchg_local_generic(ptr, old, new, size);
+ }
+
+ return old;
+}
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+/*
+ * xchg_u32
+ *
+ * Note that a15 is used here because the register allocation
+ * done by the compiler is not guaranteed and a window overflow
+ * may not occur between the rsil and wsr instructions. By using
+ * a15 in the rsil, the machine is guaranteed to be in a state
+ * where no register reference will cause an overflow.
+ */
+
+static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
+{
+ unsigned long tmp;
+ __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
+ "l32i %0, %1, 0 \n\t"
+ "s32i %2, %1, 0 \n\t"
+ "wsr a15, "__stringify(PS)" \n\t"
+ "rsync \n\t"
+ : "=&a" (tmp)
+ : "a" (m), "a" (val)
+ : "a15", "memory");
+ return tmp;
+}
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+/*
+ * This only works if the compiler isn't horribly bad at optimizing.
+ * gcc-2.5.8 reportedly can't handle this, but I define that one to
+ * be dead anyway.
+ */
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static __inline__ unsigned long
+__xchg(unsigned long x, volatile void * ptr, int size)
+{
+ switch (size) {
+ case 4:
+ return xchg_u32(ptr, x);
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

diff --git a/arch/xtensa/include/asm/barrier.h b/arch/xtensa/include/asm/barrier.h
new file mode 100644
index 0000000..55707a8
--- /dev/null
+++ b/arch/xtensa/include/asm/barrier.h
@@ -0,0 +1,29 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 - 2005 Tensilica Inc.
+ */
+
+#ifndef _XTENSA_SYSTEM_H
+#define _XTENSA_SYSTEM_H
+
+#define smp_read_barrier_depends() do { } while(0)
+#define read_barrier_depends() do { } while(0)
+
+#define mb() barrier()
+#define rmb() mb()
+#define wmb() mb()
+
+#ifdef CONFIG_SMP
+#error smp_* not defined
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#endif
+
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+
+#endif /* _XTENSA_SYSTEM_H */
diff --git a/arch/xtensa/include/asm/exec.h b/arch/xtensa/include/asm/exec.h
new file mode 100644
index 0000000..af949e2
--- /dev/null
+++ b/arch/xtensa/include/asm/exec.h
@@ -0,0 +1,14 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 - 2005 Tensilica Inc.
+ */
+
+#ifndef _XTENSA_EXEC_H
+#define _XTENSA_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _XTENSA_EXEC_H */
diff --git a/arch/xtensa/include/asm/setup.h b/arch/xtensa/include/asm/setup.h
index e363652..9fa8ad9 100644
--- a/arch/xtensa/include/asm/setup.h
+++ b/arch/xtensa/include/asm/setup.h
@@ -13,4 +13,6 @@

#define COMMAND_LINE_SIZE 256

+extern void set_except_vector(int n, void *addr);
+
#endif
diff --git a/arch/xtensa/include/asm/switch_to.h b/arch/xtensa/include/asm/switch_to.h
new file mode 100644
index 0000000..6b73bf0
--- /dev/null
+++ b/arch/xtensa/include/asm/switch_to.h
@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 - 2005 Tensilica Inc.
+ */
+
+#ifndef _XTENSA_SWITCH_TO_H
+#define _XTENSA_SWITCH_TO_H
+
+/* * switch_to(n) should switch tasks to task nr n, first
+ * checking that n isn't the current task, in which case it does nothing.
+ */
+extern void *_switch_to(void *last, void *next);
+
+#define switch_to(prev,next,last) \
+do { \
+ (last) = _switch_to(prev, next); \
+} while(0)
+
+#endif /* _XTENSA_SWITCH_TO_H */
diff --git a/arch/xtensa/include/asm/system.h b/arch/xtensa/include/asm/system.h
deleted file mode 100644
index 1e7e09a..0000000
--- a/arch/xtensa/include/asm/system.h
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * include/asm-xtensa/system.h
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 - 2005 Tensilica Inc.
- */
-
-#ifndef _XTENSA_SYSTEM_H
-#define _XTENSA_SYSTEM_H
-
-#include <linux/stringify.h>
-#include <linux/irqflags.h>
-
-#include <asm/processor.h>
-
-#define smp_read_barrier_depends() do { } while(0)
-#define read_barrier_depends() do { } while(0)
-
-#define mb() barrier()
-#define rmb() mb()
-#define wmb() mb()
-
-#ifdef CONFIG_SMP
-#error smp_* not defined
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#endif
-
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#if !defined (__ASSEMBLY__)
-
-/* * switch_to(n) should switch tasks to task nr n, first
- * checking that n isn't the current task, in which case it does nothing.
- */
-extern void *_switch_to(void *last, void *next);
-
-#endif /* __ASSEMBLY__ */
-
-#define switch_to(prev,next,last) \
-do { \
- (last) = _switch_to(prev, next); \
-} while(0)
-
-/*
- * cmpxchg
- */
-
-static inline unsigned long
-__cmpxchg_u32(volatile int *p, int old, int new)
-{
- __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
- "l32i %0, %1, 0 \n\t"
- "bne %0, %2, 1f \n\t"
- "s32i %3, %1, 0 \n\t"
- "1: \n\t"
- "wsr a15, "__stringify(PS)" \n\t"
- "rsync \n\t"
- : "=&a" (old)
- : "a" (p), "a" (old), "r" (new)
- : "a15", "memory");
- return old;
-}
-/* This function doesn't exist, so you'll get a linker error
- * if something tries to do an invalid cmpxchg(). */
-
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static __inline__ unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
-{
- switch (size) {
- case 4: return __cmpxchg_u32(ptr, old, new);
- default: __cmpxchg_called_with_bad_pointer();
- return old;
- }
-}
-
-#define cmpxchg(ptr,o,n) \
- ({ __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof (*(ptr))); \
- })
-
-#include <asm-generic/cmpxchg-local.h>
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-/*
- * xchg_u32
- *
- * Note that a15 is used here because the register allocation
- * done by the compiler is not guaranteed and a window overflow
- * may not occur between the rsil and wsr instructions. By using
- * a15 in the rsil, the machine is guaranteed to be in a state
- * where no register reference will cause an overflow.
- */
-
-static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
-{
- unsigned long tmp;
- __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
- "l32i %0, %1, 0 \n\t"
- "s32i %2, %1, 0 \n\t"
- "wsr a15, "__stringify(PS)" \n\t"
- "rsync \n\t"
- : "=&a" (tmp)
- : "a" (m), "a" (val)
- : "a15", "memory");
- return tmp;
-}
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-/*
- * This only works if the compiler isn't horribly bad at optimizing.
- * gcc-2.5.8 reportedly can't handle this, but I define that one to
- * be dead anyway.
- */
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static __inline__ unsigned long
-__xchg(unsigned long x, volatile void * ptr, int size)
-{
- switch (size) {
- case 4:
- return xchg_u32(ptr, x);
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-
-extern void set_except_vector(int n, void *addr);
-
-static inline void spill_registers(void)
-{
- unsigned int a0, ps;
-
- __asm__ __volatile__ (
- "movi a14," __stringify (PS_EXCM_BIT) " | 1\n\t"
- "mov a12, a0\n\t"
- "rsr a13," __stringify(SAR) "\n\t"
- "xsr a14," __stringify(PS) "\n\t"
- "movi a0, _spill_registers\n\t"
- "rsync\n\t"
- "callx0 a0\n\t"
- "mov a0, a12\n\t"
- "wsr a13," __stringify(SAR) "\n\t"
- "wsr a14," __stringify(PS) "\n\t"
- :: "a" (&a0), "a" (&ps)
- : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory");
-}
-
-#define arch_align_stack(x) (x)
-
-#endif /* _XTENSA_SYSTEM_H */
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index e64efac..bc1e14c 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -381,6 +381,25 @@ static __always_inline unsigned long *stack_pointer(struct task_struct *task)
return sp;
}

+static inline void spill_registers(void)
+{
+ unsigned int a0, ps;
+
+ __asm__ __volatile__ (
+ "movi a14," __stringify (PS_EXCM_BIT) " | 1\n\t"
+ "mov a12, a0\n\t"
+ "rsr a13," __stringify(SAR) "\n\t"
+ "xsr a14," __stringify(PS) "\n\t"
+ "movi a0, _spill_registers\n\t"
+ "rsync\n\t"
+ "callx0 a0\n\t"
+ "mov a0, a12\n\t"
+ "wsr a13," __stringify(SAR) "\n\t"
+ "wsr a14," __stringify(PS) "\n\t"
+ :: "a" (&a0), "a" (&ps)
+ : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", "memory");
+}
+
void show_trace(struct task_struct *task, unsigned long *sp)
{
unsigned long a0, a1, pc;

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 28/29] Disintegrate asm/system.h for X86
March 07, 2012 09:08PM
Disintegrate asm/system.h for X86.

Signed-off-by: David Howells <[email protected]>
---

arch/x86/include/asm/auxvec.h | 7
arch/x86/include/asm/barrier.h | 113 +++++++
arch/x86/include/asm/bug.h | 4
arch/x86/include/asm/cacheflush.h | 1
arch/x86/include/asm/exec.h | 1
arch/x86/include/asm/i387.h | 1
arch/x86/include/asm/processor.h | 30 ++
arch/x86/include/asm/segment.h | 58 ++++
arch/x86/include/asm/special_insns.h | 199 +++++++++++++
arch/x86/include/asm/switch_to.h | 129 ++++++++
arch/x86/include/asm/system.h | 523 ----------------------------------
arch/x86/include/asm/tlbflush.h | 1
arch/x86/kernel/acpi/cstate.c | 1
arch/x86/kernel/paravirt.c | 1
arch/x86/kernel/process_32.c | 1
arch/x86/kernel/process_64.c | 1
arch/x86/kernel/tce_64.c | 1
17 files changed, 547 insertions(+), 525 deletions(-)
create mode 100644 arch/x86/include/asm/barrier.h
create mode 100644 arch/x86/include/asm/exec.h
create mode 100644 arch/x86/include/asm/special_insns.h
create mode 100644 arch/x86/include/asm/switch_to.h
delete mode 100644 arch/x86/include/asm/system.h

diff --git a/arch/x86/include/asm/auxvec.h b/arch/x86/include/asm/auxvec.h
index 1316b4c..77203ac 100644
--- a/arch/x86/include/asm/auxvec.h
+++ b/arch/x86/include/asm/auxvec.h
@@ -9,4 +9,11 @@
#endif
#define AT_SYSINFO_EHDR 33

+/* entries in ARCH_DLINFO: */
+#if defined(CONFIG_IA32_EMULATION) || !defined(CONFIG_X86_64)
+# define AT_VECTOR_SIZE_ARCH 2
+#else /* else it's non-compat x86-64 */
+# define AT_VECTOR_SIZE_ARCH 1
+#endif
+
#endif /* _ASM_X86_AUXVEC_H */
diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
new file mode 100644
index 0000000..dbce41c
--- /dev/null
+++ b/arch/x86/include/asm/barrier.h
@@ -0,0 +1,113 @@
+#ifndef _ASM_X86_BARRIER_H
+#define _ASM_X86_BARRIER_H
+
+/*
+ * Force strict CPU ordering.
+ * And yes, this is required on UP too when we're talking
+ * to devices.
+ */
+
+#ifdef CONFIG_X86_32
+/*
+ * Some non-Intel clones support out of order store. wmb() ceases to be a
+ * nop for these.
+ */
+#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
+#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
+#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
+#else
+#define mb() asm volatile("mfence":::"memory")
+#define rmb() asm volatile("lfence":::"memory")
+#define wmb() asm volatile("sfence" ::: "memory")
+#endif
+
+/**
+ * read_barrier_depends - Flush all pending reads that subsequents reads
+ * depend on.
+ *
+ * No data-dependent reads from memory-like regions are ever reordered
+ * over this barrier. All reads preceding this primitive are guaranteed
+ * to access memory (but not necessarily other CPUs' caches) before any
+ * reads following this primitive that depend on the data return by
+ * any of the preceding reads. This primitive is much lighter weight than
+ * rmb() on most CPUs, and is never heavier weight than is
+ * rmb().
+ *
+ * These ordering constraints are respected by both the local CPU
+ * and the compiler.
+ *
+ * Ordering is not guaranteed by anything other than these primitives,
+ * not even by data dependencies. See the documentation for
+ * memory_barrier() for examples and URLs to more information.
+ *
+ * For example, the following code would force ordering (the initial
+ * value of "a" is zero, "b" is one, and "p" is "&a"):
+ *
+ * <programlisting>
+ * CPU 0 CPU 1
+ *
+ * b = 2;
+ * memory_barrier();
+ * p = &b; q = p;
+ * read_barrier_depends();
+ * d = *q;
+ * </programlisting>
+ *
+ * because the read of "*q" depends on the read of "p" and these
+ * two reads are separated by a read_barrier_depends(). However,
+ * the following code, with the same initial values for "a" and "b":
+ *
+ * <programlisting>
+ * CPU 0 CPU 1
+ *
+ * a = 2;
+ * memory_barrier();
+ * b = 3; y = b;
+ * read_barrier_depends();
+ * x = a;
+ * </programlisting>
+ *
+ * does not enforce ordering, since there is no data dependency between
+ * the read of "a" and the read of "b". Therefore, on some CPUs, such
+ * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
+ * in cases like this where there are no data dependencies.
+ **/
+
+#define read_barrier_depends() do { } while (0)
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#ifdef CONFIG_X86_PPRO_FENCE
+# define smp_rmb() rmb()
+#else
+# define smp_rmb() barrier()
+#endif
+#ifdef CONFIG_X86_OOSTORE
+# define smp_wmb() wmb()
+#else
+# define smp_wmb() barrier()
+#endif
+#define smp_read_barrier_depends() read_barrier_depends()
+#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while (0)
+#define set_mb(var, value) do { var = value; barrier(); } while (0)
+#endif
+
+/*
+ * Stop RDTSC speculation. This is needed when you need to use RDTSC
+ * (or get_cycles or vread that possibly accesses the TSC) in a defined
+ * code region.
+ *
+ * (Could use an alternative three way for this if there was one.)
+ */
+static __always_inline void rdtsc_barrier(void)
+{
+ alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
+ alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
+}
+
+#endif /* _ASM_X86_BARRIER_H */
diff --git a/arch/x86/include/asm/bug.h b/arch/x86/include/asm/bug.h
index f654d1b..11e1152 100644
--- a/arch/x86/include/asm/bug.h
+++ b/arch/x86/include/asm/bug.h
@@ -36,4 +36,8 @@ do { \
#endif /* !CONFIG_BUG */

#include <asm-generic/bug.h>
+
+
+extern void show_regs_common(void);
+
#endif /* _ASM_X86_BUG_H */
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 4e12668..9863ee3 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -3,6 +3,7 @@

/* Caches aren't brain-dead on the intel. */
#include <asm-generic/cacheflush.h>
+#include <asm/special_insns.h>

#ifdef CONFIG_X86_PAT
/*
diff --git a/arch/x86/include/asm/exec.h b/arch/x86/include/asm/exec.h
new file mode 100644
index 0000000..54c2e1d
--- /dev/null
+++ b/arch/x86/include/asm/exec.h
@@ -0,0 +1 @@
+/* define arch_align_stack() here */
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index 2479049..82374df 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -24,6 +24,7 @@
#include <asm/user.h>
#include <asm/uaccess.h>
#include <asm/xsave.h>
+#include <asm/special_insns.h>

extern unsigned int sig_xstate_size;
extern void fpu_init(void);
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index d395527..8322a35 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -20,6 +20,7 @@ struct mm_struct;
#include <asm/msr.h>
#include <asm/desc_defs.h>
#include <asm/nops.h>
+#include <asm/special_insns.h>

#include <linux/personality.h>
#include <linux/cpumask.h>
@@ -28,6 +29,15 @@ struct mm_struct;
#include <linux/math64.h>
#include <linux/init.h>
#include <linux/err.h>
+#include <linux/irqflags.h>
+
+/*
+ * We handle most unaligned accesses in hardware. On the other hand
+ * unaligned DMA can be quite expensive on some Nehalem processors.
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN 0

#define HBP_NUM 4
/*
@@ -1020,4 +1030,24 @@ extern bool cpu_has_amd_erratum(const int *);
#define cpu_has_amd_erratum(x) (false)
#endif /* CONFIG_CPU_SUP_AMD */

+#ifdef CONFIG_X86_32
+/*
+ * disable hlt during certain critical i/o operations
+ */
+#define HAVE_DISABLE_HLT
+#endif
+
+void disable_hlt(void);
+void enable_hlt(void);
+
+void cpu_idle_wait(void);
+
+extern unsigned long arch_align_stack(unsigned long sp);
+extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
+
+void default_idle(void);
+bool set_pm_idle_to_default(void);
+
+void stop_this_cpu(void *dummy);
+
#endif /* _ASM_X86_PROCESSOR_H */
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index 5e64171..1654662 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -212,7 +212,61 @@
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][10];
-#endif
-#endif
+
+/*
+ * Load a segment. Fall back on loading the zero
+ * segment if something goes wrong..
+ */
+#define loadsegment(seg, value) \
+do { \
+ unsigned short __val = (value); \
+ \
+ asm volatile(" \n" \
+ "1: movl %k0,%%" #seg " \n" \
+ \
+ ".section .fixup,\"ax\" \n" \
+ "2: xorl %k0,%k0 \n" \
+ " jmp 1b \n" \
+ ".previous \n" \
+ \
+ _ASM_EXTABLE(1b, 2b) \
+ \
+ : "+r" (__val) : : "memory"); \
+} while (0)
+
+/*
+ * Save a segment register away
+ */
+#define savesegment(seg, value) \
+ asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
+
+/*
+ * x86_32 user gs accessors.
+ */
+#ifdef CONFIG_X86_32
+#ifdef CONFIG_X86_32_LAZY_GS
+#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
+#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
+#define task_user_gs(tsk) ((tsk)->thread.gs)
+#define lazy_save_gs(v) savesegment(gs, (v))
+#define lazy_load_gs(v) loadsegment(gs, (v))
+#else /* X86_32_LAZY_GS */
+#define get_user_gs(regs) (u16)((regs)->gs)
+#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
+#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
+#define lazy_save_gs(v) do { } while (0)
+#define lazy_load_gs(v) do { } while (0)
+#endif /* X86_32_LAZY_GS */
+#endif /* X86_32 */
+
+static inline unsigned long get_limit(unsigned long segment)
+{
+ unsigned long __limit;
+ asm("lsll %1,%0" : "=r" (__limit) : "r" (segment));
+ return __limit + 1;
+}
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ */

#endif /* _ASM_X86_SEGMENT_H */
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
new file mode 100644
index 0000000..41fc93a
--- /dev/null
+++ b/arch/x86/include/asm/special_insns.h
@@ -0,0 +1,199 @@
+#ifndef _ASM_X86_SPECIAL_INSNS_H
+#define _ASM_X86_SPECIAL_INSNS_H
+
+
+#ifdef __KERNEL__
+
+static inline void native_clts(void)
+{
+ asm volatile("clts");
+}
+
+/*
+ * Volatile isn't enough to prevent the compiler from reordering the
+ * read/write functions for the control registers and messing everything up.
+ * A memory clobber would solve the problem, but would prevent reordering of
+ * all loads stores around it, which can hurt performance. Solution is to
+ * use a variable and mimic reads and writes to it to enforce serialization
+ */
+static unsigned long __force_order;
+
+static inline unsigned long native_read_cr0(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline void native_write_cr0(unsigned long val)
+{
+ asm volatile("mov %0,%%cr0": : "r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr2(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr2,%0\n\t" : "=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline void native_write_cr2(unsigned long val)
+{
+ asm volatile("mov %0,%%cr2": : "r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr3(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr3,%0\n\t" : "=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline void native_write_cr3(unsigned long val)
+{
+ asm volatile("mov %0,%%cr3": : "r" (val), "m" (__force_order));
+}
+
+static inline unsigned long native_read_cr4(void)
+{
+ unsigned long val;
+ asm volatile("mov %%cr4,%0\n\t" : "=r" (val), "=m" (__force_order));
+ return val;
+}
+
+static inline unsigned long native_read_cr4_safe(void)
+{
+ unsigned long val;
+ /* This could fault if %cr4 does not exist. In x86_64, a cr4 always
+ * exists, so it will never fail. */
+#ifdef CONFIG_X86_32
+ asm volatile("1: mov %%cr4, %0\n"
+ "2:\n"
+ _ASM_EXTABLE(1b, 2b)
+ : "=r" (val), "=m" (__force_order) : "0" (0));
+#else
+ val = native_read_cr4();
+#endif
+ return val;
+}
+
+static inline void native_write_cr4(unsigned long val)
+{
+ asm volatile("mov %0,%%cr4": : "r" (val), "m" (__force_order));
+}
+
+#ifdef CONFIG_X86_64
+static inline unsigned long native_read_cr8(void)
+{
+ unsigned long cr8;
+ asm volatile("movq %%cr8,%0" : "=r" (cr8));
+ return cr8;
+}
+
+static inline void native_write_cr8(unsigned long val)
+{
+ asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
+}
+#endif
+
+static inline void native_wbinvd(void)
+{
+ asm volatile("wbinvd": : :"memory");
+}
+
+extern void native_load_gs_index(unsigned);
+
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+
+static inline unsigned long read_cr0(void)
+{
+ return native_read_cr0();
+}
+
+static inline void write_cr0(unsigned long x)
+{
+ native_write_cr0(x);
+}
+
+static inline unsigned long read_cr2(void)
+{
+ return native_read_cr2();
+}
+
+static inline void write_cr2(unsigned long x)
+{
+ native_write_cr2(x);
+}
+
+static inline unsigned long read_cr3(void)
+{
+ return native_read_cr3();
+}
+
+static inline void write_cr3(unsigned long x)
+{
+ native_write_cr3(x);
+}
+
+static inline unsigned long read_cr4(void)
+{
+ return native_read_cr4();
+}
+
+static inline unsigned long read_cr4_safe(void)
+{
+ return native_read_cr4_safe();
+}
+
+static inline void write_cr4(unsigned long x)
+{
+ native_write_cr4(x);
+}
+
+static inline void wbinvd(void)
+{
+ native_wbinvd();
+}
+
+#ifdef CONFIG_X86_64
+
+static inline unsigned long read_cr8(void)
+{
+ return native_read_cr8();
+}
+
+static inline void write_cr8(unsigned long x)
+{
+ native_write_cr8(x);
+}
+
+static inline void load_gs_index(unsigned selector)
+{
+ native_load_gs_index(selector);
+}
+
+#endif
+
+/* Clear the 'TS' bit */
+static inline void clts(void)
+{
+ native_clts();
+}
+
+#endif/* CONFIG_PARAVIRT */
+
+#define stts() write_cr0(read_cr0() | X86_CR0_TS)
+
+static inline void clflush(volatile void *__p)
+{
+ asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
+}
+
+#define nop() asm volatile ("nop")
+
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_X86_SPECIAL_INSNS_H */
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
new file mode 100644
index 0000000..4ec45b3
--- /dev/null
+++ b/arch/x86/include/asm/switch_to.h
@@ -0,0 +1,129 @@
+#ifndef _ASM_X86_SWITCH_TO_H
+#define _ASM_X86_SWITCH_TO_H
+
+struct task_struct; /* one of the stranger aspects of C forward declarations */
+struct task_struct *__switch_to(struct task_struct *prev,
+ struct task_struct *next);
+struct tss_struct;
+void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
+ struct tss_struct *tss);
+
+#ifdef CONFIG_X86_32
+
+#ifdef CONFIG_CC_STACKPROTECTOR
+#define __switch_canary \
+ "movl %P[task_canary](%[next]), %%ebx\n\t" \
+ "movl %%ebx, "__percpu_arg([stack_canary])"\n\t"
+#define __switch_canary_oparam \
+ , [stack_canary] "=m" (stack_canary.canary)
+#define __switch_canary_iparam \
+ , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
+#else /* CC_STACKPROTECTOR */
+#define __switch_canary
+#define __switch_canary_oparam
+#define __switch_canary_iparam
+#endif /* CC_STACKPROTECTOR */
+
+/*
+ * Saving eflags is important. It switches not only IOPL between tasks,
+ * it also protects other tasks from NT leaking through sysenter etc.
+ */
+#define switch_to(prev, next, last) \
+do { \
+ /* \
+ * Context-switching clobbers all registers, so we clobber \
+ * them explicitly, via unused output variables. \
+ * (EAX and EBP is not listed because EBP is saved/restored \
+ * explicitly for wchan access and EAX is the return value of \
+ * __switch_to()) \
+ */ \
+ unsigned long ebx, ecx, edx, esi, edi; \
+ \
+ asm volatile("pushfl\n\t" /* save flags */ \
+ "pushl %%ebp\n\t" /* save EBP */ \
+ "movl %%esp,%[prev_sp]\n\t" /* save ESP */ \
+ "movl %[next_sp],%%esp\n\t" /* restore ESP */ \
+ "movl $1f,%[prev_ip]\n\t" /* save EIP */ \
+ "pushl %[next_ip]\n\t" /* restore EIP */ \
+ __switch_canary \
+ "jmp __switch_to\n" /* regparm call */ \
+ "1:\t" \
+ "popl %%ebp\n\t" /* restore EBP */ \
+ "popfl\n" /* restore flags */ \
+ \
+ /* output parameters */ \
+ : [prev_sp] "=m" (prev->thread.sp), \
+ [prev_ip] "=m" (prev->thread.ip), \
+ "=a" (last), \
+ \
+ /* clobbered output registers: */ \
+ "=b" (ebx), "=c" (ecx), "=d" (edx), \
+ "=S" (esi), "=D" (edi) \
+ \
+ __switch_canary_oparam \
+ \
+ /* input parameters: */ \
+ : [next_sp] "m" (next->thread.sp), \
+ [next_ip] "m" (next->thread.ip), \
+ \
+ /* regparm parameters for __switch_to(): */ \
+ [prev] "a" (prev), \
+ [next] "d" (next) \
+ \
+ __switch_canary_iparam \
+ \
+ : /* reloaded segment registers */ \
+ "memory"); \
+} while (0)
+
+#else /* CONFIG_X86_32 */
+
+/* frame pointer must be last for get_wchan */
+#define SAVE_CONTEXT "pushf ; pushq %%rbp ; movq %%rsi,%%rbp\n\t"
+#define RESTORE_CONTEXT "movq %%rbp,%%rsi ; popq %%rbp ; popf\t"
+
+#define __EXTRA_CLOBBER \
+ , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
+ "r12", "r13", "r14", "r15"
+
+#ifdef CONFIG_CC_STACKPROTECTOR
+#define __switch_canary \
+ "movq %P[task_canary](%%rsi),%%r8\n\t" \
+ "movq %%r8,"__percpu_arg([gs_canary])"\n\t"
+#define __switch_canary_oparam \
+ , [gs_canary] "=m" (irq_stack_union.stack_canary)
+#define __switch_canary_iparam \
+ , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
+#else /* CC_STACKPROTECTOR */
+#define __switch_canary
+#define __switch_canary_oparam
+#define __switch_canary_iparam
+#endif /* CC_STACKPROTECTOR */
+
+/* Save restore flags to clear handle leaking NT */
+#define switch_to(prev, next, last) \
+ asm volatile(SAVE_CONTEXT \
+ "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
+ "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
+ "call __switch_to\n\t" \
+ "movq "__percpu_arg([current_task])",%%rsi\n\t" \
+ __switch_canary \
+ "movq %P[thread_info](%%rsi),%%r8\n\t" \
+ "movq %%rax,%%rdi\n\t" \
+ "testl %[_tif_fork],%P[ti_flags](%%r8)\n\t" \
+ "jnz ret_from_fork\n\t" \
+ RESTORE_CONTEXT \
+ : "=a" (last) \
+ __switch_canary_oparam \
+ : [next] "S" (next), [prev] "D" (prev), \
+ [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
+ [ti_flags] "i" (offsetof(struct thread_info, flags)), \
+ [_tif_fork] "i" (_TIF_FORK), \
+ [thread_info] "i" (offsetof(struct task_struct, stack)), \
+ [current_task] "m" (current_task) \
+ __switch_canary_iparam \
+ : "memory", "cc" __EXTRA_CLOBBER)
+
+#endif /* CONFIG_X86_32 */
+
+#endif /* _ASM_X86_SWITCH_TO_H */
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
deleted file mode 100644
index 2d2f01c..0000000
--- a/arch/x86/include/asm/system.h
+++ /dev/null
@@ -1,523 +0,0 @@
-#ifndef _ASM_X86_SYSTEM_H
-#define _ASM_X86_SYSTEM_H
-
-#include <asm/asm.h>
-#include <asm/segment.h>
-#include <asm/cpufeature.h>
-#include <asm/cmpxchg.h>
-#include <asm/nops.h>
-
-#include <linux/kernel.h>
-#include <linux/irqflags.h>
-
-/* entries in ARCH_DLINFO: */
-#if defined(CONFIG_IA32_EMULATION) || !defined(CONFIG_X86_64)
-# define AT_VECTOR_SIZE_ARCH 2
-#else /* else it's non-compat x86-64 */
-# define AT_VECTOR_SIZE_ARCH 1
-#endif
-
-struct task_struct; /* one of the stranger aspects of C forward declarations */
-struct task_struct *__switch_to(struct task_struct *prev,
- struct task_struct *next);
-struct tss_struct;
-void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
- struct tss_struct *tss);
-extern void show_regs_common(void);
-
-#ifdef CONFIG_X86_32
-
-#ifdef CONFIG_CC_STACKPROTECTOR
-#define __switch_canary \
- "movl %P[task_canary](%[next]), %%ebx\n\t" \
- "movl %%ebx, "__percpu_arg([stack_canary])"\n\t"
-#define __switch_canary_oparam \
- , [stack_canary] "=m" (stack_canary.canary)
-#define __switch_canary_iparam \
- , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
-#else /* CC_STACKPROTECTOR */
-#define __switch_canary
-#define __switch_canary_oparam
-#define __switch_canary_iparam
-#endif /* CC_STACKPROTECTOR */
-
-/*
- * Saving eflags is important. It switches not only IOPL between tasks,
- * it also protects other tasks from NT leaking through sysenter etc.
- */
-#define switch_to(prev, next, last) \
-do { \
- /* \
- * Context-switching clobbers all registers, so we clobber \
- * them explicitly, via unused output variables. \
- * (EAX and EBP is not listed because EBP is saved/restored \
- * explicitly for wchan access and EAX is the return value of \
- * __switch_to()) \
- */ \
- unsigned long ebx, ecx, edx, esi, edi; \
- \
- asm volatile("pushfl\n\t" /* save flags */ \
- "pushl %%ebp\n\t" /* save EBP */ \
- "movl %%esp,%[prev_sp]\n\t" /* save ESP */ \
- "movl %[next_sp],%%esp\n\t" /* restore ESP */ \
- "movl $1f,%[prev_ip]\n\t" /* save EIP */ \
- "pushl %[next_ip]\n\t" /* restore EIP */ \
- __switch_canary \
- "jmp __switch_to\n" /* regparm call */ \
- "1:\t" \
- "popl %%ebp\n\t" /* restore EBP */ \
- "popfl\n" /* restore flags */ \
- \
- /* output parameters */ \
- : [prev_sp] "=m" (prev->thread.sp), \
- [prev_ip] "=m" (prev->thread.ip), \
- "=a" (last), \
- \
- /* clobbered output registers: */ \
- "=b" (ebx), "=c" (ecx), "=d" (edx), \
- "=S" (esi), "=D" (edi) \
- \
- __switch_canary_oparam \
- \
- /* input parameters: */ \
- : [next_sp] "m" (next->thread.sp), \
- [next_ip] "m" (next->thread.ip), \
- \
- /* regparm parameters for __switch_to(): */ \
- [prev] "a" (prev), \
- [next] "d" (next) \
- \
- __switch_canary_iparam \
- \
- : /* reloaded segment registers */ \
- "memory"); \
-} while (0)
-
-/*
- * disable hlt during certain critical i/o operations
- */
-#define HAVE_DISABLE_HLT
-#else
-
-/* frame pointer must be last for get_wchan */
-#define SAVE_CONTEXT "pushf ; pushq %%rbp ; movq %%rsi,%%rbp\n\t"
-#define RESTORE_CONTEXT "movq %%rbp,%%rsi ; popq %%rbp ; popf\t"
-
-#define __EXTRA_CLOBBER \
- , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
- "r12", "r13", "r14", "r15"
-
-#ifdef CONFIG_CC_STACKPROTECTOR
-#define __switch_canary \
- "movq %P[task_canary](%%rsi),%%r8\n\t" \
- "movq %%r8,"__percpu_arg([gs_canary])"\n\t"
-#define __switch_canary_oparam \
- , [gs_canary] "=m" (irq_stack_union.stack_canary)
-#define __switch_canary_iparam \
- , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
-#else /* CC_STACKPROTECTOR */
-#define __switch_canary
-#define __switch_canary_oparam
-#define __switch_canary_iparam
-#endif /* CC_STACKPROTECTOR */
-
-/* Save restore flags to clear handle leaking NT */
-#define switch_to(prev, next, last) \
- asm volatile(SAVE_CONTEXT \
- "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
- "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
- "call __switch_to\n\t" \
- "movq "__percpu_arg([current_task])",%%rsi\n\t" \
- __switch_canary \
- "movq %P[thread_info](%%rsi),%%r8\n\t" \
- "movq %%rax,%%rdi\n\t" \
- "testl %[_tif_fork],%P[ti_flags](%%r8)\n\t" \
- "jnz ret_from_fork\n\t" \
- RESTORE_CONTEXT \
- : "=a" (last) \
- __switch_canary_oparam \
- : [next] "S" (next), [prev] "D" (prev), \
- [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
- [ti_flags] "i" (offsetof(struct thread_info, flags)), \
- [_tif_fork] "i" (_TIF_FORK), \
- [thread_info] "i" (offsetof(struct task_struct, stack)), \
- [current_task] "m" (current_task) \
- __switch_canary_iparam \
- : "memory", "cc" __EXTRA_CLOBBER)
-#endif
-
-#ifdef __KERNEL__
-
-extern void native_load_gs_index(unsigned);
-
-/*
- * Load a segment. Fall back on loading the zero
- * segment if something goes wrong..
- */
-#define loadsegment(seg, value) \
-do { \
- unsigned short __val = (value); \
- \
- asm volatile(" \n" \
- "1: movl %k0,%%" #seg " \n" \
- \
- ".section .fixup,\"ax\" \n" \
- "2: xorl %k0,%k0 \n" \
- " jmp 1b \n" \
- ".previous \n" \
- \
- _ASM_EXTABLE(1b, 2b) \
- \
- : "+r" (__val) : : "memory"); \
-} while (0)
-
-/*
- * Save a segment register away
- */
-#define savesegment(seg, value) \
- asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
-
-/*
- * x86_32 user gs accessors.
- */
-#ifdef CONFIG_X86_32
-#ifdef CONFIG_X86_32_LAZY_GS
-#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
-#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
-#define task_user_gs(tsk) ((tsk)->thread.gs)
-#define lazy_save_gs(v) savesegment(gs, (v))
-#define lazy_load_gs(v) loadsegment(gs, (v))
-#else /* X86_32_LAZY_GS */
-#define get_user_gs(regs) (u16)((regs)->gs)
-#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
-#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
-#define lazy_save_gs(v) do { } while (0)
-#define lazy_load_gs(v) do { } while (0)
-#endif /* X86_32_LAZY_GS */
-#endif /* X86_32 */
-
-static inline unsigned long get_limit(unsigned long segment)
-{
- unsigned long __limit;
- asm("lsll %1,%0" : "=r" (__limit) : "r" (segment));
- return __limit + 1;
-}
-
-static inline void native_clts(void)
-{
- asm volatile("clts");
-}
-
-/*
- * Volatile isn't enough to prevent the compiler from reordering the
- * read/write functions for the control registers and messing everything up.
- * A memory clobber would solve the problem, but would prevent reordering of
- * all loads stores around it, which can hurt performance. Solution is to
- * use a variable and mimic reads and writes to it to enforce serialization
- */
-static unsigned long __force_order;
-
-static inline unsigned long native_read_cr0(void)
-{
- unsigned long val;
- asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order));
- return val;
-}
-
-static inline void native_write_cr0(unsigned long val)
-{
- asm volatile("mov %0,%%cr0": : "r" (val), "m" (__force_order));
-}
-
-static inline unsigned long native_read_cr2(void)
-{
- unsigned long val;
- asm volatile("mov %%cr2,%0\n\t" : "=r" (val), "=m" (__force_order));
- return val;
-}
-
-static inline void native_write_cr2(unsigned long val)
-{
- asm volatile("mov %0,%%cr2": : "r" (val), "m" (__force_order));
-}
-
-static inline unsigned long native_read_cr3(void)
-{
- unsigned long val;
- asm volatile("mov %%cr3,%0\n\t" : "=r" (val), "=m" (__force_order));
- return val;
-}
-
-static inline void native_write_cr3(unsigned long val)
-{
- asm volatile("mov %0,%%cr3": : "r" (val), "m" (__force_order));
-}
-
-static inline unsigned long native_read_cr4(void)
-{
- unsigned long val;
- asm volatile("mov %%cr4,%0\n\t" : "=r" (val), "=m" (__force_order));
- return val;
-}
-
-static inline unsigned long native_read_cr4_safe(void)
-{
- unsigned long val;
- /* This could fault if %cr4 does not exist. In x86_64, a cr4 always
- * exists, so it will never fail. */
-#ifdef CONFIG_X86_32
- asm volatile("1: mov %%cr4, %0\n"
- "2:\n"
- _ASM_EXTABLE(1b, 2b)
- : "=r" (val), "=m" (__force_order) : "0" (0));
-#else
- val = native_read_cr4();
-#endif
- return val;
-}
-
-static inline void native_write_cr4(unsigned long val)
-{
- asm volatile("mov %0,%%cr4": : "r" (val), "m" (__force_order));
-}
-
-#ifdef CONFIG_X86_64
-static inline unsigned long native_read_cr8(void)
-{
- unsigned long cr8;
- asm volatile("movq %%cr8,%0" : "=r" (cr8));
- return cr8;
-}
-
-static inline void native_write_cr8(unsigned long val)
-{
- asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
-}
-#endif
-
-static inline void native_wbinvd(void)
-{
- asm volatile("wbinvd": : :"memory");
-}
-
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else
-
-static inline unsigned long read_cr0(void)
-{
- return native_read_cr0();
-}
-
-static inline void write_cr0(unsigned long x)
-{
- native_write_cr0(x);
-}
-
-static inline unsigned long read_cr2(void)
-{
- return native_read_cr2();
-}
-
-static inline void write_cr2(unsigned long x)
-{
- native_write_cr2(x);
-}
-
-static inline unsigned long read_cr3(void)
-{
- return native_read_cr3();
-}
-
-static inline void write_cr3(unsigned long x)
-{
- native_write_cr3(x);
-}
-
-static inline unsigned long read_cr4(void)
-{
- return native_read_cr4();
-}
-
-static inline unsigned long read_cr4_safe(void)
-{
- return native_read_cr4_safe();
-}
-
-static inline void write_cr4(unsigned long x)
-{
- native_write_cr4(x);
-}
-
-static inline void wbinvd(void)
-{
- native_wbinvd();
-}
-
-#ifdef CONFIG_X86_64
-
-static inline unsigned long read_cr8(void)
-{
- return native_read_cr8();
-}
-
-static inline void write_cr8(unsigned long x)
-{
- native_write_cr8(x);
-}
-
-static inline void load_gs_index(unsigned selector)
-{
- native_load_gs_index(selector);
-}
-
-#endif
-
-/* Clear the 'TS' bit */
-static inline void clts(void)
-{
- native_clts();
-}
-
-#endif/* CONFIG_PARAVIRT */
-
-#define stts() write_cr0(read_cr0() | X86_CR0_TS)
-
-#endif /* __KERNEL__ */
-
-static inline void clflush(volatile void *__p)
-{
- asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
-}
-
-#define nop() asm volatile ("nop")
-
-void disable_hlt(void);
-void enable_hlt(void);
-
-void cpu_idle_wait(void);
-
-extern unsigned long arch_align_stack(unsigned long sp);
-extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
-
-void default_idle(void);
-bool set_pm_idle_to_default(void);
-
-void stop_this_cpu(void *dummy);
-
-/*
- * Force strict CPU ordering.
- * And yes, this is required on UP too when we're talking
- * to devices.
- */
-#ifdef CONFIG_X86_32
-/*
- * Some non-Intel clones support out of order store. wmb() ceases to be a
- * nop for these.
- */
-#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
-#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
-#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
-#else
-#define mb() asm volatile("mfence":::"memory")
-#define rmb() asm volatile("lfence":::"memory")
-#define wmb() asm volatile("sfence" ::: "memory")
-#endif
-
-/**
- * read_barrier_depends - Flush all pending reads that subsequents reads
- * depend on.
- *
- * No data-dependent reads from memory-like regions are ever reordered
- * over this barrier. All reads preceding this primitive are guaranteed
- * to access memory (but not necessarily other CPUs' caches) before any
- * reads following this primitive that depend on the data return by
- * any of the preceding reads. This primitive is much lighter weight than
- * rmb() on most CPUs, and is never heavier weight than is
- * rmb().
- *
- * These ordering constraints are respected by both the local CPU
- * and the compiler.
- *
- * Ordering is not guaranteed by anything other than these primitives,
- * not even by data dependencies. See the documentation for
- * memory_barrier() for examples and URLs to more information.
- *
- * For example, the following code would force ordering (the initial
- * value of "a" is zero, "b" is one, and "p" is "&a"):
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * b = 2;
- * memory_barrier();
- * p = &b; q = p;
- * read_barrier_depends();
- * d = *q;
- * </programlisting>
- *
- * because the read of "*q" depends on the read of "p" and these
- * two reads are separated by a read_barrier_depends(). However,
- * the following code, with the same initial values for "a" and "b":
- *
- * <programlisting>
- * CPU 0 CPU 1
- *
- * a = 2;
- * memory_barrier();
- * b = 3; y = b;
- * read_barrier_depends();
- * x = a;
- * </programlisting>
- *
- * does not enforce ordering, since there is no data dependency between
- * the read of "a" and the read of "b". Therefore, on some CPUs, such
- * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
- * in cases like this where there are no data dependencies.
- **/
-
-#define read_barrier_depends() do { } while (0)
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#ifdef CONFIG_X86_PPRO_FENCE
-# define smp_rmb() rmb()
-#else
-# define smp_rmb() barrier()
-#endif
-#ifdef CONFIG_X86_OOSTORE
-# define smp_wmb() wmb()
-#else
-# define smp_wmb() barrier()
-#endif
-#define smp_read_barrier_depends() read_barrier_depends()
-#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while (0)
-#define set_mb(var, value) do { var = value; barrier(); } while (0)
-#endif
-
-/*
- * Stop RDTSC speculation. This is needed when you need to use RDTSC
- * (or get_cycles or vread that possibly accesses the TSC) in a defined
- * code region.
- *
- * (Could use an alternative three way for this if there was one.)
- */
-static __always_inline void rdtsc_barrier(void)
-{
- alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
- alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
-}
-
-/*
- * We handle most unaligned accesses in hardware. On the other hand
- * unaligned DMA can be quite expensive on some Nehalem processors.
- *
- * Based on this we disable the IP header alignment in network drivers.
- */
-#define NET_IP_ALIGN 0
-#endif /* _ASM_X86_SYSTEM_H */
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 02a4c04..c0e108e 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -5,6 +5,7 @@
#include <linux/sched.h>

#include <asm/processor.h>
+#include <asm/special_insns.h>

#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index f50e7fb..d2b7f27 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -14,6 +14,7 @@
#include <acpi/processor.h>
#include <asm/acpi.h>
#include <asm/mwait.h>
+#include <asm/special_insns.h>

/*
* Initialize bm_flags based on the CPU cache properties
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index d90272e..4ae36d9 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -37,6 +37,7 @@
#include <asm/apic.h>
#include <asm/tlbflush.h>
#include <asm/timer.h>
+#include <asm/special_insns.h>

/* nop stub */
void _paravirt_nop(void)
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 82ad568..c8a5244 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -57,6 +57,7 @@
#include <asm/syscalls.h>
#include <asm/debugreg.h>
#include <asm/nmi.h>
+#include <asm/switch_to.h>

asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");

diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index ea5d771..2466f98 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -51,6 +51,7 @@
#include <asm/syscalls.h>
#include <asm/debugreg.h>
#include <asm/nmi.h>
+#include <asm/switch_to.h>

asmlinkage extern void ret_from_fork(void);

diff --git a/arch/x86/kernel/tce_64.c b/arch/x86/kernel/tce_64.c
index 9e540fe..ab40954 100644
--- a/arch/x86/kernel/tce_64.c
+++ b/arch/x86/kernel/tce_64.c
@@ -34,6 +34,7 @@
#include <asm/tce.h>
#include <asm/calgary.h>
#include <asm/proto.h>
+#include <asm/cacheflush.h>

/* flush a tce at 'tceaddr' to main memory */
static inline void flush_tce(void* tceaddr)

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 15/29] Disintegrate asm/system.h for M68K
March 07, 2012 09:08PM
Disintegrate asm/system.h for M68K.

Signed-off-by: David Howells <[email protected]>
---

arch/m68k/include/asm/atomic.h | 124 ++++++++++++++++++++++++
arch/m68k/include/asm/barrier.h | 20 ++++
arch/m68k/include/asm/exec.h | 6 +
arch/m68k/include/asm/switch_to.h | 41 ++++++++
arch/m68k/include/asm/system.h | 193 -------------------------------------
5 files changed, 191 insertions(+), 193 deletions(-)
create mode 100644 arch/m68k/include/asm/barrier.h
create mode 100644 arch/m68k/include/asm/exec.h
create mode 100644 arch/m68k/include/asm/switch_to.h
delete mode 100644 arch/m68k/include/asm/system.h

diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index bf7c809..e8113e0 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -2,6 +2,7 @@
#define __ARCH_M68K_ATOMIC__

#include <linux/types.h>
+#include <linux/irqflags.h>

/*
* Atomic operations that C can't guarantee us. Useful for
@@ -17,6 +18,129 @@
#define atomic_read(v) (*(volatile int *)&(v)->counter)
#define atomic_set(v, i) (((v)->counter) = i)

+struct __xchg_dummy { unsigned long a[100]; };
+#define __xg(x) ((volatile struct __xchg_dummy *)(x))
+
+#ifndef CONFIG_RMW_INSNS
+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+{
+ unsigned long flags, tmp;
+
+ local_irq_save(flags);
+
+ switch (size) {
+ case 1:
+ tmp = *(u8 *)ptr;
+ *(u8 *)ptr = x;
+ x = tmp;
+ break;
+ case 2:
+ tmp = *(u16 *)ptr;
+ *(u16 *)ptr = x;
+ x = tmp;
+ break;
+ case 4:
+ tmp = *(u32 *)ptr;
+ *(u32 *)ptr = x;
+ x = tmp;
+ break;
+ default:
+ BUG();
+ }
+
+ local_irq_restore(flags);
+ return x;
+}
+#else
+static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+{
+ switch (size) {
+ case 1:
+ __asm__ __volatile__
+ ("moveb %2,%0\n\t"
+ "1:\n\t"
+ "casb %0,%1,%2\n\t"
+ "jne 1b"
+ : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ case 2:
+ __asm__ __volatile__
+ ("movew %2,%0\n\t"
+ "1:\n\t"
+ "casw %0,%1,%2\n\t"
+ "jne 1b"
+ : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ case 4:
+ __asm__ __volatile__
+ ("movel %2,%0\n\t"
+ "1:\n\t"
+ "casl %0,%1,%2\n\t"
+ "jne 1b"
+ : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ }
+ return x;
+}
+#endif
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+/*
+ * Atomic compare and exchange. Compare OLD with MEM, if identical,
+ * store NEW in MEM. Return the initial value in MEM. Success is
+ * indicated by comparing RETURN with OLD.
+ */
+#ifdef CONFIG_RMW_INSNS
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 1:
+ __asm__ __volatile__ ("casb %0,%2,%1"
+ : "=d" (old), "=m" (*(char *)p)
+ : "d" (new), "0" (old), "m" (*(char *)p));
+ break;
+ case 2:
+ __asm__ __volatile__ ("casw %0,%2,%1"
+ : "=d" (old), "=m" (*(short *)p)
+ : "d" (new), "0" (old), "m" (*(short *)p));
+ break;
+ case 4:
+ __asm__ __volatile__ ("casl %0,%2,%1"
+ : "=d" (old), "=m" (*(int *)p)
+ : "d" (new), "0" (old), "m" (*(int *)p));
+ break;
+ }
+ return old;
+}
+
+#define cmpxchg(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+#else
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg.h>
+
+#endif
+
/*
* The ColdFire parts cannot do some immediate to memory operations,
* so for them we do not specify the "i" asm constraint.
diff --git a/arch/m68k/include/asm/barrier.h b/arch/m68k/include/asm/barrier.h
new file mode 100644
index 0000000..445ce22
--- /dev/null
+++ b/arch/m68k/include/asm/barrier.h
@@ -0,0 +1,20 @@
+#ifndef _M68K_BARRIER_H
+#define _M68K_BARRIER_H
+
+/*
+ * Force strict CPU ordering.
+ * Not really required on m68k...
+ */
+#define nop() do { asm volatile ("nop"); barrier(); } while (0)
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define read_barrier_depends() ((void)0)
+#define set_mb(var, value) ({ (var) = (value); wmb(); })
+
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() ((void)0)
+
+#endif /* _M68K_BARRIER_H */
diff --git a/arch/m68k/include/asm/exec.h b/arch/m68k/include/asm/exec.h
new file mode 100644
index 0000000..0499adf
--- /dev/null
+++ b/arch/m68k/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef _M68K_EXEC_H
+#define _M68K_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* _M68K_EXEC_H */
diff --git a/arch/m68k/include/asm/switch_to.h b/arch/m68k/include/asm/switch_to.h
new file mode 100644
index 0000000..16fd6b6
--- /dev/null
+++ b/arch/m68k/include/asm/switch_to.h
@@ -0,0 +1,41 @@
+#ifndef _M68K_SWITCH_TO_H
+#define _M68K_SWITCH_TO_H
+
+/*
+ * switch_to(n) should switch tasks to task ptr, first checking that
+ * ptr isn't the current task, in which case it does nothing. This
+ * also clears the TS-flag if the task we switched to has used the
+ * math co-processor latest.
+ */
+/*
+ * switch_to() saves the extra registers, that are not saved
+ * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
+ * a0-a1. Some of these are used by schedule() and its predecessors
+ * and so we might get see unexpected behaviors when a task returns
+ * with unexpected register values.
+ *
+ * syscall stores these registers itself and none of them are used
+ * by syscall after the function in the syscall has been called.
+ *
+ * Beware that resume now expects *next to be in d1 and the offset of
+ * tss to be in a1. This saves a few instructions as we no longer have
+ * to push them onto the stack and read them back right after.
+ *
+ * 02/17/96 - Jes Sorensen ([email protected])
+ *
+ * Changed 96/09/19 by Andreas Schwab
+ * pass prev in a0, next in a1
+ */
+asmlinkage void resume(void);
+#define switch_to(prev,next,last) do { \
+ register void *_prev __asm__ ("a0") = (prev); \
+ register void *_next __asm__ ("a1") = (next); \
+ register void *_last __asm__ ("d1"); \
+ __asm__ __volatile__("jbsr resume" \
+ : "=a" (_prev), "=a" (_next), "=d" (_last) \
+ : "0" (_prev), "1" (_next) \
+ : "d0", "d2", "d3", "d4", "d5"); \
+ (last) = _last; \
+} while (0)
+
+#endif /* _M68K_SWITCH_TO_H */
diff --git a/arch/m68k/include/asm/system.h b/arch/m68k/include/asm/system.h
deleted file mode 100644
index 47b01f4..0000000
--- a/arch/m68k/include/asm/system.h
+++ /dev/null
@@ -1,193 +0,0 @@
-#ifndef _M68K_SYSTEM_H
-#define _M68K_SYSTEM_H
-
-#include <linux/linkage.h>
-#include <linux/kernel.h>
-#include <linux/irqflags.h>
-#include <asm/segment.h>
-#include <asm/entry.h>
-
-#ifdef __KERNEL__
-
-/*
- * switch_to(n) should switch tasks to task ptr, first checking that
- * ptr isn't the current task, in which case it does nothing. This
- * also clears the TS-flag if the task we switched to has used the
- * math co-processor latest.
- */
-/*
- * switch_to() saves the extra registers, that are not saved
- * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
- * a0-a1. Some of these are used by schedule() and its predecessors
- * and so we might get see unexpected behaviors when a task returns
- * with unexpected register values.
- *
- * syscall stores these registers itself and none of them are used
- * by syscall after the function in the syscall has been called.
- *
- * Beware that resume now expects *next to be in d1 and the offset of
- * tss to be in a1. This saves a few instructions as we no longer have
- * to push them onto the stack and read them back right after.
- *
- * 02/17/96 - Jes Sorensen ([email protected])
- *
- * Changed 96/09/19 by Andreas Schwab
- * pass prev in a0, next in a1
- */
-asmlinkage void resume(void);
-#define switch_to(prev,next,last) do { \
- register void *_prev __asm__ ("a0") = (prev); \
- register void *_next __asm__ ("a1") = (next); \
- register void *_last __asm__ ("d1"); \
- __asm__ __volatile__("jbsr resume" \
- : "=a" (_prev), "=a" (_next), "=d" (_last) \
- : "0" (_prev), "1" (_next) \
- : "d0", "d2", "d3", "d4", "d5"); \
- (last) = _last; \
-} while (0)
-
-
-/*
- * Force strict CPU ordering.
- * Not really required on m68k...
- */
-#define nop() do { asm volatile ("nop"); barrier(); } while (0)
-#define mb() barrier()
-#define rmb() barrier()
-#define wmb() barrier()
-#define read_barrier_depends() ((void)0)
-#define set_mb(var, value) ({ (var) = (value); wmb(); })
-
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() ((void)0)
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-struct __xchg_dummy { unsigned long a[100]; };
-#define __xg(x) ((volatile struct __xchg_dummy *)(x))
-
-#ifndef CONFIG_RMW_INSNS
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-{
- unsigned long flags, tmp;
-
- local_irq_save(flags);
-
- switch (size) {
- case 1:
- tmp = *(u8 *)ptr;
- *(u8 *)ptr = x;
- x = tmp;
- break;
- case 2:
- tmp = *(u16 *)ptr;
- *(u16 *)ptr = x;
- x = tmp;
- break;
- case 4:
- tmp = *(u32 *)ptr;
- *(u32 *)ptr = x;
- x = tmp;
- break;
- default:
- BUG();
- }
-
- local_irq_restore(flags);
- return x;
-}
-#else
-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
-{
- switch (size) {
- case 1:
- __asm__ __volatile__
- ("moveb %2,%0\n\t"
- "1:\n\t"
- "casb %0,%1,%2\n\t"
- "jne 1b"
- : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
- break;
- case 2:
- __asm__ __volatile__
- ("movew %2,%0\n\t"
- "1:\n\t"
- "casw %0,%1,%2\n\t"
- "jne 1b"
- : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
- break;
- case 4:
- __asm__ __volatile__
- ("movel %2,%0\n\t"
- "1:\n\t"
- "casl %0,%1,%2\n\t"
- "jne 1b"
- : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
- break;
- }
- return x;
-}
-#endif
-
-#include <asm-generic/cmpxchg-local.h>
-
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-/*
- * Atomic compare and exchange. Compare OLD with MEM, if identical,
- * store NEW in MEM. Return the initial value in MEM. Success is
- * indicated by comparing RETURN with OLD.
- */
-#ifdef CONFIG_RMW_INSNS
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 1:
- __asm__ __volatile__ ("casb %0,%2,%1"
- : "=d" (old), "=m" (*(char *)p)
- : "d" (new), "0" (old), "m" (*(char *)p));
- break;
- case 2:
- __asm__ __volatile__ ("casw %0,%2,%1"
- : "=d" (old), "=m" (*(short *)p)
- : "d" (new), "0" (old), "m" (*(short *)p));
- break;
- case 4:
- __asm__ __volatile__ ("casl %0,%2,%1"
- : "=d" (old), "=m" (*(int *)p)
- : "d" (new), "0" (old), "m" (*(int *)p));
- break;
- }
- return old;
-}
-
-#define cmpxchg(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#else
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-
-#include <asm-generic/cmpxchg.h>
-
-#endif
-
-#define arch_align_stack(x) (x)
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_SYSTEM_H */

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 07/29] Disintegrate asm/system.h for Blackfin
March 07, 2012 09:09PM
Disintegrate asm/system.h for Blackfin.

Signed-off-by: David Howells <[email protected]>
---

arch/blackfin/include/asm/atomic.h | 122 ++++++++++++++++++
arch/blackfin/include/asm/barrier.h | 46 +++++++
arch/blackfin/include/asm/exec.h | 1
arch/blackfin/include/asm/irq_handler.h | 1
arch/blackfin/include/asm/special_insns.h | 13 ++
arch/blackfin/include/asm/switch_to.h | 39 ++++++
arch/blackfin/include/asm/system.h | 192 -----------------------------
arch/blackfin/kernel/asm-offsets.c | 1
arch/blackfin/kernel/process.c | 1
arch/blackfin/kernel/setup.c | 1
arch/blackfin/kernel/trace.c | 1
arch/blackfin/kernel/traps.c | 1
12 files changed, 227 insertions(+), 192 deletions(-)
create mode 100644 arch/blackfin/include/asm/barrier.h
create mode 100644 arch/blackfin/include/asm/exec.h
create mode 100644 arch/blackfin/include/asm/special_insns.h
create mode 100644 arch/blackfin/include/asm/switch_to.h
delete mode 100644 arch/blackfin/include/asm/system.h

diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index 54c6e28..dd59a02 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -11,6 +11,128 @@

#include <linux/linkage.h>

+asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
+asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
+asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
+asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
+ unsigned long new, unsigned long old);
+asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
+ unsigned long new, unsigned long old);
+asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
+ unsigned long new, unsigned long old);
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
+ int size)
+{
+ unsigned long tmp;
+
+ switch (size) {
+ case 1:
+ tmp = __raw_xchg_1_asm(ptr, x);
+ break;
+ case 2:
+ tmp = __raw_xchg_2_asm(ptr, x);
+ break;
+ case 4:
+ tmp = __raw_xchg_4_asm(ptr, x);
+ break;
+ }
+
+ return tmp;
+}
+
+/*
+ * Atomic compare and exchange. Compare OLD with MEM, if identical,
+ * store NEW in MEM. Return the initial value in MEM. Success is
+ * indicated by comparing RETURN with OLD.
+ */
+static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
+ unsigned long new, int size)
+{
+ unsigned long tmp;
+
+ switch (size) {
+ case 1:
+ tmp = __raw_cmpxchg_1_asm(ptr, new, old);
+ break;
+ case 2:
+ tmp = __raw_cmpxchg_2_asm(ptr, new, old);
+ break;
+ case 4:
+ tmp = __raw_cmpxchg_4_asm(ptr, new, old);
+ break;
+ }
+
+ return tmp;
+}
+#define cmpxchg(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
+ (unsigned long)(n), sizeof(*(ptr))))
+
+#else /* !CONFIG_SMP */
+
+struct __xchg_dummy {
+ unsigned long a[100];
+};
+#define __xg(x) ((volatile struct __xchg_dummy *)(x))
+
+#include <mach/blackfin.h>
+#include <asm/irqflags.h>
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
+ int size)
+{
+ unsigned long tmp = 0;
+ unsigned long flags;
+
+ flags = hard_local_irq_save();
+
+ switch (size) {
+ case 1:
+ __asm__ __volatile__
+ ("%0 = b%2 (z);\n\t"
+ "b%2 = %1;\n\t"
+ : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ case 2:
+ __asm__ __volatile__
+ ("%0 = w%2 (z);\n\t"
+ "w%2 = %1;\n\t"
+ : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ case 4:
+ __asm__ __volatile__
+ ("%0 = %2;\n\t"
+ "%2 = %1;\n\t"
+ : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ break;
+ }
+ hard_local_irq_restore(flags);
+ return tmp;
+}
+
+#include <asm-generic/cmpxchg-local.h>
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n) \
+ ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+ (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#include <asm-generic/cmpxchg.h>
+
+#endif /* !CONFIG_SMP */
+
+#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
+#define tas(ptr) ((void)xchg((ptr), 1))
+
+#ifdef CONFIG_SMP
+
+#include <linux/linkage.h>
+
asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
asmlinkage int __raw_atomic_update_asm(volatile int *ptr, int value);
asmlinkage int __raw_atomic_clear_asm(volatile int *ptr, int value);
diff --git a/arch/blackfin/include/asm/barrier.h b/arch/blackfin/include/asm/barrier.h
new file mode 100644
index 0000000..88340c4
--- /dev/null
+++ b/arch/blackfin/include/asm/barrier.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Tony Kou ([email protected])
+ *
+ * Licensed under the GPL-2 or later
+ */
+
+#ifndef _BLACKFIN_BARRIER_H
+#define _BLACKFIN_BARRIER_H
+
+#include <asm/cache.h>
+
+/*
+ * Force strict CPU ordering.
+ */
+#ifdef CONFIG_SMP
+
+#ifdef __ARCH_SYNC_CORE_DCACHE
+/* Force Core data cache coherence */
+# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
+# define rmb() do { barrier(); smp_check_barrier(); } while (0)
+# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
+# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
+#else
+# define mb() barrier()
+# define rmb() barrier()
+# define wmb() barrier()
+# define read_barrier_depends() do { } while (0)
+#endif
+
+#else /* !CONFIG_SMP */
+
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define read_barrier_depends() do { } while (0)
+
+#endif /* !CONFIG_SMP */
+
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#define smp_read_barrier_depends() read_barrier_depends()
+
+#endif /* _BLACKFIN_BARRIER_H */
diff --git a/arch/blackfin/include/asm/exec.h b/arch/blackfin/include/asm/exec.h
new file mode 100644
index 0000000..54c2e1d
--- /dev/null
+++ b/arch/blackfin/include/asm/exec.h
@@ -0,0 +1 @@
+/* define arch_align_stack() here */
diff --git a/arch/blackfin/include/asm/irq_handler.h b/arch/blackfin/include/asm/irq_handler.h
index ee73f79..4fbf835 100644
--- a/arch/blackfin/include/asm/irq_handler.h
+++ b/arch/blackfin/include/asm/irq_handler.h
@@ -9,6 +9,7 @@

#include <linux/types.h>
#include <linux/linkage.h>
+#include <mach/irq.h>

/* init functions only */
extern int __init init_arch_irq(void);
diff --git a/arch/blackfin/include/asm/special_insns.h b/arch/blackfin/include/asm/special_insns.h
new file mode 100644
index 0000000..5a56bba
--- /dev/null
+++ b/arch/blackfin/include/asm/special_insns.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Tony Kou ([email protected])
+ *
+ * Licensed under the GPL-2 or later
+ */
+
+#ifndef _BLACKFIN_SPECIAL_INSNS_H
+#define _BLACKFIN_SPECIAL_INSNS_H
+
+#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
+
+#endif /* _BLACKFIN_SPECIAL_INSNS_H */
diff --git a/arch/blackfin/include/asm/switch_to.h b/arch/blackfin/include/asm/switch_to.h
new file mode 100644
index 0000000..aaf671b
--- /dev/null
+++ b/arch/blackfin/include/asm/switch_to.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Tony Kou ([email protected])
+ *
+ * Licensed under the GPL-2 or later
+ */
+
+#ifndef _BLACKFIN_SWITCH_TO_H
+#define _BLACKFIN_SWITCH_TO_H
+
+#define prepare_to_switch() do { } while(0)
+
+/*
+ * switch_to(n) should switch tasks to task ptr, first checking that
+ * ptr isn't the current task, in which case it does nothing.
+ */
+
+#include <asm/l1layout.h>
+#include <asm/mem_map.h>
+
+asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
+
+#ifndef CONFIG_SMP
+#define switch_to(prev,next,last) \
+do { \
+ memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
+ sizeof *L1_SCRATCH_TASK_INFO); \
+ memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
+ sizeof *L1_SCRATCH_TASK_INFO); \
+ (last) = resume (prev, next); \
+} while (0)
+#else
+#define switch_to(prev, next, last) \
+do { \
+ (last) = resume(prev, next); \
+} while (0)
+#endif
+
+#endif /* _BLACKFIN_SWITCH_TO_H */
diff --git a/arch/blackfin/include/asm/system.h b/arch/blackfin/include/asm/system.h
deleted file mode 100644
index 44bd0cc..0000000
--- a/arch/blackfin/include/asm/system.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright 2004-2009 Analog Devices Inc.
- * Tony Kou ([email protected])
- *
- * Licensed under the GPL-2 or later
- */
-
-#ifndef _BLACKFIN_SYSTEM_H
-#define _BLACKFIN_SYSTEM_H
-
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-#include <mach/anomaly.h>
-#include <asm/cache.h>
-#include <asm/pda.h>
-#include <asm/irq.h>
-
-/*
- * Force strict CPU ordering.
- */
-#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-#define smp_read_barrier_depends() read_barrier_depends()
-
-#ifdef CONFIG_SMP
-asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
-asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
-asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
-asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
- unsigned long new, unsigned long old);
-asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
- unsigned long new, unsigned long old);
-asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
- unsigned long new, unsigned long old);
-
-#ifdef __ARCH_SYNC_CORE_DCACHE
-/* Force Core data cache coherence */
-# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
-# define rmb() do { barrier(); smp_check_barrier(); } while (0)
-# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
-# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
-#else
-# define mb() barrier()
-# define rmb() barrier()
-# define wmb() barrier()
-# define read_barrier_depends() do { } while (0)
-#endif
-
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
- int size)
-{
- unsigned long tmp;
-
- switch (size) {
- case 1:
- tmp = __raw_xchg_1_asm(ptr, x);
- break;
- case 2:
- tmp = __raw_xchg_2_asm(ptr, x);
- break;
- case 4:
- tmp = __raw_xchg_4_asm(ptr, x);
- break;
- }
-
- return tmp;
-}
-
-/*
- * Atomic compare and exchange. Compare OLD with MEM, if identical,
- * store NEW in MEM. Return the initial value in MEM. Success is
- * indicated by comparing RETURN with OLD.
- */
-static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
- unsigned long new, int size)
-{
- unsigned long tmp;
-
- switch (size) {
- case 1:
- tmp = __raw_cmpxchg_1_asm(ptr, new, old);
- break;
- case 2:
- tmp = __raw_cmpxchg_2_asm(ptr, new, old);
- break;
- case 4:
- tmp = __raw_cmpxchg_4_asm(ptr, new, old);
- break;
- }
-
- return tmp;
-}
-#define cmpxchg(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-
-#else /* !CONFIG_SMP */
-
-#define mb() barrier()
-#define rmb() barrier()
-#define wmb() barrier()
-#define read_barrier_depends() do { } while (0)
-
-struct __xchg_dummy {
- unsigned long a[100];
-};
-#define __xg(x) ((volatile struct __xchg_dummy *)(x))
-
-#include <mach/blackfin.h>
-
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
- int size)
-{
- unsigned long tmp = 0;
- unsigned long flags;
-
- flags = hard_local_irq_save();
-
- switch (size) {
- case 1:
- __asm__ __volatile__
- ("%0 = b%2 (z);\n\t"
- "b%2 = %1;\n\t"
- : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
- break;
- case 2:
- __asm__ __volatile__
- ("%0 = w%2 (z);\n\t"
- "w%2 = %1;\n\t"
- : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
- break;
- case 4:
- __asm__ __volatile__
- ("%0 = %2;\n\t"
- "%2 = %1;\n\t"
- : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
- break;
- }
- hard_local_irq_restore(flags);
- return tmp;
-}
-
-#include <asm-generic/cmpxchg-local.h>
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#include <asm-generic/cmpxchg.h>
-
-#endif /* !CONFIG_SMP */
-
-#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
-#define tas(ptr) ((void)xchg((ptr), 1))
-
-#define prepare_to_switch() do { } while(0)
-
-/*
- * switch_to(n) should switch tasks to task ptr, first checking that
- * ptr isn't the current task, in which case it does nothing.
- */
-
-#include <asm/l1layout.h>
-#include <asm/mem_map.h>
-
-asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
-
-#ifndef CONFIG_SMP
-#define switch_to(prev,next,last) \
-do { \
- memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
- sizeof *L1_SCRATCH_TASK_INFO); \
- memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
- sizeof *L1_SCRATCH_TASK_INFO); \
- (last) = resume (prev, next); \
-} while (0)
-#else
-#define switch_to(prev, next, last) \
-do { \
- (last) = resume(prev, next); \
-} while (0)
-#endif
-
-#endif /* _BLACKFIN_SYSTEM_H */
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 17e3546..37fcae9 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -14,6 +14,7 @@
#include <linux/irq.h>
#include <linux/thread_info.h>
#include <linux/kbuild.h>
+#include <asm/pda.h>

int main(void)
{
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 8dd0416..8c5369c 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -19,6 +19,7 @@
#include <asm/blackfin.h>
#include <asm/fixed_code.h>
#include <asm/mem_map.h>
+#include <asm/irq.h>

asmlinkage void ret_from_fork(void);

diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index d6102c8..2aa0193 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -30,6 +30,7 @@
#include <asm/fixed_code.h>
#include <asm/early_printk.h>
#include <asm/irq_handler.h>
+#include <asm/pda.h>

u16 _bfin_swrst;
EXPORT_SYMBOL(_bfin_swrst);
diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c
index 050db44..44bbf2f 100644
--- a/arch/blackfin/kernel/trace.c
+++ b/arch/blackfin/kernel/trace.c
@@ -21,6 +21,7 @@
#include <asm/fixed_code.h>
#include <asm/traps.h>
#include <asm/irq_handler.h>
+#include <asm/pda.h>

void decode_address(char *buf, unsigned long address)
{
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 655f25d..de5c2c3 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -17,6 +17,7 @@
#include <asm/trace.h>
#include <asm/fixed_code.h>
#include <asm/pseudo_instructions.h>
+#include <asm/pda.h>

#ifdef CONFIG_KGDB
# include <linux/kgdb.h>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
David Howells
[PATCH 02/29] Remove all #inclusions of asm/system.h
March 07, 2012 09:10PM
Remove all #inclusions of asm/system.h preparatory to splitting and killing
it. Performed with the following command:

perl -p -i -e 's!#\s*include\s*<asm/system[.]h>\n!!' `grep -Irl '#\s*include\s*<asm/system[.]h>' *`

Signed-off-by: David Howells <[email protected]>
---

arch/alpha/boot/bootp.c | 1 -
arch/alpha/boot/bootpz.c | 1 -
arch/alpha/boot/head.S | 1 -
arch/alpha/boot/main.c | 1 -
arch/alpha/include/asm/atomic.h | 1 -
arch/alpha/include/asm/core_lca.h | 1 -
arch/alpha/include/asm/core_t2.h | 1 -
arch/alpha/include/asm/io.h | 1 -
arch/alpha/include/asm/irqflags.h | 1 -
arch/alpha/include/asm/mmu_context.h | 1 -
arch/alpha/include/asm/spinlock.h | 1 -
arch/alpha/kernel/head.S | 1 -
arch/alpha/kernel/irq.c | 1 -
arch/alpha/kernel/osf_sys.c | 1 -
arch/alpha/kernel/process.c | 1 -
arch/alpha/kernel/ptrace.c | 1 -
arch/alpha/kernel/setup.c | 1 -
arch/alpha/kernel/sys_alcor.c | 1 -
arch/alpha/kernel/sys_cabriolet.c | 1 -
arch/alpha/kernel/sys_dp264.c | 1 -
arch/alpha/kernel/sys_eb64p.c | 1 -
arch/alpha/kernel/sys_eiger.c | 1 -
arch/alpha/kernel/sys_jensen.c | 1 -
arch/alpha/kernel/sys_marvel.c | 1 -
arch/alpha/kernel/sys_miata.c | 1 -
arch/alpha/kernel/sys_mikasa.c | 1 -
arch/alpha/kernel/sys_nautilus.c | 1 -
arch/alpha/kernel/sys_noritake.c | 1 -
arch/alpha/kernel/sys_rawhide.c | 1 -
arch/alpha/kernel/sys_ruffian.c | 1 -
arch/alpha/kernel/sys_rx164.c | 1 -
arch/alpha/kernel/sys_sable.c | 1 -
arch/alpha/kernel/sys_sio.c | 1 -
arch/alpha/kernel/sys_sx164.c | 1 -
arch/alpha/kernel/sys_takara.c | 1 -
arch/alpha/kernel/sys_titan.c | 1 -
arch/alpha/kernel/sys_wildfire.c | 1 -
arch/alpha/lib/stacktrace.c | 1 -
arch/alpha/mm/fault.c | 1 -
arch/alpha/mm/init.c | 1 -
arch/alpha/oprofile/common.c | 1 -
arch/alpha/oprofile/op_model_ev4.c | 1 -
arch/alpha/oprofile/op_model_ev5.c | 1 -
arch/alpha/oprofile/op_model_ev6.c | 1 -
arch/alpha/oprofile/op_model_ev67.c | 1 -
arch/arm/common/via82c505.c | 1 -
arch/arm/include/asm/atomic.h | 1 -
arch/arm/include/asm/bitops.h | 1 -
arch/arm/include/asm/div64.h | 1 -
arch/arm/include/asm/dma.h | 1 -
arch/arm/include/asm/io.h | 1 -
arch/arm/include/asm/processor.h | 1 -
arch/arm/include/asm/uaccess.h | 1 -
arch/arm/kernel/armksyms.c | 1 -
arch/arm/kernel/entry-armv.S | 1 -
arch/arm/kernel/fiq.c | 1 -
arch/arm/kernel/head-nommu.S | 1 -
arch/arm/kernel/head.S | 1 -
arch/arm/kernel/hw_breakpoint.c | 1 -
arch/arm/kernel/irq.c | 1 -
arch/arm/kernel/machine_kexec.c | 1 -
arch/arm/kernel/process.c | 1 -
arch/arm/kernel/ptrace.c | 1 -
arch/arm/kernel/setup.c | 1 -
arch/arm/kernel/sleep.S | 1 -
arch/arm/kernel/traps.c | 1 -
arch/arm/mach-clps711x/p720t-leds.c | 1 -
arch/arm/mach-ebsa110/core.c | 1 -
arch/arm/mach-ebsa110/leds.c | 1 -
arch/arm/mach-footbridge/dc21285.c | 1 -
arch/arm/mach-footbridge/ebsa285-leds.c | 1 -
arch/arm/mach-footbridge/netwinder-leds.c | 1 -
arch/arm/mach-imx/dma-v1.c | 1 -
arch/arm/mach-integrator/core.c | 1 -
arch/arm/mach-integrator/leds.c | 1 -
arch/arm/mach-integrator/pci.c | 1 -
arch/arm/mach-integrator/pci_v3.c | 1 -
arch/arm/mach-iop33x/uart.c | 1 -
arch/arm/mach-ixp2000/core.c | 1 -
arch/arm/mach-ixp2000/enp2611.c | 1 -
arch/arm/mach-ixp2000/ixdp2400.c | 1 -
arch/arm/mach-ixp2000/ixdp2800.c | 1 -
arch/arm/mach-ixp2000/ixdp2x00.c | 1 -
arch/arm/mach-ixp2000/ixdp2x01.c | 1 -
arch/arm/mach-ixp2000/pci.c | 1 -
arch/arm/mach-ixp23xx/core.c | 1 -
arch/arm/mach-ixp23xx/espresso.c | 1 -
arch/arm/mach-ixp23xx/ixdp2351.c | 1 -
arch/arm/mach-ixp23xx/pci.c | 1 -
arch/arm/mach-ixp23xx/roadrunner.c | 1 -
arch/arm/mach-ixp4xx/common-pci.c | 1 -
arch/arm/mach-ixp4xx/goramo_mlr.c | 1 -
arch/arm/mach-msm/board-sapphire.c | 1 -
arch/arm/mach-mxs/system.c | 1 -
arch/arm/mach-omap1/leds-h2p2-debug.c | 1 -
arch/arm/mach-omap1/leds-innovator.c | 1 -
arch/arm/mach-omap1/leds-osk.c | 1 -
arch/arm/mach-omap1/mux.c | 1 -
arch/arm/mach-omap1/time.c | 1 -
arch/arm/mach-omap1/timer32k.c | 1 -
arch/arm/mach-omap2/mux.c | 1 -
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 1 -
arch/arm/mach-omap2/sleep44xx.S | 1 -
arch/arm/mach-orion5x/ls-chl-setup.c | 1 -
arch/arm/mach-orion5x/ls_hgl-setup.c | 1 -
arch/arm/mach-orion5x/lsmini-setup.c | 1 -
arch/arm/mach-pnx4008/core.c | 1 -
arch/arm/mach-pnx4008/dma.c | 1 -
arch/arm/mach-pnx4008/irq.c | 1 -
arch/arm/mach-pnx4008/time.c | 1 -
arch/arm/mach-pxa/corgi.c | 1 -
arch/arm/mach-pxa/generic.c | 1 -
arch/arm/mach-pxa/leds-idp.c | 1 -
arch/arm/mach-pxa/leds-lubbock.c | 1 -
arch/arm/mach-pxa/leds-mainstone.c | 1 -
arch/arm/mach-pxa/poodle.c | 1 -
arch/arm/mach-realview/core.c | 1 -
arch/arm/mach-sa1100/dma.c | 1 -
arch/arm/mach-sa1100/generic.c | 1 -
arch/arm/mach-sa1100/leds-assabet.c | 1 -
arch/arm/mach-sa1100/leds-badge4.c | 1 -
arch/arm/mach-sa1100/leds-cerf.c | 1 -
arch/arm/mach-sa1100/leds-hackkit.c | 1 -
arch/arm/mach-sa1100/leds-lart.c | 1 -
arch/arm/mach-sa1100/pm.c | 1 -
arch/arm/mach-shark/leds.c | 1 -
arch/arm/mach-shmobile/cpuidle.c | 1 -
arch/arm/mach-shmobile/pm-r8a7779.c | 1 -
arch/arm/mach-shmobile/pm-sh7372.c | 1 -
arch/arm/mach-shmobile/suspend.c | 1 -
arch/arm/mach-tegra/cpu-tegra.c | 1 -
arch/arm/mach-versatile/core.c | 1 -
arch/arm/mach-versatile/pci.c | 1 -
arch/arm/mach-vexpress/hotplug.c | 1 -
arch/arm/mm/alignment.c | 1 -
arch/arm/mm/cache-xsc3l2.c | 1 -
arch/arm/mm/fault.c | 1 -
arch/arm/mm/flush.c | 1 -
arch/arm/mm/proc-fa526.S | 1 -
arch/arm/nwfpe/fpa11.c | 1 -
arch/arm/plat-iop/i2c.c | 1 -
arch/arm/plat-iop/pci.c | 1 -
arch/arm/plat-mxc/system.c | 1 -
arch/arm/plat-omap/debug-leds.c | 1 -
arch/arm/plat-omap/dma.c | 1 -
arch/arm/plat-omap/mux.c | 1 -
arch/arm/plat-pxa/dma.c | 1 -
arch/arm/plat-s3c24xx/dma.c | 1 -
arch/arm/plat-samsung/cpu.c | 1 -
arch/arm/plat-samsung/time.c | 1 -
arch/avr32/include/asm/atomic.h | 1 -
arch/avr32/include/asm/bitops.h | 1 -
arch/avr32/mach-at32ap/cpufreq.c | 1 -
arch/avr32/oprofile/op_model_avr32.c | 1 -
arch/blackfin/kernel/ipipe.c | 1 -
arch/blackfin/kernel/kgdb_test.c | 1 -
arch/blackfin/kernel/ptrace.c | 1 -
arch/blackfin/kernel/reboot.c | 1 -
arch/c6x/include/asm/bitops.h | 1 -
arch/c6x/kernel/soc.c | 1 -
arch/cris/arch-v10/drivers/ds1302.c | 1 -
arch/cris/arch-v10/drivers/gpio.c | 1 -
arch/cris/arch-v10/drivers/i2c.c | 1 -
arch/cris/arch-v10/drivers/pcf8563.c | 1 -
arch/cris/arch-v10/drivers/sync_serial.c | 1 -
arch/cris/arch-v10/kernel/debugport.c | 1 -
arch/cris/arch-v10/kernel/ptrace.c | 1 -
arch/cris/arch-v32/drivers/i2c.c | 1 -
arch/cris/arch-v32/drivers/mach-a3/gpio.c | 1 -
arch/cris/arch-v32/drivers/mach-fs/gpio.c | 1 -
arch/cris/arch-v32/kernel/debugport.c | 1 -
arch/cris/arch-v32/kernel/fasttimer.c | 1 -
arch/cris/arch-v32/kernel/ptrace.c | 1 -
arch/cris/arch-v32/mach-a3/dma.c | 1 -
arch/cris/arch-v32/mach-fs/dma.c | 1 -
arch/cris/include/asm/atomic.h | 1 -
arch/cris/include/asm/bitops.h | 1 -
arch/cris/include/asm/processor.h | 1 -
arch/cris/kernel/process.c | 1 -
arch/cris/kernel/ptrace.c | 1 -
arch/frv/include/asm/atomic.h | 1 -
arch/frv/kernel/debug-stub.c | 1 -
arch/frv/kernel/gdb-io.c | 1 -
arch/frv/kernel/gdb-stub.c | 1 -
arch/frv/kernel/irq-mb93091.c | 1 -
arch/frv/kernel/irq-mb93093.c | 1 -
arch/frv/kernel/irq-mb93493.c | 1 -
arch/frv/kernel/irq.c | 1 -
arch/frv/kernel/process.c | 1 -
arch/frv/kernel/ptrace.c | 1 -
arch/frv/kernel/traps.c | 1 -
arch/frv/mm/fault.c | 1 -
arch/frv/mm/init.c | 1 -
arch/frv/mm/kmap.c | 1 -
arch/h8300/include/asm/atomic.h | 1 -
arch/h8300/include/asm/bitops.h | 1 -
arch/h8300/kernel/irq.c | 1 -
arch/h8300/kernel/process.c | 1 -
arch/h8300/kernel/ptrace.c | 1 -
arch/h8300/kernel/traps.c | 1 -
arch/h8300/mm/fault.c | 1 -
arch/h8300/mm/init.c | 1 -
arch/h8300/mm/kmap.c | 1 -
arch/h8300/mm/memory.c | 1 -
arch/hexagon/include/asm/bitops.h | 1 -
arch/hexagon/kernel/ptrace.c | 1 -
arch/hexagon/kernel/vm_events.c | 1 -
arch/ia64/dig/setup.c | 1 -
arch/ia64/hp/sim/boot/bootloader.c | 1 -
arch/ia64/hp/sim/simeth.c | 1 -
arch/ia64/include/asm/acpi.h | 1 -
arch/ia64/include/asm/atomic.h | 1 -
arch/ia64/include/asm/futex.h | 1 -
arch/ia64/include/asm/io.h | 1 -
arch/ia64/include/asm/pgtable.h | 1 -
arch/ia64/include/asm/sal.h | 1 -
arch/ia64/include/asm/sn/pda.h | 1 -
arch/ia64/include/asm/spinlock.h | 1 -
arch/ia64/include/asm/uv/uv.h | 1 -
arch/ia64/kernel/acpi.c | 1 -
arch/ia64/kernel/fsys.S | 1 -
arch/ia64/kernel/gate.S | 1 -
arch/ia64/kernel/gate.lds.S | 1 -
arch/ia64/kernel/head.S | 1 -
arch/ia64/kernel/iosapic.c | 1 -
arch/ia64/kernel/irq_ia64.c | 1 -
arch/ia64/kernel/ivt.S | 1 -
arch/ia64/kernel/machvec.c | 1 -
arch/ia64/kernel/mca.c | 1 -
arch/ia64/kernel/mca_drv.c | 1 -
arch/ia64/kernel/patch.c | 1 -
arch/ia64/kernel/pci-dma.c | 1 -
arch/ia64/kernel/perfmon.c | 1 -
arch/ia64/kernel/ptrace.c | 1 -
arch/ia64/kernel/setup.c | 1 -
arch/ia64/kernel/smp.c | 1 -
arch/ia64/kernel/smpboot.c | 1 -
arch/ia64/kernel/time.c | 1 -
arch/ia64/kernel/uncached.c | 1 -
arch/ia64/kernel/unwind.c | 1 -
arch/ia64/kernel/vmlinux.lds.S | 1 -
arch/ia64/mm/fault.c | 1 -
arch/ia64/mm/init.c | 1 -
arch/ia64/oprofile/backtrace.c | 1 -
arch/ia64/pci/pci.c | 1 -
arch/ia64/sn/kernel/setup.c | 1 -
arch/ia64/sn/kernel/sn2/prominfo_proc.c | 1 -
arch/ia64/sn/kernel/sn2/sn2_smp.c | 1 -
arch/ia64/sn/kernel/sn2/timer.c | 1 -
arch/ia64/sn/kernel/tiocx.c | 1 -
arch/ia64/xen/xensetup.S | 1 -
arch/m32r/include/asm/atomic.h | 1 -
arch/m32r/include/asm/bitops.h | 1 -
arch/m32r/include/asm/local.h | 1 -
arch/m32r/kernel/ptrace.c | 1 -
arch/m32r/kernel/traps.c | 1 -
arch/m32r/mm/fault-nommu.c | 1 -
arch/m32r/mm/fault.c | 1 -
arch/m32r/platforms/m32104ut/setup.c | 1 -
arch/m32r/platforms/m32700ut/setup.c | 1 -
arch/m32r/platforms/mappi/setup.c | 1 -
arch/m32r/platforms/mappi2/setup.c | 1 -
arch/m32r/platforms/mappi3/setup.c | 1 -
arch/m32r/platforms/oaks32r/setup.c | 1 -
arch/m32r/platforms/opsput/setup.c | 1 -
arch/m32r/platforms/usrv/setup.c | 1 -
arch/m68k/amiga/amisound.c | 1 -
arch/m68k/amiga/config.c | 1 -
arch/m68k/apollo/config.c | 1 -
arch/m68k/atari/ataints.c | 1 -
arch/m68k/atari/atasound.c | 1 -
arch/m68k/atari/config.c | 1 -
arch/m68k/bvme6000/config.c | 1 -
arch/m68k/bvme6000/rtc.c | 1 -
arch/m68k/hp300/time.c | 1 -
arch/m68k/include/asm/atomic.h | 1 -
arch/m68k/include/asm/sun3xflop.h | 1 -
arch/m68k/kernel/ints.c | 1 -
arch/m68k/kernel/irq.c | 1 -
arch/m68k/kernel/process_mm.c | 1 -
arch/m68k/kernel/process_no.c | 1 -
arch/m68k/kernel/ptrace_mm.c | 1 -
arch/m68k/kernel/ptrace_no.c | 1 -
arch/m68k/kernel/traps.c | 1 -
arch/m68k/kernel/vectors.c | 1 -
arch/m68k/mac/config.c | 1 -
arch/m68k/mac/misc.c | 1 -
arch/m68k/mm/fault.c | 1 -
arch/m68k/mm/init_mm.c | 1 -
arch/m68k/mm/init_no.c | 1 -
arch/m68k/mm/kmap.c | 1 -
arch/m68k/mm/memory.c | 1 -
arch/m68k/mm/motorola.c | 1 -
arch/m68k/mm/sun3mmu.c | 1 -
arch/m68k/mvme147/config.c | 1 -
arch/m68k/mvme16x/config.c | 1 -
arch/m68k/mvme16x/rtc.c | 1 -
arch/m68k/platform/68328/config.c | 1 -
arch/m68k/platform/68328/timers.c | 1 -
arch/m68k/platform/68360/config.c | 1 -
arch/m68k/platform/68EZ328/config.c | 1 -
arch/m68k/platform/68VZ328/config.c | 1 -
arch/m68k/q40/config.c | 1 -
arch/m68k/q40/q40ints.c | 1 -
arch/m68k/sun3/intersil.c | 1 -
arch/m68k/sun3/mmu_emu.c | 1 -
arch/m68k/sun3/prom/console.c | 1 -
arch/m68k/sun3x/config.c | 1 -
arch/m68k/sun3x/time.c | 1 -
arch/microblaze/kernel/cpu/pvr.c | 1 -
arch/microblaze/kernel/microblaze_ksyms.c | 1 -
arch/microblaze/kernel/process.c | 1 -
arch/microblaze/kernel/prom.c | 1 -
arch/microblaze/kernel/setup.c | 1 -
arch/microblaze/kernel/timer.c | 1 -
arch/microblaze/kernel/traps.c | 1 -
arch/microblaze/lib/memcpy.c | 1 -
arch/microblaze/mm/fault.c | 1 -
arch/mips/cavium-octeon/setup.c | 1 -
arch/mips/cavium-octeon/smp.c | 1 -
arch/mips/dec/ecc-berr.c | 1 -
arch/mips/dec/kn01-berr.c | 1 -
arch/mips/dec/kn02xa-berr.c | 1 -
arch/mips/dec/wbflush.c | 1 -
arch/mips/emma/markeins/irq.c | 1 -
arch/mips/fw/arc/misc.c | 1 -
arch/mips/include/asm/atomic.h | 1 -
arch/mips/include/asm/dma.h | 1 -
arch/mips/include/asm/mach-au1x00/au1000_dma.h | 1 -
arch/mips/include/asm/processor.h | 1 -
arch/mips/include/asm/txx9/jmr3927.h | 1 -
arch/mips/kernel/cpu-bugs64.c | 1 -
arch/mips/kernel/cpu-probe.c | 1 -
arch/mips/kernel/irq-rm7000.c | 1 -
arch/mips/kernel/irq-rm9000.c | 1 -
arch/mips/kernel/irq.c | 1 -
arch/mips/kernel/irq_cpu.c | 1 -
arch/mips/kernel/mips-mt.c | 1 -
arch/mips/kernel/process.c | 1 -
arch/mips/kernel/ptrace.c | 1 -
arch/mips/kernel/ptrace32.c | 1 -
arch/mips/kernel/rtlx.c | 1 -
arch/mips/kernel/setup.c | 1 -
arch/mips/kernel/signal32.c | 1 -
arch/mips/kernel/signal_n32.c | 1 -
arch/mips/kernel/smp-bmips.c | 1 -
arch/mips/kernel/smp-cmp.c | 1 -
arch/mips/kernel/smp-mt.c | 1 -
arch/mips/kernel/smp.c | 1 -
arch/mips/kernel/smtc-proc.c | 1 -
arch/mips/kernel/smtc.c | 1 -
arch/mips/kernel/spram.c | 1 -
arch/mips/kernel/traps.c | 1 -
arch/mips/kernel/unaligned.c | 1 -
arch/mips/kernel/vpe.c | 1 -
arch/mips/lasat/reset.c | 1 -
arch/mips/math-emu/dsemul.c | 1 -
arch/mips/mipssim/sim_smtc.c | 1 -
arch/mips/mm/c-octeon.c | 1 -
arch/mips/mm/c-r3k.c | 1 -
arch/mips/mm/c-r4k.c | 1 -
arch/mips/mm/c-tx39.c | 1 -
arch/mips/mm/fault.c | 1 -
arch/mips/mm/page.c | 1 -
arch/mips/mm/sc-ip22.c | 1 -
arch/mips/mm/sc-mips.c | 1 -
arch/mips/mm/sc-r5k.c | 1 -
arch/mips/mm/tlb-r3k.c | 1 -
arch/mips/mm/tlb-r4k.c | 1 -
arch/mips/mm/tlb-r8k.c | 1 -
arch/mips/mti-malta/malta-init.c | 1 -
arch/mips/netlogic/common/irq.c | 1 -
arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c | 1 -
arch/mips/pmc-sierra/msp71xx/msp_irq_per.c | 1 -
arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c | 1 -
arch/mips/pmc-sierra/yosemite/irq.c | 1 -
arch/mips/pmc-sierra/yosemite/prom.c | 1 -
arch/mips/powertv/asic/irq_asic.c | 1 -
arch/mips/powertv/init.c | 1 -
arch/mips/rb532/irq.c | 1 -
arch/mips/sgi-ip22/ip22-berr.c | 1 -
arch/mips/sgi-ip22/ip22-reset.c | 1 -
arch/mips/sgi-ip22/ip28-berr.c | 1 -
arch/mips/sgi-ip27/ip27-irq.c | 1 -
arch/mips/sgi-ip27/ip27-reset.c | 1 -
arch/mips/sgi-ip32/ip32-irq.c | 1 -
arch/mips/sgi-ip32/ip32-reset.c | 1 -
arch/mips/sibyte/bcm1480/irq.c | 1 -
arch/mips/sibyte/common/sb_tbprof.c | 1 -
arch/mips/sibyte/sb1250/bus_watcher.c | 1 -
arch/mips/sibyte/sb1250/irq.c | 1 -
arch/mips/sni/reset.c | 1 -
arch/mips/vr41xx/common/irq.c | 1 -
arch/mips/vr41xx/common/pmu.c | 1 -
arch/mn10300/include/asm/dma.h | 1 -
arch/mn10300/kernel/entry.S | 1 -
arch/mn10300/kernel/fpu.c | 1 -
arch/mn10300/kernel/gdb-io-serial.c | 1 -
arch/mn10300/kernel/gdb-io-ttysm.c | 1 -
arch/mn10300/kernel/gdb-stub.c | 1 -
arch/mn10300/kernel/mn10300-serial.c | 1 -
arch/mn10300/kernel/mn10300-watchdog.c | 1 -
arch/mn10300/kernel/process.c | 1 -
arch/mn10300/kernel/ptrace.c | 1 -
arch/mn10300/kernel/setup.c | 1 -
arch/mn10300/kernel/smp-low.S | 1 -
arch/mn10300/kernel/smp.c | 1 -
arch/mn10300/kernel/traps.c | 1 -
arch/mn10300/lib/bitops.c | 1 -
arch/mn10300/mm/fault.c | 1 -
arch/mn10300/mm/init.c | 1 -
arch/mn10300/mm/misalignment.c | 1 -
arch/mn10300/mm/pgtable.c | 1 -
arch/mn10300/mm/tlb-smp.c | 1 -
arch/mn10300/proc-mn2ws0050/proc-init.c | 1 -
arch/openrisc/kernel/idle.c | 1 -
arch/openrisc/kernel/process.c | 1 -
arch/openrisc/kernel/prom.c | 1 -
arch/openrisc/kernel/ptrace.c | 1 -
arch/openrisc/kernel/setup.c | 1 -
arch/openrisc/kernel/traps.c | 1 -
arch/openrisc/mm/init.c | 1 -
arch/openrisc/mm/tlb.c | 1 -
arch/parisc/include/asm/atomic.h | 1 -
arch/parisc/include/asm/processor.h | 1 -
arch/parisc/include/asm/spinlock.h | 1 -
arch/parisc/include/asm/timex.h | 1 -
arch/parisc/include/asm/uaccess.h | 1 -
arch/parisc/kernel/cache.c | 1 -
arch/parisc/kernel/firmware.c | 1 -
arch/parisc/kernel/pci.c | 1 -
arch/parisc/kernel/ptrace.c | 1 -
arch/parisc/kernel/smp.c | 1 -
arch/parisc/kernel/traps.c | 1 -
arch/parisc/lib/bitops.c | 1 -
arch/powerpc/include/asm/atomic.h | 1 -
arch/powerpc/include/asm/dma.h | 1 -
arch/powerpc/include/asm/hw_breakpoint.h | 1 -
arch/powerpc/kernel/align.c | 1 -
arch/powerpc/kernel/crash.c | 1 -
arch/powerpc/kernel/idle.c | 1 -
arch/powerpc/kernel/irq.c | 1 -
arch/powerpc/kernel/kprobes.c | 1 -
arch/powerpc/kernel/lparcfg.c | 1 -
arch/powerpc/kernel/ppc_ksyms.c | 1 -
arch/powerpc/kernel/process.c | 1 -
arch/powerpc/kernel/prom.c | 1 -
arch/powerpc/kernel/prom_init.c | 1 -
arch/powerpc/kernel/ptrace.c | 1 -
arch/powerpc/kernel/ptrace32.c | 1 -
arch/powerpc/kernel/rtas.c | 1 -
arch/powerpc/kernel/setup-common.c | 1 -
arch/powerpc/kernel/setup_32.c | 1 -
arch/powerpc/kernel/setup_64.c | 1 -
arch/powerpc/kernel/smp.c | 1 -
arch/powerpc/kernel/softemu8xx.c | 1 -
arch/powerpc/kernel/swsusp.c | 1 -
arch/powerpc/kernel/swsusp_64.c | 1 -
arch/powerpc/kernel/sysfs.c | 1 -
arch/powerpc/kernel/traps.c | 1 -
arch/powerpc/kernel/vdso.c | 1 -
arch/powerpc/lib/alloc.c | 1 -
arch/powerpc/mm/44x_mmu.c | 1 -
arch/powerpc/mm/fault.c | 1 -
arch/powerpc/mm/hash_utils_64.c | 1 -
arch/powerpc/mm/init_32.c | 1 -
arch/powerpc/mm/init_64.c | 1 -
arch/powerpc/mm/numa.c | 1 -
arch/powerpc/mm/pgtable_64.c | 1 -
arch/powerpc/oprofile/common.c | 1 -
arch/powerpc/oprofile/op_model_7450.c | 1 -
arch/powerpc/oprofile/op_model_cell.c | 1 -
arch/powerpc/oprofile/op_model_fsl_emb.c | 1 -
arch/powerpc/oprofile/op_model_power4.c | 1 -
arch/powerpc/oprofile/op_model_rs64.c | 1 -
arch/powerpc/platforms/82xx/pq2.c | 1 -
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/mpc832x_mds.c | 1 -
arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 -
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 -
arch/powerpc/platforms/83xx/mpc836x_mds.c | 1 -
arch/powerpc/platforms/83xx/sbc834x.c | 1 -
arch/powerpc/platforms/85xx/corenet_ds.c | 1 -
arch/powerpc/platforms/85xx/ksi8560.c | 1 -
arch/powerpc/platforms/85xx/mpc8536_ds.c | 1 -
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 1 -
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 1 -
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 -
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1 -
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 1 -
arch/powerpc/platforms/85xx/p1010rdb.c | 1 -
arch/powerpc/platforms/85xx/p1023_rds.c | 1 -
arch/powerpc/platforms/85xx/p2041_rdb.c | 1 -
arch/powerpc/platforms/85xx/p3041_ds.c | 1 -
arch/powerpc/platforms/85xx/p4080_ds.c | 1 -
arch/powerpc/platforms/85xx/p5020_ds.c | 1 -
arch/powerpc/platforms/85xx/sbc8548.c | 1 -
arch/powerpc/platforms/85xx/sbc8560.c | 1 -
arch/powerpc/platforms/85xx/socrates.c | 1 -
arch/powerpc/platforms/85xx/stx_gp3.c | 1 -
arch/powerpc/platforms/85xx/tqm85xx.c | 1 -
arch/powerpc/platforms/85xx/xes_mpc85xx.c | 1 -
arch/powerpc/platforms/86xx/gef_ppc9a.c | 1 -
arch/powerpc/platforms/86xx/gef_sbc310.c | 1 -
arch/powerpc/platforms/86xx/gef_sbc610.c | 1 -
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 1 -
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 1 -
arch/powerpc/platforms/86xx/pic.c | 1 -
arch/powerpc/platforms/86xx/sbc8641d.c | 1 -
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 1 -
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 1 -
arch/powerpc/platforms/8xx/tqm8xx_setup.c | 1 -
arch/powerpc/platforms/cell/smp.c | 1 -
arch/powerpc/platforms/embedded6xx/c2k.c | 1 -
arch/powerpc/platforms/embedded6xx/holly.c | 1 -
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 1 -
arch/powerpc/platforms/embedded6xx/prpmc2800.c | 1 -
arch/powerpc/platforms/embedded6xx/storcenter.c | 1 -
arch/powerpc/platforms/fsl_uli1575.c | 1 -
arch/powerpc/platforms/iseries/dt.c | 1 -
arch/powerpc/platforms/iseries/lpevents.c | 1 -
arch/powerpc/platforms/iseries/setup.c | 1 -
arch/powerpc/platforms/iseries/smp.c | 1 -
arch/powerpc/platforms/iseries/viopath.c | 1 -
arch/powerpc/platforms/maple/setup.c | 1 -
arch/powerpc/platforms/maple/time.c | 1 -
arch/powerpc/platforms/pasemi/setup.c | 1 -
arch/powerpc/platforms/powermac/cpufreq_32.c | 1 -
arch/powerpc/platforms/powermac/nvram.c | 1 -
arch/powerpc/platforms/powermac/setup.c | 1 -
arch/powerpc/platforms/powermac/time.c | 1 -
arch/powerpc/platforms/powernv/smp.c | 1 -
arch/powerpc/platforms/pseries/dtl.c | 1 -
arch/powerpc/platforms/pseries/hotplug-cpu.c | 1 -
arch/powerpc/platforms/pseries/processor_idle.c | 1 -
arch/powerpc/platforms/pseries/ras.c | 1 -
arch/powerpc/platforms/pseries/smp.c | 1 -
arch/powerpc/platforms/wsp/chroma.c | 1 -
arch/powerpc/platforms/wsp/psr2.c | 1 -
arch/powerpc/sysdev/cpm_common.c | 1 -
arch/powerpc/sysdev/fsl_soc.c | 1 -
arch/powerpc/sysdev/tsi108_dev.c | 1 -
arch/s390/include/asm/atomic.h | 1 -
arch/s390/include/asm/sigp.h | 1 -
arch/s390/include/asm/smp.h | 1 -
arch/s390/kernel/cpcmd.c | 1 -
arch/s390/kernel/dis.c | 1 -
arch/s390/kernel/machine_kexec.c | 1 -
arch/s390/kernel/process.c | 1 -
arch/s390/kernel/ptrace.c | 1 -
arch/s390/kernel/setup.c | 1 -
arch/s390/kernel/suspend.c | 1 -
arch/s390/kernel/traps.c | 1 -
arch/s390/kernel/vdso.c | 1 -
arch/s390/kvm/kvm-s390.c | 1 -
arch/s390/mm/fault.c | 1 -
arch/s390/mm/init.c | 1 -
arch/s390/mm/maccess.c | 1 -
arch/s390/mm/pgtable.c | 1 -
arch/sh/boards/mach-microdev/irq.c | 1 -
arch/sh/include/asm/atomic.h | 1 -
arch/sh/include/asm/bitops.h | 1 -
arch/sh/include/asm/futex-irq.h | 1 -
arch/sh/include/asm/io.h | 1 -
arch/sh/include/asm/ptrace.h | 1 -
arch/sh/kernel/cpu/init.c | 1 -
arch/sh/kernel/cpu/irq/imask.c | 1 -
arch/sh/kernel/cpu/sh2a/opcode_helper.c | 1 -
arch/sh/kernel/cpu/sh4/fpu.c | 1 -
arch/sh/kernel/idle.c | 1 -
arch/sh/kernel/io_trapped.c | 1 -
arch/sh/kernel/process_32.c | 1 -
arch/sh/kernel/ptrace_32.c | 1 -
arch/sh/kernel/ptrace_64.c | 1 -
arch/sh/kernel/reboot.c | 1 -
arch/sh/kernel/signal_32.c | 1 -
arch/sh/kernel/smp.c | 1 -
arch/sh/kernel/traps.c | 1 -
arch/sh/kernel/traps_32.c | 1 -
arch/sh/kernel/traps_64.c | 1 -
arch/sh/math-emu/math.c | 1 -
arch/sh/mm/fault_32.c | 1 -
arch/sh/mm/fault_64.c | 1 -
arch/sh/mm/pmb.c | 1 -
arch/sh/mm/tlb-pteaex.c | 1 -
arch/sh/mm/tlb-sh3.c | 1 -
arch/sh/mm/tlb-sh4.c | 1 -
arch/sh/mm/tlbflush_64.c | 1 -
arch/sparc/include/asm/atomic_32.h | 1 -
arch/sparc/include/asm/atomic_64.h | 1 -
arch/sparc/include/asm/auxio_32.h | 1 -
arch/sparc/include/asm/floppy_32.h | 1 -
arch/sparc/include/asm/futex_64.h | 1 -
arch/sparc/include/asm/io_32.h | 1 -
arch/sparc/include/asm/io_64.h | 1 -
arch/sparc/include/asm/mmu_context_64.h | 1 -
arch/sparc/include/asm/ns87303.h | 1 -
arch/sparc/include/asm/pgtable_32.h | 1 -
arch/sparc/include/asm/pgtable_64.h | 1 -
arch/sparc/include/asm/ptrace.h | 2 --
arch/sparc/include/asm/uaccess_64.h | 1 -
arch/sparc/kernel/devices.c | 1 -
arch/sparc/kernel/irq_64.c | 1 -
arch/sparc/kernel/muldiv.c | 1 -
arch/sparc/kernel/process_32.c | 1 -
arch/sparc/kernel/process_64.c | 1 -
arch/sparc/kernel/ptrace_32.c | 1 -
arch/sparc/kernel/ptrace_64.c | 1 -
arch/sparc/kernel/reboot.c | 1 -
arch/sparc/kernel/setup_32.c | 1 -
arch/sparc/kernel/setup_64.c | 1 -
arch/sparc/kernel/sparc_ksyms_64.c | 1 -
arch/sparc/kernel/time_32.c | 1 -
arch/sparc/kernel/traps_32.c | 1 -
arch/sparc/kernel/traps_64.c | 1 -
arch/sparc/kernel/unaligned_32.c | 1 -
arch/sparc/kernel/unaligned_64.c | 1 -
arch/sparc/kernel/visemul.c | 1 -
arch/sparc/mm/btfixup.c | 1 -
arch/sparc/mm/fault_32.c | 1 -
arch/sparc/mm/init_32.c | 1 -
arch/sparc/mm/init_64.c | 1 -
arch/sparc/mm/loadmmu.c | 1 -
arch/sparc/mm/tsb.c | 1 -
arch/sparc/prom/console_32.c | 1 -
arch/sparc/prom/console_64.c | 1 -
arch/sparc/prom/misc_32.c | 1 -
arch/sparc/prom/misc_64.c | 1 -
arch/sparc/prom/p1275.c | 1 -
arch/sparc/prom/ranges.c | 1 -
arch/tile/include/asm/atomic.h | 1 -
arch/tile/include/asm/bitops_32.h | 1 -
arch/tile/include/asm/bitops_64.h | 1 -
arch/tile/include/asm/cacheflush.h | 1 -
arch/tile/include/asm/pgtable.h | 1 -
arch/tile/include/asm/spinlock_32.h | 1 -
arch/tile/kernel/process.c | 1 -
arch/tile/kernel/regs_32.S | 1 -
arch/tile/kernel/regs_64.S | 1 -
arch/tile/mm/fault.c | 1 -
arch/tile/mm/init.c | 1 -
arch/tile/mm/pgtable.c | 1 -
arch/um/include/asm/fixmap.h | 1 -
arch/unicore32/include/asm/io.h | 1 -
arch/unicore32/include/asm/uaccess.h | 1 -
arch/unicore32/kernel/dma.c | 1 -
arch/unicore32/kernel/head.S | 1 -
arch/unicore32/kernel/hibernate.c | 1 -
arch/unicore32/kernel/irq.c | 1 -
arch/unicore32/kernel/ksyms.c | 1 -
arch/unicore32/kernel/process.c | 1 -
arch/unicore32/kernel/traps.c | 1 -
arch/unicore32/mm/fault.c | 1 -
arch/unicore32/mm/flush.c | 1 -
arch/x86/ia32/ia32_aout.c | 1 -
arch/x86/include/asm/apic.h | 1 -
arch/x86/include/asm/elf.h | 1 -
arch/x86/include/asm/futex.h | 1 -
arch/x86/include/asm/local.h | 1 -
arch/x86/include/asm/mc146818rtc.h | 1 -
arch/x86/include/asm/processor.h | 1 -
arch/x86/include/asm/stackprotector.h | 1 -
arch/x86/include/asm/tlbflush.h | 1 -
arch/x86/include/asm/virtext.h | 1 -
arch/x86/kernel/apm_32.c | 1 -
arch/x86/kernel/cpu/mcheck/p5.c | 1 -
arch/x86/kernel/cpu/mcheck/therm_throt.c | 1 -
arch/x86/kernel/cpu/mcheck/winchip.c | 1 -
arch/x86/kernel/cpu/mtrr/generic.c | 1 -
arch/x86/kernel/cpuid.c | 1 -
arch/x86/kernel/i8259.c | 1 -
arch/x86/kernel/irqinit.c | 1 -
arch/x86/kernel/kgdb.c | 1 -
arch/x86/kernel/ldt.c | 1 -
arch/x86/kernel/machine_kexec_32.c | 1 -
arch/x86/kernel/mca_32.c | 1 -
arch/x86/kernel/module.c | 1 -
arch/x86/kernel/msr.c | 1 -
arch/x86/kernel/pci-calgary_64.c | 1 -
arch/x86/kernel/process.c | 1 -
arch/x86/kernel/process_32.c | 1 -
arch/x86/kernel/process_64.c | 1 -
arch/x86/kernel/ptrace.c | 1 -
arch/x86/kernel/setup.c | 1 -
arch/x86/kernel/tls.c | 1 -
arch/x86/kernel/traps.c | 1 -
arch/x86/mm/init.c | 1 -
arch/x86/mm/init_32.c | 1 -
arch/x86/mm/init_64.c | 1 -
arch/x86/mm/pgtable_32.c | 1 -
arch/x86/power/hibernate_32.c | 1 -
arch/xtensa/include/asm/atomic.h | 1 -
arch/xtensa/include/asm/bitops.h | 1 -
arch/xtensa/kernel/process.c | 1 -
arch/xtensa/kernel/ptrace.c | 1 -
arch/xtensa/kernel/setup.c | 1 -
arch/xtensa/mm/fault.c | 1 -
arch/xtensa/mm/tlb.c | 1 -
drivers/acpi/processor_driver.c | 1 -
drivers/atm/eni.c | 1 -
drivers/atm/firestream.c | 1 -
drivers/atm/horizon.c | 1 -
drivers/atm/idt77105.c | 1 -
drivers/atm/suni.c | 1 -
drivers/atm/zatm.c | 1 -
drivers/block/floppy.c | 1 -
drivers/block/hd.c | 1 -
drivers/block/nbd.c | 1 -
drivers/block/xd.c | 1 -
drivers/bluetooth/bt3c_cs.c | 1 -
drivers/bluetooth/btuart_cs.c | 1 -
drivers/bluetooth/dtl1_cs.c | 1 -
drivers/char/apm-emulation.c | 1 -
drivers/char/ds1302.c | 1 -
drivers/char/efirtc.c | 1 -
drivers/char/genrtc.c | 1 -
drivers/char/hpet.c | 1 -
drivers/char/ipmi/ipmi_devintf.c | 1 -
drivers/char/ipmi/ipmi_msghandler.c | 1 -
drivers/char/ipmi/ipmi_si_intf.c | 1 -
drivers/char/lp.c | 1 -
drivers/char/mbcs.c | 1 -
drivers/char/mspec.c | 1 -
drivers/char/mwave/3780i.c | 1 -
drivers/char/nvram.c | 1 -
drivers/char/nwflash.c | 1 -
drivers/char/pcmcia/synclink_cs.c | 1 -
drivers/char/rtc.c | 1 -
drivers/char/sonypi.c | 1 -
drivers/char/xilinx_hwicap/xilinx_hwicap.c | 1 -
drivers/cpufreq/omap-cpufreq.c | 1 -
drivers/cpufreq/powernow-k7.c | 1 -
drivers/firewire/core-cdev.c | 1 -
drivers/firewire/core-device.c | 1 -
drivers/firewire/core-topology.c | 1 -
drivers/firewire/ohci.c | 1 -
drivers/firewire/sbp2.c | 1 -
drivers/i2c/busses/i2c-acorn.c | 1 -
drivers/ide/ide-cs.c | 1 -
drivers/ide/qd65xx.c | 1 -
drivers/infiniband/hw/ehca/ehca_reqs.c | 1 -
drivers/input/joydev.c | 1 -
drivers/input/joystick/amijoy.c | 1 -
drivers/input/mouse/amimouse.c | 1 -
drivers/input/mouse/atarimouse.c | 1 -
drivers/input/serio/hp_sdc.c | 1 -
drivers/input/serio/maceps2.c | 1 -
drivers/input/serio/rpckbd.c | 1 -
drivers/input/serio/sa1111ps2.c | 1 -
drivers/isdn/hardware/avm/avm_cs.c | 1 -
drivers/isdn/hisax/avma1_cs.c | 1 -
drivers/isdn/hisax/elsa_cs.c | 1 -
drivers/isdn/hisax/sedlbauer_cs.c | 1 -
drivers/isdn/hisax/teles_cs.c | 1 -
drivers/isdn/i4l/isdn_bsdcomp.c | 1 -
drivers/isdn/pcbit/layer2.c | 1 -
drivers/macintosh/macio-adb.c | 1 -
drivers/macintosh/therm_adt746x.c | 1 -
drivers/macintosh/therm_pm72.c | 1 -
drivers/macintosh/therm_windtunnel.c | 1 -
drivers/macintosh/via-cuda.c | 1 -
drivers/macintosh/via-macii.c | 1 -
drivers/macintosh/via-pmu.c | 1 -
drivers/macintosh/via-pmu68k.c | 1 -
drivers/macintosh/windfarm_lm75_sensor.c | 1 -
drivers/macintosh/windfarm_pm121.c | 1 -
drivers/macintosh/windfarm_pm81.c | 1 -
drivers/macintosh/windfarm_pm91.c | 1 -
drivers/macintosh/windfarm_smu_controls.c | 1 -
drivers/macintosh/windfarm_smu_sensors.c | 1 -
drivers/media/dvb/dvb-core/dmxdev.c | 1 -
drivers/media/dvb/firewire/firedtv-fw.c | 1 -
drivers/media/dvb/ttpci/av7110.c | 1 -
drivers/media/media-devnode.c | 1 -
drivers/media/video/ivtv/ivtv-driver.h | 1 -
drivers/media/video/v4l2-common.c | 1 -
drivers/media/video/v4l2-dev.c | 1 -
drivers/message/i2o/i2o_scsi.c | 1 -
drivers/mfd/mcp-core.c | 1 -
drivers/mfd/mcp-sa11x0.c | 1 -
drivers/misc/sgi-xp/xp.h | 1 -
drivers/mmc/card/block.c | 1 -
drivers/mtd/devices/pmc551.c | 1 -
drivers/mtd/devices/slram.c | 1 -
drivers/mtd/maps/pcmciamtd.c | 1 -
drivers/mtd/nand/bcm_umi_nand.c | 1 -
drivers/net/appletalk/cops.c | 1 -
drivers/net/appletalk/ltpc.c | 1 -
drivers/net/arcnet/com20020_cs.c | 1 -
drivers/net/bonding/bond_main.c | 1 -
drivers/net/can/slcan.c | 1 -
drivers/net/cris/eth_v10.c | 1 -
drivers/net/ethernet/3com/3c574_cs.c | 1 -
drivers/net/ethernet/3com/3c589_cs.c | 1 -
drivers/net/ethernet/8390/3c503.c | 1 -
drivers/net/ethernet/8390/ac3200.c | 1 -
drivers/net/ethernet/8390/apne.c | 1 -
drivers/net/ethernet/8390/ax88796.c | 1 -
drivers/net/ethernet/8390/axnet_cs.c | 1 -
drivers/net/ethernet/8390/e2100.c | 1 -
drivers/net/ethernet/8390/es3210.c | 1 -
drivers/net/ethernet/8390/etherh.c | 1 -
drivers/net/ethernet/8390/hp-plus.c | 1 -
drivers/net/ethernet/8390/hp.c | 1 -
drivers/net/ethernet/8390/lib8390.c | 1 -
drivers/net/ethernet/8390/lne390.c | 1 -
drivers/net/ethernet/8390/mac8390.c | 1 -
drivers/net/ethernet/8390/ne-h8300.c | 1 -
drivers/net/ethernet/8390/ne.c | 1 -
drivers/net/ethernet/8390/ne2.c | 1 -
drivers/net/ethernet/8390/ne2k-pci.c | 1 -
drivers/net/ethernet/8390/ne3210.c | 1 -
drivers/net/ethernet/8390/pcnet_cs.c | 1 -
drivers/net/ethernet/8390/smc-mca.c | 1 -
drivers/net/ethernet/8390/smc-ultra.c | 1 -
drivers/net/ethernet/8390/smc-ultra32.c | 1 -
drivers/net/ethernet/8390/stnic.c | 1 -
drivers/net/ethernet/8390/wd.c | 1 -
drivers/net/ethernet/8390/zorro8390.c | 1 -
drivers/net/ethernet/alteon/acenic.c | 1 -
drivers/net/ethernet/amd/7990.c | 1 -
drivers/net/ethernet/amd/am79c961a.c | 1 -
drivers/net/ethernet/amd/amd8111e.c | 1 -
drivers/net/ethernet/amd/declance.c | 1 -
drivers/net/ethernet/amd/hplance.c | 1 -
drivers/net/ethernet/amd/mvme147.c | 1 -
drivers/net/ethernet/amd/nmclan_cs.c | 1 -
drivers/net/ethernet/amd/sunlance.c | 1 -
drivers/net/ethernet/broadcom/tg3.c | 1 -
drivers/net/ethernet/cirrus/cs89x0.c | 1 -
drivers/net/ethernet/cirrus/mac89x0.c | 1 -
drivers/net/ethernet/dlink/de600.c | 1 -
drivers/net/ethernet/dlink/de620.c | 1 -
drivers/net/ethernet/fujitsu/at1700.c | 1 -
drivers/net/ethernet/fujitsu/eth16i.c | 1 -
drivers/net/ethernet/fujitsu/fmvj18x_cs.c | 1 -
drivers/net/ethernet/i825xx/3c507.c | 1 -
drivers/net/ethernet/i825xx/3c527.c | 1 -
drivers/net/ethernet/i825xx/eepro.c | 1 -
drivers/net/ethernet/i825xx/eexpress.c | 1 -
drivers/net/ethernet/i825xx/ether1.c | 1 -
drivers/net/ethernet/i825xx/znet.c | 1 -
drivers/net/ethernet/korina.c | 1 -
drivers/net/ethernet/marvell/mv643xx_eth.c | 1 -
drivers/net/ethernet/marvell/pxa168_eth.c | 1 -
drivers/net/ethernet/natsemi/jazzsonic.c | 1 -
drivers/net/ethernet/natsemi/macsonic.c | 1 -
drivers/net/ethernet/natsemi/ns83820.c | 1 -
drivers/net/ethernet/neterion/s2io.c | 1 -
drivers/net/ethernet/nvidia/forcedeth.c | 1 -
drivers/net/ethernet/realtek/atp.c | 1 -
drivers/net/ethernet/realtek/r8169.c | 1 -
drivers/net/ethernet/seeq/ether3.c | 1 -
drivers/net/ethernet/seeq/seeq8005.c | 1 -
drivers/net/ethernet/smsc/smc91c92_cs.c | 1 -
drivers/net/ethernet/sun/cassini.c | 1 -
drivers/net/ethernet/sun/sunbmac.c | 1 -
drivers/net/ethernet/sun/sungem.c | 1 -
drivers/net/ethernet/sun/sunhme.c | 1 -
drivers/net/ethernet/sun/sunqe.c | 1 -
drivers/net/ethernet/tundra/tsi108_eth.c | 1 -
drivers/net/ethernet/xircom/xirc2ps_cs.c | 1 -
drivers/net/hamradio/6pack.c | 1 -
drivers/net/hamradio/baycom_par.c | 1 -
drivers/net/hamradio/bpqether.c | 1 -
drivers/net/hamradio/mkiss.c | 1 -
drivers/net/hamradio/scc.c | 1 -
drivers/net/hamradio/yam.c | 1 -
drivers/net/hippi/rrunner.c | 1 -
drivers/net/irda/donauboe.c | 1 -
drivers/net/loopback.c | 1 -
drivers/net/plip/plip.c | 1 -
drivers/net/slip/slhc.c | 1 -
drivers/net/slip/slip.c | 1 -
drivers/net/tokenring/3c359.c | 1 -
drivers/net/tokenring/abyss.c | 1 -
drivers/net/tokenring/ibmtr_cs.c | 1 -
drivers/net/tokenring/lanstreamer.c | 1 -
drivers/net/tokenring/madgemc.c | 1 -
drivers/net/tokenring/olympic.c | 1 -
drivers/net/tokenring/proteon.c | 1 -
drivers/net/tokenring/skisa.c | 1 -
drivers/net/tokenring/smctr.c | 1 -
drivers/net/tokenring/tms380tr.c | 1 -
drivers/net/tokenring/tmspci.c | 1 -
drivers/net/tun.c | 1 -
drivers/net/wan/dlci.c | 1 -
drivers/net/wan/dscc4.c | 1 -
drivers/net/wan/hd64570.c | 1 -
drivers/net/wan/hd64572.c | 1 -
drivers/net/wan/lapbether.c | 1 -
drivers/net/wan/sdla.c | 1 -
drivers/net/wan/x25_asy.c | 1 -
drivers/net/wireless/airo.c | 1 -
drivers/net/wireless/airo_cs.c | 1 -
drivers/net/wireless/atmel.c | 1 -
drivers/net/wireless/atmel_cs.c | 1 -
drivers/net/wireless/prism54/islpci_mgt.c | 1 -
drivers/net/wireless/ray_cs.c | 1 -
drivers/net/wireless/wl3501_cs.c | 1 -
drivers/nubus/nubus.c | 1 -
drivers/parisc/dino.c | 1 -
drivers/parisc/iosapic.c | 1 -
drivers/parisc/lba_pci.c | 1 -
drivers/pcmcia/cs.c | 1 -
drivers/pcmcia/i82092.c | 1 -
drivers/pcmcia/i82365.c | 1 -
drivers/pcmcia/m32r_cfc.c | 1 -
drivers/pcmcia/m32r_pcc.c | 1 -
drivers/pcmcia/m8xx_pcmcia.c | 1 -
drivers/pcmcia/pd6729.c | 1 -
drivers/pcmcia/pxa2xx_base.c | 1 -
drivers/pcmcia/sa11xx_base.c | 1 -
drivers/pcmcia/soc_common.c | 1 -
drivers/pcmcia/socket_sysfs.c | 1 -
drivers/pcmcia/tcic.c | 1 -
drivers/pcmcia/xxs1500_ss.c | 1 -
drivers/pnp/pnpbios/bioscalls.c | 1 -
drivers/pnp/pnpbios/core.c | 1 -
drivers/s390/crypto/ap_bus.c | 1 -
drivers/sbus/char/flash.c | 1 -
drivers/sbus/char/openprom.c | 1 -
drivers/sbus/char/uctrl.c | 1 -
drivers/scsi/53c700.c | 1 -
drivers/scsi/BusLogic.c | 1 -
drivers/scsi/advansys.c | 1 -
drivers/scsi/aha152x.c | 1 -
drivers/scsi/aha1542.c | 1 -
drivers/scsi/aha1740.c | 1 -
drivers/scsi/arcmsr/arcmsr_hba.c | 1 -
drivers/scsi/arm/acornscsi.c | 1 -
drivers/scsi/arm/cumana_1.c | 1 -
drivers/scsi/arm/oak.c | 1 -
drivers/scsi/atp870u.c | 1 -
drivers/scsi/dtc.c | 1 -
drivers/scsi/fd_mcs.c | 1 -
drivers/scsi/fdomain.c | 1 -
drivers/scsi/g_NCR5380.c | 1 -
drivers/scsi/gdth.c | 1 -
drivers/scsi/ibmmca.c | 1 -
drivers/scsi/in2000.c | 1 -
drivers/scsi/mac53c94.c | 1 -
drivers/scsi/mac_scsi.c | 1 -
drivers/scsi/mesh.c | 1 -
drivers/scsi/ncr53c8xx.c | 1 -
drivers/scsi/nsp32.c | 1 -
drivers/scsi/osst.c | 1 -
drivers/scsi/pas16.c | 1 -
drivers/scsi/qla1280.c | 1 -
drivers/scsi/qlogicpti.c | 1 -
drivers/scsi/st.c | 1 -
drivers/scsi/sun3_scsi.c | 1 -
drivers/scsi/sun3_scsi_vme.c | 1 -
drivers/scsi/sym53c416.c | 1 -
drivers/scsi/t128.c | 1 -
drivers/scsi/u14-34f.c | 1 -
drivers/scsi/ultrastor.c | 1 -
drivers/scsi/wd7000.c | 1 -
drivers/spi/spi-omap-uwire.c | 1 -
drivers/staging/comedi/drivers.c | 1 -
drivers/staging/comedi/drivers/cb_pcidas64.c | 1 -
drivers/staging/comedi/drivers/mite.c | 1 -
drivers/staging/crystalhd/crystalhd_lnx.h | 1 -
drivers/staging/crystalhd/crystalhd_misc.h | 1 -
drivers/staging/et131x/et131x.c | 1 -
drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c | 1 -
drivers/staging/media/go7007/go7007-driver.c | 1 -
drivers/staging/media/go7007/go7007-i2c.c | 1 -
drivers/staging/media/go7007/go7007-v4l2.c | 1 -
drivers/staging/media/go7007/snd-go7007.c | 1 -
drivers/staging/media/lirc/lirc_serial.c | 1 -
drivers/staging/media/lirc/lirc_sir.c | 1 -
drivers/staging/panel/panel.c | 1 -
drivers/staging/sbe-2t3e3/io.c | 1 -
.../tidspbridge/include/dspbridge/host_os.h | 1 -
drivers/staging/wlags49_h2/wl_cs.c | 1 -
drivers/staging/wlags49_h2/wl_main.c | 3 +--
drivers/staging/wlags49_h2/wl_netdev.c | 3 +--
drivers/staging/wlags49_h2/wl_pci.c | 1 -
drivers/staging/wlags49_h2/wl_util.c | 3 +--
drivers/telephony/phonedev.c | 1 -
drivers/tty/amiserial.c | 1 -
drivers/tty/isicom.c | 1 -
drivers/tty/moxa.c | 1 -
drivers/tty/mxser.c | 1 -
drivers/tty/n_hdlc.c | 1 -
drivers/tty/n_tty.c | 1 -
drivers/tty/pty.c | 1 -
drivers/tty/serial/68328serial.c | 1 -
drivers/tty/serial/8250/serial_cs.c | 1 -
drivers/tty/serial/crisv10.c | 1 -
drivers/tty/serial/dz.c | 1 -
drivers/tty/serial/icom.c | 1 -
drivers/tty/serial/msm_serial_hs.c | 1 -
drivers/tty/serial/zs.c | 1 -
drivers/tty/synclink.c | 1 -
drivers/tty/synclink_gt.c | 1 -
drivers/tty/synclinkmp.c | 1 -
drivers/tty/tty_io.c | 1 -
drivers/tty/tty_ioctl.c | 1 -
drivers/tty/vt/vt.c | 1 -
drivers/usb/gadget/amd5536udc.c | 1 -
drivers/usb/gadget/at91_udc.c | 1 -
drivers/usb/gadget/dummy_hcd.c | 1 -
drivers/usb/gadget/fsl_udc_core.c | 1 -
drivers/usb/gadget/goku_udc.c | 1 -
drivers/usb/gadget/langwell_udc.c | 1 -
drivers/usb/gadget/mv_udc_core.c | 1 -
drivers/usb/gadget/net2272.c | 1 -
drivers/usb/gadget/net2280.c | 1 -
drivers/usb/gadget/omap_udc.c | 1 -
drivers/usb/gadget/printer.c | 1 -
drivers/usb/gadget/pxa25x_udc.c | 1 -
drivers/usb/gadget/rndis.c | 1 -
drivers/usb/gadget/s3c2410_udc.c | 1 -
drivers/usb/host/ehci-hcd.c | 1 -
drivers/usb/host/isp116x-hcd.c | 1 -
drivers/usb/host/isp1362-hcd.c | 1 -
drivers/usb/host/ohci-hcd.c | 1 -
drivers/usb/host/oxu210hp-hcd.c | 1 -
drivers/usb/host/sl811-hcd.c | 1 -
drivers/usb/host/u132-hcd.c | 1 -
drivers/usb/host/uhci-hcd.c | 1 -
drivers/video/amifb.c | 1 -
drivers/video/bt431.h | 1 -
drivers/video/bt455.h | 1 -
drivers/video/console/fbcon.c | 1 -
drivers/video/console/newport_con.c | 1 -
drivers/video/cyber2000fb.c | 1 -
drivers/video/dnfb.c | 1 -
drivers/video/neofb.c | 1 -
drivers/video/pmag-ba-fb.c | 1 -
drivers/video/pmagb-b-fb.c | 1 -
drivers/video/q40fb.c | 1 -
drivers/video/savage/savagefb_driver.c | 1 -
drivers/virtio/config.c | 1 -
drivers/watchdog/advantechwdt.c | 1 -
drivers/watchdog/alim7101_wdt.c | 1 -
drivers/watchdog/booke_wdt.c | 1 -
drivers/watchdog/eurotechwdt.c | 1 -
drivers/watchdog/ib700wdt.c | 1 -
drivers/watchdog/it87_wdt.c | 1 -
drivers/watchdog/machzwd.c | 1 -
drivers/watchdog/pc87413_wdt.c | 1 -
drivers/watchdog/sbc60xxwdt.c | 1 -
drivers/watchdog/sbc7240_wdt.c | 1 -
drivers/watchdog/sbc8360.c | 1 -
drivers/watchdog/sbc_fitpc2_wdt.c | 1 -
drivers/watchdog/sc520_wdt.c | 1 -
drivers/watchdog/smsc37b787_wdt.c | 1 -
drivers/watchdog/w83627hf_wdt.c | 1 -
drivers/watchdog/w83697hf_wdt.c | 1 -
drivers/watchdog/w83697ug_wdt.c | 1 -
drivers/watchdog/w83877f_wdt.c | 1 -
drivers/watchdog/w83977f_wdt.c | 1 -
drivers/watchdog/wdt.c | 1 -
drivers/watchdog/wdt977.c | 1 -
drivers/watchdog/wdt_pci.c | 1 -
fs/binfmt_aout.c | 1 -
fs/binfmt_flat.c | 1 -
fs/coda/inode.c | 1 -
fs/coda/psdev.c | 1 -
fs/coda/upcall.c | 1 -
fs/eventpoll.c | 1 -
fs/jbd2/commit.c | 1 -
fs/jbd2/journal.c | 1 -
fs/ncpfs/file.c | 1 -
fs/ncpfs/inode.c | 1 -
fs/ncpfs/mmap.c | 1 -
fs/nfs/client.c | 1 -
fs/nfs/direct.c | 1 -
fs/nfs/file.c | 1 -
fs/nfs/getroot.c | 1 -
fs/nfs/inode.c | 1 -
fs/nfs/read.c | 1 -
fs/nfs/super.c | 1 -
fs/proc/inode.c | 1 -
fs/reiserfs/journal.c | 1 -
fs/ufs/inode.c | 1 -
fs/ufs/super.c | 1 -
fs/xfs/xfs_buf.h | 1 -
include/acpi/platform/aclinux.h | 1 -
include/asm-generic/atomic.h | 1 -
include/asm-generic/bitops/atomic.h | 1 -
include/linux/cnt32_to_63.h | 1 -
include/linux/debug_locks.h | 1 -
include/linux/efi.h | 1 -
include/linux/ide.h | 1 -
include/linux/interrupt.h | 1 -
include/linux/llist.h | 1 -
include/linux/lsm_audit.h | 1 -
include/linux/mtd/map.h | 1 -
include/linux/parport.h | 1 -
include/linux/rwsem.h | 1 -
include/linux/sched.h | 1 -
include/linux/skbuff.h | 1 -
include/linux/spinlock.h | 1 -
include/linux/stop_machine.h | 1 -
include/linux/tty.h | 1 -
include/linux/wait.h | 1 -
kernel/debug/debug_core.c | 1 -
kernel/debug/kdb/kdb_bt.c | 1 -
kernel/dma.c | 1 -
kernel/kexec.c | 1 -
kernel/rwsem.c | 1 -
kernel/sysctl.c | 1 -
lib/llist.c | 1 -
lib/raid6/altivec.uc | 1 -
net/802/fc.c | 1 -
net/802/fddi.c | 1 -
net/802/hippi.c | 1 -
net/802/tr.c | 1 -
net/ax25/af_ax25.c | 1 -
net/ax25/ax25_addr.c | 1 -
net/ax25/ax25_dev.c | 1 -
net/ax25/ax25_ds_in.c | 1 -
net/ax25/ax25_ds_subr.c | 1 -
net/ax25/ax25_ds_timer.c | 1 -
net/ax25/ax25_iface.c | 1 -
net/ax25/ax25_in.c | 1 -
net/ax25/ax25_ip.c | 1 -
net/ax25/ax25_out.c | 1 -
net/ax25/ax25_route.c | 1 -
net/ax25/ax25_std_in.c | 1 -
net/ax25/ax25_std_subr.c | 1 -
net/ax25/ax25_std_timer.c | 1 -
net/ax25/ax25_subr.c | 1 -
net/ax25/ax25_timer.c | 1 -
net/ax25/ax25_uid.c | 1 -
net/bluetooth/bnep/sock.c | 1 -
net/bluetooth/cmtp/sock.c | 1 -
net/bluetooth/hci_conn.c | 1 -
net/bluetooth/hci_core.c | 1 -
net/bluetooth/hci_event.c | 1 -
net/bluetooth/hci_sock.c | 1 -
net/bluetooth/l2cap_core.c | 1 -
net/bluetooth/rfcomm/sock.c | 1 -
net/bluetooth/sco.c | 1 -
net/core/datagram.c | 1 -
net/core/dev.c | 1 -
net/core/filter.c | 1 -
net/core/gen_estimator.c | 1 -
net/core/rtnetlink.c | 1 -
net/core/scm.c | 1 -
net/core/skbuff.c | 1 -
net/core/sock.c | 1 -
net/core/utils.c | 1 -
net/decnet/af_decnet.c | 1 -
net/decnet/dn_dev.c | 1 -
net/decnet/dn_nsp_in.c | 1 -
net/decnet/dn_nsp_out.c | 1 -
net/econet/af_econet.c | 1 -
net/ethernet/eth.c | 1 -
net/ipv4/af_inet.c | 1 -
net/ipv4/arp.c | 1 -
net/ipv4/devinet.c | 1 -
net/ipv4/fib_frontend.c | 1 -
net/ipv4/fib_semantics.c | 1 -
net/ipv4/fib_trie.c | 1 -
net/ipv4/icmp.c | 1 -
net/ipv4/igmp.c | 1 -
net/ipv4/ip_input.c | 1 -
net/ipv4/ip_output.c | 1 -
net/ipv4/ipmr.c | 1 -
net/ipv4/ping.c | 1 -
net/ipv4/route.c | 1 -
net/ipv4/udp.c | 1 -
net/ipv6/af_inet6.c | 1 -
net/ipv6/icmp.c | 1 -
net/ipv6/ip6mr.c | 1 -
net/irda/irlan/irlan_client.c | 1 -
net/irda/irlan/irlan_common.c | 1 -
net/irda/irlan/irlan_provider.c | 1 -
net/irda/timer.c | 1 -
net/lapb/lapb_iface.c | 1 -
net/lapb/lapb_in.c | 1 -
net/lapb/lapb_out.c | 1 -
net/lapb/lapb_subr.c | 1 -
net/lapb/lapb_timer.c | 1 -
net/netfilter/ipvs/ip_vs_app.c | 1 -
net/netfilter/ipvs/ip_vs_proto.c | 1 -
net/netfilter/nfnetlink.c | 1 -
net/netrom/af_netrom.c | 1 -
net/netrom/nr_dev.c | 1 -
net/netrom/nr_in.c | 1 -
net/netrom/nr_out.c | 1 -
net/netrom/nr_route.c | 1 -
net/netrom/nr_subr.c | 1 -
net/netrom/nr_timer.c | 1 -
net/openvswitch/datapath.c | 1 -
net/packet/af_packet.c | 1 -
net/rose/af_rose.c | 1 -
net/rose/rose_dev.c | 1 -
net/rose/rose_in.c | 1 -
net/rose/rose_link.c | 1 -
net/rose/rose_out.c | 1 -
net/rose/rose_route.c | 1 -
net/rose/rose_subr.c | 1 -
net/rose/rose_timer.c | 1 -
net/sunrpc/clnt.c | 1 -
security/selinux/include/avc.h | 1 -
sound/oss/os.h | 1 -
sound/oss/vidc.c | 1 -
sound/oss/waveartist.c | 1 -
sound/pci/asihpi/hpios.h | 1 -
sound/pci/aw2/aw2-saa7146.c | 1 -
1206 files changed, 3 insertions(+), 1210 deletions(-)

diff --git a/arch/alpha/boot/bootp.c b/arch/alpha/boot/bootp.c
index be61670..2a542a5 100644
--- a/arch/alpha/boot/bootp.c
+++ b/arch/alpha/boot/bootp.c
@@ -13,7 +13,6 @@
#include <generated/utsrelease.h>
#include <linux/mm.h>

-#include <asm/system.h>
#include <asm/console.h>
#include <asm/hwrpb.h>
#include <asm/pgtable.h>
diff --git a/arch/alpha/boot/bootpz.c b/arch/alpha/boot/bootpz.c
index c98865f..d6ad191 100644
--- a/arch/alpha/boot/bootpz.c
+++ b/arch/alpha/boot/bootpz.c
@@ -15,7 +15,6 @@
#include <generated/utsrelease.h>
#include <linux/mm.h>

-#include <asm/system.h>
#include <asm/console.h>
#include <asm/hwrpb.h>
#include <asm/pgtable.h>
diff --git a/arch/alpha/boot/head.S b/arch/alpha/boot/head.S
index f3d9808..b06812b 100644
--- a/arch/alpha/boot/head.S
+++ b/arch/alpha/boot/head.S
@@ -4,7 +4,6 @@
* initial bootloader stuff..
*/

-#include <asm/system.h>

.set noreorder
.globl __start
diff --git a/arch/alpha/boot/main.c b/arch/alpha/boot/main.c
index ded57d9..3baf2d1 100644
--- a/arch/alpha/boot/main.c
+++ b/arch/alpha/boot/main.c
@@ -11,7 +11,6 @@
#include <generated/utsrelease.h>
#include <linux/mm.h>

-#include <asm/system.h>
#include <asm/console.h>
#include <asm/hwrpb.h>
#include <asm/pgtable.h>
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index 640f909..bd4eabd 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -3,7 +3,6 @@

#include <linux/types.h>
#include <asm/barrier.h>
-#include <asm/system.h>

/*
* Atomic operations that C can't guarantee us. Useful for
diff --git a/arch/alpha/include/asm/core_lca.h b/arch/alpha/include/asm/core_lca.h
index f7cb4b4..69d60fe 100644
--- a/arch/alpha/include/asm/core_lca.h
+++ b/arch/alpha/include/asm/core_lca.h
@@ -1,7 +1,6 @@
#ifndef __ALPHA_LCA__H__
#define __ALPHA_LCA__H__

-#include <asm/system.h>
#include <asm/compiler.h>

/*
diff --git a/arch/alpha/include/asm/core_t2.h b/arch/alpha/include/asm/core_t2.h
index 91b4680..ade9d92 100644
--- a/arch/alpha/include/asm/core_t2.h
+++ b/arch/alpha/include/asm/core_t2.h
@@ -7,7 +7,6 @@
#include <linux/types.h>
#include <linux/spinlock.h>
#include <asm/compiler.h>
-#include <asm/system.h>

/*
* T2 is the internal name for the core logic chipset which provides
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
index 56ff965..7a3d38d 100644
--- a/arch/alpha/include/asm/io.h
+++ b/arch/alpha/include/asm/io.h
@@ -6,7 +6,6 @@
#include <linux/kernel.h>
#include <linux/mm.h>
#include <asm/compiler.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/machvec.h>
#include <asm/hwrpb.h>
diff --git a/arch/alpha/include/asm/irqflags.h b/arch/alpha/include/asm/irqflags.h
index 299bbc7..afb3be3 100644
--- a/arch/alpha/include/asm/irqflags.h
+++ b/arch/alpha/include/asm/irqflags.h
@@ -1,7 +1,6 @@
#ifndef __ALPHA_IRQFLAGS_H
#define __ALPHA_IRQFLAGS_H

-#include <asm/system.h>

#define IPL_MIN 0
#define IPL_SW0 1
diff --git a/arch/alpha/include/asm/mmu_context.h b/arch/alpha/include/asm/mmu_context.h
index 86c08a0..4c51c05 100644
--- a/arch/alpha/include/asm/mmu_context.h
+++ b/arch/alpha/include/asm/mmu_context.h
@@ -7,7 +7,6 @@
* Copyright (C) 1996, Linus Torvalds
*/

-#include <asm/system.h>
#include <asm/machvec.h>
#include <asm/compiler.h>
#include <asm-generic/mm_hooks.h>
diff --git a/arch/alpha/include/asm/spinlock.h b/arch/alpha/include/asm/spinlock.h
index d0faca1..3bba21e 100644
--- a/arch/alpha/include/asm/spinlock.h
+++ b/arch/alpha/include/asm/spinlock.h
@@ -1,7 +1,6 @@
#ifndef _ALPHA_SPINLOCK_H
#define _ALPHA_SPINLOCK_H

-#include <asm/system.h>
#include <linux/kernel.h>
#include <asm/current.h>

diff --git a/arch/alpha/kernel/head.S b/arch/alpha/kernel/head.S
index 4bdd1d2..3f6dcba 100644
--- a/arch/alpha/kernel/head.S
+++ b/arch/alpha/kernel/head.S
@@ -8,7 +8,6 @@
*/

#include <linux/init.h>
-#include <asm/system.h>
#include <asm/asm-offsets.h>

__HEAD
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 381431a..2872acc 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -26,7 +26,6 @@
#include <linux/profile.h>
#include <linux/bitops.h>

-#include <asm/system.h>
#include <asm/io.h>
#include <asm/uaccess.h>

diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 01e8715..49ee319 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -40,7 +40,6 @@
#include <asm/fpu.h>
#include <asm/io.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/sysinfo.h>
#include <asm/thread_info.h>
#include <asm/hwrpb.h>
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 89bbe5b..153d3fc 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -31,7 +31,6 @@

#include <asm/reg.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/hwrpb.h>
diff --git a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c
index e2af5eb..54616f4 100644
--- a/arch/alpha/kernel/ptrace.c
+++ b/arch/alpha/kernel/ptrace.c
@@ -16,7 +16,6 @@

#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/fpu.h>

#include "proto.h"
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c
index 32de560..9e3107cc5 100644
--- a/arch/alpha/kernel/setup.c
+++ b/arch/alpha/kernel/setup.c
@@ -55,7 +55,6 @@ static struct notifier_block alpha_panic_block = {

#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/hwrpb.h>
#include <asm/dma.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c
index 8606d77..118dc6a 100644
--- a/arch/alpha/kernel/sys_alcor.c
+++ b/arch/alpha/kernel/sys_alcor.c
@@ -18,7 +18,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c
index 1029619..4c50f8f 100644
--- a/arch/alpha/kernel/sys_cabriolet.c
+++ b/arch/alpha/kernel/sys_cabriolet.c
@@ -18,7 +18,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index bb7f0c7..1447d21 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -21,7 +21,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c
index 3c6c13c..ad40a42 100644
--- a/arch/alpha/kernel/sys_eb64p.c
+++ b/arch/alpha/kernel/sys_eb64p.c
@@ -17,7 +17,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c
index 35f480d..79d69d7 100644
--- a/arch/alpha/kernel/sys_eiger.c
+++ b/arch/alpha/kernel/sys_eiger.c
@@ -18,7 +18,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c
index 7f1a87f1..5a0af11 100644
--- a/arch/alpha/kernel/sys_jensen.c
+++ b/arch/alpha/kernel/sys_jensen.c
@@ -15,7 +15,6 @@
#include <linux/init.h>

#include <asm/ptrace.h>
-#include <asm/system.h>

#define __EXTERN_INLINE inline
#include <asm/io.h>
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 95cfc83..e8b4f6f 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -13,7 +13,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_miata.c b/arch/alpha/kernel/sys_miata.c
index 258da68..d5b9776 100644
--- a/arch/alpha/kernel/sys_miata.c
+++ b/arch/alpha/kernel/sys_miata.c
@@ -17,7 +17,6 @@
#include <linux/reboot.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c
index c0fd728..21c8ce4 100644
--- a/arch/alpha/kernel/sys_mikasa.c
+++ b/arch/alpha/kernel/sys_mikasa.c
@@ -17,7 +17,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c
index 4112200..4d4c046 100644
--- a/arch/alpha/kernel/sys_nautilus.c
+++ b/arch/alpha/kernel/sys_nautilus.c
@@ -35,7 +35,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
index 2172528..c5404a5 100644
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -18,7 +18,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c
index a125d6b..dfd510a 100644
--- a/arch/alpha/kernel/sys_rawhide.c
+++ b/arch/alpha/kernel/sys_rawhide.c
@@ -16,7 +16,6 @@
#include <linux/init.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_ruffian.c b/arch/alpha/kernel/sys_ruffian.c
index 2581cbe..a3f4852 100644
--- a/arch/alpha/kernel/sys_ruffian.c
+++ b/arch/alpha/kernel/sys_ruffian.c
@@ -18,7 +18,6 @@
#include <linux/init.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c
index b172b27..08ee737 100644
--- a/arch/alpha/kernel/sys_rx164.c
+++ b/arch/alpha/kernel/sys_rx164.c
@@ -17,7 +17,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c
index 98d1dbf..8a0aa6d 100644
--- a/arch/alpha/kernel/sys_sable.c
+++ b/arch/alpha/kernel/sys_sable.c
@@ -16,7 +16,6 @@
#include <linux/init.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_sio.c b/arch/alpha/kernel/sys_sio.c
index 47bec1e..febd24e 100644
--- a/arch/alpha/kernel/sys_sio.c
+++ b/arch/alpha/kernel/sys_sio.c
@@ -20,7 +20,6 @@

#include <asm/compiler.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_sx164.c b/arch/alpha/kernel/sys_sx164.c
index 73e1c31..2b78a15 100644
--- a/arch/alpha/kernel/sys_sx164.c
+++ b/arch/alpha/kernel/sys_sx164.c
@@ -17,7 +17,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c
index 2ae99ad..dd0f1ea 100644
--- a/arch/alpha/kernel/sys_takara.c
+++ b/arch/alpha/kernel/sys_takara.c
@@ -16,7 +16,6 @@
#include <linux/init.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index f47b30a..9de928c 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -21,7 +21,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c
index 17c85a6..ee18748 100644
--- a/arch/alpha/kernel/sys_wildfire.c
+++ b/arch/alpha/kernel/sys_wildfire.c
@@ -15,7 +15,6 @@
#include <linux/bitops.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
diff --git a/arch/alpha/lib/stacktrace.c b/arch/alpha/lib/stacktrace.c
index 6d432e4..5e83216 100644
--- a/arch/alpha/lib/stacktrace.c
+++ b/arch/alpha/lib/stacktrace.c
@@ -1,5 +1,4 @@
#include <linux/kernel.h>
-#include <asm/system.h>

typedef unsigned int instr;

diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c
index fadd5f8..5eecab1 100644
--- a/arch/alpha/mm/fault.c
+++ b/arch/alpha/mm/fault.c
@@ -24,7 +24,6 @@
#include <linux/interrupt.h>
#include <linux/module.h>

-#include <asm/system.h>
#include <asm/uaccess.h>

extern void die_if_kernel(char *,struct pt_regs *,long, unsigned long *);
diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c
index 69d0c57..69a6c21 100644
--- a/arch/alpha/mm/init.c
+++ b/arch/alpha/mm/init.c
@@ -22,7 +22,6 @@
#include <linux/vmalloc.h>
#include <linux/gfp.h>

-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
diff --git a/arch/alpha/oprofile/common.c b/arch/alpha/oprofile/common.c
index bd8ac53..a0a5d27 100644
--- a/arch/alpha/oprofile/common.c
+++ b/arch/alpha/oprofile/common.c
@@ -12,7 +12,6 @@
#include <linux/smp.h>
#include <linux/errno.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#include "op_impl.h"

diff --git a/arch/alpha/oprofile/op_model_ev4.c b/arch/alpha/oprofile/op_model_ev4.c
index 80d764d..18aa9b4 100644
--- a/arch/alpha/oprofile/op_model_ev4.c
+++ b/arch/alpha/oprofile/op_model_ev4.c
@@ -11,7 +11,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#include "op_impl.h"

diff --git a/arch/alpha/oprofile/op_model_ev5.c b/arch/alpha/oprofile/op_model_ev5.c
index ceea6e1..c32f8a0 100644
--- a/arch/alpha/oprofile/op_model_ev5.c
+++ b/arch/alpha/oprofile/op_model_ev5.c
@@ -11,7 +11,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#include "op_impl.h"

diff --git a/arch/alpha/oprofile/op_model_ev6.c b/arch/alpha/oprofile/op_model_ev6.c
index 0869f85..1c84cc2 100644
--- a/arch/alpha/oprofile/op_model_ev6.c
+++ b/arch/alpha/oprofile/op_model_ev6.c
@@ -11,7 +11,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#include "op_impl.h"

diff --git a/arch/alpha/oprofile/op_model_ev67.c b/arch/alpha/oprofile/op_model_ev67.c
index 5b9d178..34a57a1 100644
--- a/arch/alpha/oprofile/op_model_ev67.c
+++ b/arch/alpha/oprofile/op_model_ev67.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#include "op_impl.h"

diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c
index 67dd2af..1171a50 100644
--- a/arch/arm/common/via82c505.c
+++ b/arch/arm/common/via82c505.c
@@ -6,7 +6,6 @@
#include <linux/ioport.h>
#include <linux/io.h>

-#include <asm/system.h>

#include <asm/mach/pci.h>

diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 86976d0..cadb012 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -13,7 +13,6 @@

#include <linux/compiler.h>
#include <linux/types.h>
-#include <asm/system.h>

#define ATOMIC_INIT(i) { (i) }

diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index f7419ef..2c56593 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -24,7 +24,6 @@
#endif

#include <linux/compiler.h>
-#include <asm/system.h>

#define smp_mb__before_clear_bit() smp_mb()
#define smp_mb__after_clear_bit() smp_mb()
diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h
index d3f0a9e..3427f44 100644
--- a/arch/arm/include/asm/div64.h
+++ b/arch/arm/include/asm/div64.h
@@ -1,7 +1,6 @@
#ifndef __ASM_ARM_DIV64
#define __ASM_ARM_DIV64

-#include <asm/system.h>
#include <linux/types.h>

/*
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 69a5b0b..5694a0d 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -19,7 +19,6 @@
* It should not be re-used except for that purpose.
*/
#include <linux/spinlock.h>
-#include <asm/system.h>
#include <asm/scatterlist.h>

#include <mach/isa-dma.h>
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 9275828..0a34bf7 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -26,7 +26,6 @@
#include <linux/types.h>
#include <asm/byteorder.h>
#include <asm/memory.h>
-#include <asm/system.h>
#include <asm-generic/pci_iomap.h>

/*
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index cb8d638..ce280b8 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -22,7 +22,6 @@
#include <asm/hw_breakpoint.h>
#include <asm/ptrace.h>
#include <asm/types.h>
-#include <asm/system.h>

#ifdef __KERNEL__
#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 2958976..41820cf 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -16,7 +16,6 @@
#include <asm/errno.h>
#include <asm/memory.h>
#include <asm/domain.h>
-#include <asm/system.h>
#include <asm/unified.h>

#define VERIFY_READ 0
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 5b0bce6..b57c75e 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -18,7 +18,6 @@
#include <linux/io.h>

#include <asm/checksum.h>
-#include <asm/system.h>
#include <asm/ftrace.h>

/*
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index be16a48..0260594 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -24,7 +24,6 @@
#include <asm/unwind.h>
#include <asm/unistd.h>
#include <asm/tls.h>
-#include <asm/system.h>

#include "entry-header.S"
#include <asm/entry-macro-multi.S>
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 4c164ec..0b484c2 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -44,7 +44,6 @@
#include <asm/cacheflush.h>
#include <asm/fiq.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/traps.h>

static unsigned long no_fiq_insn;
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index d46f259..601d2fd 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -18,7 +18,6 @@
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>
-#include <asm/system.h>

/*
* Kernel startup entry point.
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 6d57911..4559f32 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -20,7 +20,6 @@
#include <asm/asm-offsets.h>
#include <asm/memory.h>
#include <asm/thread_info.h>
-#include <asm/system.h>
#include <asm/pgtable.h>

#ifdef CONFIG_DEBUG_LL
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index d6a95ef..ba386bd 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -34,7 +34,6 @@
#include <asm/current.h>
#include <asm/hw_breakpoint.h>
#include <asm/kdebug.h>
-#include <asm/system.h>
#include <asm/traps.h>

/* Breakpoint currently in use for each BRP. */
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 3efd82c..6a6a097 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -36,7 +36,6 @@
#include <linux/proc_fs.h>

#include <asm/exception.h>
-#include <asm/system.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 764bd45..e097865 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -12,7 +12,6 @@
#include <asm/mmu_context.h>
#include <asm/cacheflush.h>
#include <asm/mach-types.h>
-#include <asm/system.h>

extern const unsigned char relocate_new_kernel[];
extern const unsigned int relocate_new_kernel_size;
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 971d65c..784222c 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -35,7 +35,6 @@
#include <asm/cacheflush.h>
#include <asm/leds.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/thread_notify.h>
#include <asm/stacktrace.h>
#include <asm/mach/time.h>
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index ede6443..45956c9 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -26,7 +26,6 @@
#include <linux/audit.h>

#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/traps.h>

#define REG_PC 15
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index a255c39..d481833 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -44,7 +44,6 @@
#include <asm/cacheflush.h>
#include <asm/cachetype.h>
#include <asm/tlbflush.h>
-#include <asm/system.h>

#include <asm/prom.h>
#include <asm/mach/arch.h>
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 1f268bd..987dcf3 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -4,7 +4,6 @@
#include <asm/assembler.h>
#include <asm/glue-cache.h>
#include <asm/glue-proc.h>
-#include <asm/system.h>
.text

/*
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f84dfe6..11da4dd 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -29,7 +29,6 @@
#include <linux/atomic.h>
#include <asm/cacheflush.h>
#include <asm/exception.h>
-#include <asm/system.h>
#include <asm/unistd.h>
#include <asm/traps.h>
#include <asm/unwind.h>
diff --git a/arch/arm/mach-clps711x/p720t-leds.c b/arch/arm/mach-clps711x/p720t-leds.c
index 1512144..dd9a6cd 100644
--- a/arch/arm/mach-clps711x/p720t-leds.c
+++ b/arch/arm/mach-clps711x/p720t-leds.c
@@ -25,7 +25,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <asm/mach-types.h>

#include <asm/hardware/clps7111.h>
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 294aad0..e43dcc0 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -22,7 +22,6 @@
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>

#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
diff --git a/arch/arm/mach-ebsa110/leds.c b/arch/arm/mach-ebsa110/leds.c
index 6a6ea57..101a320 100644
--- a/arch/arm/mach-ebsa110/leds.c
+++ b/arch/arm/mach-ebsa110/leds.c
@@ -17,7 +17,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <asm/mach-types.h>

static spinlock_t leds_lock;
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index f685650..94a7087 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -21,7 +21,6 @@
#include <video/vga.h>

#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/mach/pci.h>
#include <asm/hardware/dec21285.h>

diff --git a/arch/arm/mach-footbridge/ebsa285-leds.c b/arch/arm/mach-footbridge/ebsa285-leds.c
index 4e10090..5bd2667 100644
--- a/arch/arm/mach-footbridge/ebsa285-leds.c
+++ b/arch/arm/mach-footbridge/ebsa285-leds.c
@@ -24,7 +24,6 @@
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
-#include <asm/system.h>

#define LED_STATE_ENABLED 1
#define LED_STATE_CLAIMED 2
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index e57102e..5a2bd89 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -24,7 +24,6 @@
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
-#include <asm/system.h>

#define LED_STATE_ENABLED 1
#define LED_STATE_CLAIMED 2
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c
index 42afc29..3189a60 100644
--- a/arch/arm/mach-imx/dma-v1.c
+++ b/arch/arm/mach-imx/dma-v1.c
@@ -32,7 +32,6 @@
#include <linux/scatterlist.h>
#include <linux/io.h>

-#include <asm/system.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/dma-v1.h>
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 019f0ab..d2fd9f3 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -27,7 +27,6 @@
#include <mach/platform.h>
#include <asm/irq.h>
#include <mach/cm.h>
-#include <asm/system.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/time.h>
diff --git a/arch/arm/mach-integrator/leds.c b/arch/arm/mach-integrator/leds.c
index 28be186..466defa 100644
--- a/arch/arm/mach-integrator/leds.c
+++ b/arch/arm/mach-integrator/leds.c
@@ -29,7 +29,6 @@
#include <mach/hardware.h>
#include <mach/platform.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <asm/mach-types.h>
#include <mach/cm.h>

diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c
index 520b6bf..36068f4 100644
--- a/arch/arm/mach-integrator/pci.c
+++ b/arch/arm/mach-integrator/pci.c
@@ -27,7 +27,6 @@
#include <linux/init.h>

#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 3c82566..9d47b4c 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -32,7 +32,6 @@
#include <mach/platform.h>
#include <asm/irq.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/mach/pci.h>
#include <asm/irq_regs.h>

diff --git a/arch/arm/mach-iop33x/uart.c b/arch/arm/mach-iop33x/uart.c
index cdae24e..bbf54d7 100644
--- a/arch/arm/mach-iop33x/uart.c
+++ b/arch/arm/mach-iop33x/uart.c
@@ -22,7 +22,6 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/memory.h>
#include <mach/hardware.h>
#include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 81c4537..f214cdf 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -32,7 +32,6 @@
#include <asm/memory.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>

diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index e872d23..4867f40 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -36,7 +36,6 @@
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index f53e911..558f5f8 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -29,7 +29,6 @@
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index a2e7c39..33c6d5f 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -29,7 +29,6 @@
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 634b6c8..910426a 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -30,7 +30,6 @@
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 7632bea..5196c39 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -34,7 +34,6 @@
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 626fda4..7e9a1f3 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -26,7 +26,6 @@
#include <linux/io.h>

#include <asm/irq.h>
-#include <asm/system.h>
#include <mach/hardware.h>

#include <asm/mach/pci.h>
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 0923bb9..ccdec42 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -34,7 +34,6 @@
#include <asm/memory.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>

diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 8f2487e..d142d45 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -32,7 +32,6 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>

diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 5d5dd3e..b0e07db 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -36,7 +36,6 @@
#include <asm/memory.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>

diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 25b5c46..bdf2866 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -28,7 +28,6 @@

#include <asm/irq.h>
#include <asm/sizes.h>
-#include <asm/system.h>
#include <asm/mach/pci.h>
#include <mach/hardware.h>

diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 377283f..eaaa3fa 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -36,7 +36,6 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>

diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 5eff15f..0f445d3 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -32,7 +32,6 @@
#include <asm/cputype.h>
#include <asm/irq.h>
#include <asm/sizes.h>
-#include <asm/system.h>
#include <asm/mach/pci.h>
#include <mach/hardware.h>

diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index c0e3d69..78ae12c 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -12,7 +12,6 @@
#include <linux/pci.h>
#include <linux/serial_8250.h>
#include <asm/mach-types.h>
-#include <asm/system.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/pci.h>
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index 97b8191..4a8ea0d 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -27,7 +27,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
-#include <asm/system.h>
#include <mach/system.h>
#include <mach/vreg.h>
#include <mach/board.h>
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index 54f91ad..32fe638 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -25,7 +25,6 @@
#include <linux/module.h>

#include <asm/proc-fns.h>
-#include <asm/system.h>

#include <mach/mxs.h>
#include <mach/common.h>
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 4b818eb..f6b14a1 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -17,7 +17,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <asm/mach-types.h>

#include <plat/fpga.h>
diff --git a/arch/arm/mach-omap1/leds-innovator.c b/arch/arm/mach-omap1/leds-innovator.c
index 9b99c28..3a066ee 100644
--- a/arch/arm/mach-omap1/leds-innovator.c
+++ b/arch/arm/mach-omap1/leds-innovator.c
@@ -5,7 +5,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include "leds.h"

diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index da09f43..936ed42 100644
--- a/arch/arm/mach-omap1/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -8,7 +8,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include "leds.h"

diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 5fdef7a..087dba0 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -27,7 +27,6 @@
#include <linux/io.h>
#include <linux/spinlock.h>

-#include <asm/system.h>

#include <plat/mux.h>

diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index b8faffa..7595e0a 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,7 +44,6 @@
#include <linux/clockchips.h>
#include <linux/io.h>

-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/irq.h>
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 9a54ef4..10bcd13 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -46,7 +46,6 @@
#include <linux/clockchips.h>
#include <linux/io.h>

-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/irq.h>
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 611a0e3..e974d33 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -35,7 +35,6 @@
#include <linux/irq.h>
#include <linux/interrupt.h>

-#include <asm/system.h>

#include <plat/omap_hwmod.h>

diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 1d5d010..069f8fc 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -46,7 +46,6 @@
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/smp_scu.h>
-#include <asm/system.h>
#include <asm/pgalloc.h>
#include <asm/suspend.h>
#include <asm/hardware/cache-l2x0.h>
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index abd2834..9f6b83d 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -10,7 +10,6 @@
*/

#include <linux/linkage.h>
-#include <asm/system.h>
#include <asm/smp_scu.h>
#include <asm/memory.h>
#include <asm/hardware/cache-l2x0.h>
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 5272131..0c9e413 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -22,7 +22,6 @@
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/system.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index 9a8697b..c1b5d8a 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -21,7 +21,6 @@
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/system.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 09c7365..949eaa8 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -21,7 +21,6 @@
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/system.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index 4cfb40b..977538f 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -32,7 +32,6 @@
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index 7fa4bf2..a4739e9 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -24,7 +24,6 @@
#include <linux/io.h>
#include <linux/gfp.h>

-#include <asm/system.h>
#include <mach/hardware.h>
#include <mach/dma.h>
#include <asm/dma-mapping.h>
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index 7608c7a..41e4201 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -28,7 +28,6 @@
#include <asm/setup.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
index 0c8aad4..0cfe8af 100644
--- a/arch/arm/mach-pnx4008/time.c
+++ b/arch/arm/mach-pnx4008/time.c
@@ -24,7 +24,6 @@
#include <linux/irq.h>
#include <linux/io.h>

-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/mach/time.h>
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 11f1e73..de9d45e 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -40,7 +40,6 @@
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/system.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 5432ecb..4225417 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -22,7 +22,6 @@
#include <linux/init.h>

#include <mach/hardware.h>
-#include <asm/system.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>

diff --git a/arch/arm/mach-pxa/leds-idp.c b/arch/arm/mach-pxa/leds-idp.c
index 8b9c171..06b0600 100644
--- a/arch/arm/mach-pxa/leds-idp.c
+++ b/arch/arm/mach-pxa/leds-idp.c
@@ -16,7 +16,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include <mach/pxa25x.h>
#include <mach/idp.h>
diff --git a/arch/arm/mach-pxa/leds-lubbock.c b/arch/arm/mach-pxa/leds-lubbock.c
index e26d5ef..0bd85c8 100644
--- a/arch/arm/mach-pxa/leds-lubbock.c
+++ b/arch/arm/mach-pxa/leds-lubbock.c
@@ -15,7 +15,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <mach/pxa25x.h>
#include <mach/lubbock.h>

diff --git a/arch/arm/mach-pxa/leds-mainstone.c b/arch/arm/mach-pxa/leds-mainstone.c
index db4af5e..4058ab3 100644
--- a/arch/arm/mach-pxa/leds-mainstone.c
+++ b/arch/arm/mach-pxa/leds-mainstone.c
@@ -14,7 +14,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include <mach/pxa27x.h>
#include <mach/mainstone.h>
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 744baee..89d98c8 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -34,7 +34,6 @@
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/setup.h>
-#include <asm/system.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index acd329a..45868bb 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -33,7 +33,6 @@
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>

-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/leds.h>
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index ad66035..56e1333 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -16,7 +16,6 @@
#include <linux/spinlock.h>
#include <linux/errno.h>

-#include <asm/system.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/dma.h>
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index bb10ee2..17caece 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -21,7 +21,6 @@

#include <asm/div64.h>
#include <mach/hardware.h>
-#include <asm/system.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/irq.h>
diff --git a/arch/arm/mach-sa1100/leds-assabet.c b/arch/arm/mach-sa1100/leds-assabet.c
index 64e9b4b..3699176 100644
--- a/arch/arm/mach-sa1100/leds-assabet.c
+++ b/arch/arm/mach-sa1100/leds-assabet.c
@@ -13,7 +13,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <mach/assabet.h>

#include "leds.h"
diff --git a/arch/arm/mach-sa1100/leds-badge4.c b/arch/arm/mach-sa1100/leds-badge4.c
index cf1e384..f99fac3 100644
--- a/arch/arm/mach-sa1100/leds-badge4.c
+++ b/arch/arm/mach-sa1100/leds-badge4.c
@@ -14,7 +14,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include "leds.h"

diff --git a/arch/arm/mach-sa1100/leds-cerf.c b/arch/arm/mach-sa1100/leds-cerf.c
index 259b48e..040540f 100644
--- a/arch/arm/mach-sa1100/leds-cerf.c
+++ b/arch/arm/mach-sa1100/leds-cerf.c
@@ -7,7 +7,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include "leds.h"

diff --git a/arch/arm/mach-sa1100/leds-hackkit.c b/arch/arm/mach-sa1100/leds-hackkit.c
index 2bce137..6a23524 100644
--- a/arch/arm/mach-sa1100/leds-hackkit.c
+++ b/arch/arm/mach-sa1100/leds-hackkit.c
@@ -13,7 +13,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include "leds.h"

diff --git a/arch/arm/mach-sa1100/leds-lart.c b/arch/arm/mach-sa1100/leds-lart.c
index 0505a1f..a51830c 100644
--- a/arch/arm/mach-sa1100/leds-lart.c
+++ b/arch/arm/mach-sa1100/leds-lart.c
@@ -13,7 +13,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>

#include "leds.h"

diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index bf85b8b..2fa499e 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -30,7 +30,6 @@
#include <mach/hardware.h>
#include <asm/memory.h>
#include <asm/suspend.h>
-#include <asm/system.h>
#include <asm/mach/time.h>

extern int sa1100_finish_suspend(unsigned long);
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c
index ccd4918..2560907 100644
--- a/arch/arm/mach-shark/leds.c
+++ b/arch/arm/mach-shark/leds.c
@@ -23,7 +23,6 @@
#include <linux/io.h>

#include <asm/leds.h>
-#include <asm/system.h>

#define LED_STATE_ENABLED 1
#define LED_STATE_CLAIMED 2
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 1b23342..21b09b6 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -13,7 +13,6 @@
#include <linux/suspend.h>
#include <linux/module.h>
#include <linux/err.h>
-#include <asm/system.h>
#include <asm/io.h>

static void shmobile_enter_wfi(void)
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c
index c38ba7b..a18a4ae 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -18,7 +18,6 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/console.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <mach/common.h>
#include <mach/r8a7779.h>
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index fcf8b17..a3bdb12 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -21,7 +21,6 @@
#include <linux/irq.h>
#include <linux/bitrev.h>
#include <linux/console.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/tlbflush.h>
#include <asm/suspend.h>
diff --git a/arch/arm/mach-shmobile/suspend.c b/arch/arm/mach-shmobile/suspend.c
index c1febe1..12d760c 100644
--- a/arch/arm/mach-shmobile/suspend.c
+++ b/arch/arm/mach-shmobile/suspend.c
@@ -12,7 +12,6 @@
#include <linux/suspend.h>
#include <linux/module.h>
#include <linux/err.h>
-#include <asm/system.h>
#include <asm/io.h>

static int shmobile_suspend_default_enter(suspend_state_t suspend_state)
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index bb5ce39..7a065f0 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -30,7 +30,6 @@
#include <linux/io.h>
#include <linux/suspend.h>

-#include <asm/system.h>

#include <mach/clk.h>

diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 02b7b93..f0932b5 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -36,7 +36,6 @@
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>

-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/hardware/arm_timer.h>
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 90069bc..787cf5f 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -24,7 +24,6 @@

#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/mach/pci.h>

/*
diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c
index 3034a4d..e352494 100644
--- a/arch/arm/mach-vexpress/hotplug.c
+++ b/arch/arm/mach-vexpress/hotplug.c
@@ -14,7 +14,6 @@

#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
-#include <asm/system.h>

extern volatile int pen_release;

diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index caf14dc..193cadf 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -22,7 +22,6 @@
#include <linux/sched.h>
#include <linux/uaccess.h>

-#include <asm/system.h>
#include <asm/unaligned.h>

#include "fault.h"
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c
index 5a32020..c4ae2b4 100644
--- a/arch/arm/mm/cache-xsc3l2.c
+++ b/arch/arm/mm/cache-xsc3l2.c
@@ -18,7 +18,6 @@
*/
#include <linux/init.h>
#include <linux/highmem.h>
-#include <asm/system.h>
#include <asm/cputype.h>
#include <asm/cacheflush.h>

diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index bb7eac3..699522c 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -21,7 +21,6 @@
#include <linux/perf_event.h>

#include <asm/exception.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>

diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 1a8d4aa..062d61a 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -16,7 +16,6 @@
#include <asm/cachetype.h>
#include <asm/highmem.h>
#include <asm/smp_plat.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>

#include "mm.h"
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index 272558a..d217e97 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -22,7 +22,6 @@
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#include "proc-macros.S"

diff --git a/arch/arm/nwfpe/fpa11.c b/arch/arm/nwfpe/fpa11.c
index cc60acd..2782ebc 100644
--- a/arch/arm/nwfpe/fpa11.c
+++ b/arch/arm/nwfpe/fpa11.c
@@ -28,7 +28,6 @@

#include <linux/compiler.h>
#include <linux/string.h>
-#include <asm/system.h>

/* Reset the FPA11 chip. Called to initialize and reset the emulator. */
static void resetFPA11(void)
diff --git a/arch/arm/plat-iop/i2c.c b/arch/arm/plat-iop/i2c.c
index 4efe392..88215ad 100644
--- a/arch/arm/plat-iop/i2c.c
+++ b/arch/arm/plat-iop/i2c.c
@@ -23,7 +23,6 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/memory.h>
#include <mach/hardware.h>
#include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index f4d40a2..bb26981 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -20,7 +20,6 @@
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/mach/pci.h>
#include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 3599bf2..8f12074 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -26,7 +26,6 @@
#include <mach/hardware.h>
#include <mach/common.h>
#include <asm/proc-fns.h>
-#include <asm/system.h>
#include <asm/mach-types.h>

void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 61a1ec2..39407cb 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -15,7 +15,6 @@

#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/system.h>
#include <asm/mach-types.h>

#include <plat/fpga.h>
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 002fb4d..dbb1049 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,7 +36,6 @@
#include <linux/slab.h>
#include <linux/delay.h>

-#include <asm/system.h>
#include <mach/hardware.h>
#include <plat/dma.h>

diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 0d4aa0d..976fc80 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -26,7 +26,6 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
-#include <asm/system.h>
#include <linux/spinlock.h>
#include <plat/mux.h>

diff --git a/arch/arm/plat-pxa/dma.c b/arch/arm/plat-pxa/dma.c
index 2d3c19d..79ef102 100644
--- a/arch/arm/plat-pxa/dma.c
+++ b/arch/arm/plat-pxa/dma.c
@@ -20,7 +20,6 @@
#include <linux/errno.h>
#include <linux/dma-mapping.h>

-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/memory.h>
#include <mach/hardware.h>
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 9fe3534..c57e1e8 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -27,7 +27,6 @@
#include <linux/errno.h>
#include <linux/io.h>

-#include <asm/system.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/dma.h>
diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c
index 81c06d4..46b426e 100644
--- a/arch/arm/plat-samsung/cpu.c
+++ b/arch/arm/plat-samsung/cpu.c
@@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/io.h>

-#include <asm/system.h>

#include <mach/map.h>
#include <plat/cpu.h>
diff --git a/arch/arm/plat-samsung/time.c b/arch/arm/plat-samsung/time.c
index e3bb806..4dcb11c 100644
--- a/arch/arm/plat-samsung/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -28,7 +28,6 @@
#include <linux/io.h>
#include <linux/platform_device.h>

-#include <asm/system.h>
#include <asm/leds.h>
#include <asm/mach-types.h>

diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
index e0ac263..2fc18fe 100644
--- a/arch/avr32/include/asm/atomic.h
+++ b/arch/avr32/include/asm/atomic.h
@@ -15,7 +15,6 @@
#define __ASM_AVR32_ATOMIC_H

#include <linux/types.h>
-#include <asm/system.h>

#define ATOMIC_INIT(i) { (i) }

diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h
index b70c19b..ebe7ad3 100644
--- a/arch/avr32/include/asm/bitops.h
+++ b/arch/avr32/include/asm/bitops.h
@@ -13,7 +13,6 @@
#endif

#include <asm/byteorder.h>
-#include <asm/system.h>

/*
* clear_bit() doesn't provide any barrier for the compiler
diff --git a/arch/avr32/mach-at32ap/cpufreq.c b/arch/avr32/mach-at32ap/cpufreq.c
index 6277433..18b7656 100644
--- a/arch/avr32/mach-at32ap/cpufreq.c
+++ b/arch/avr32/mach-at32ap/cpufreq.c
@@ -19,7 +19,6 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/export.h>
-#include <asm/system.h>

static struct clk *cpuclk;

diff --git a/arch/avr32/oprofile/op_model_avr32.c b/arch/avr32/oprofile/op_model_avr32.c
index a3e9b3c..f74b780 100644
--- a/arch/avr32/oprofile/op_model_avr32.c
+++ b/arch/avr32/oprofile/op_model_avr32.c
@@ -17,7 +17,6 @@
#include <linux/types.h>

#include <asm/sysreg.h>
-#include <asm/system.h>

#define AVR32_PERFCTR_IRQ_GROUP 0
#define AVR32_PERFCTR_IRQ_LINE 1
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index dbe1122..f657b38 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -31,7 +31,6 @@
#include <linux/kthread.h>
#include <linux/unistd.h>
#include <linux/io.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/irq_handler.h>

diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c
index 4a7dcfe..18ab004 100644
--- a/arch/blackfin/kernel/kgdb_test.c
+++ b/arch/blackfin/kernel/kgdb_test.c
@@ -13,7 +13,6 @@

#include <asm/current.h>
#include <asm/uaccess.h>
-#include <asm/system.h>

#include <asm/blackfin.h>

diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 75089f8..e1f88e0 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -20,7 +20,6 @@

#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/asm-offsets.h>
#include <asm/dma.h>
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index c4c0081..b0434f8 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -9,7 +9,6 @@
#include <linux/interrupt.h>
#include <asm/bfin-global.h>
#include <asm/reboot.h>
-#include <asm/system.h>
#include <asm/bfrom.h>

/* A system soft reset makes external memory unusable so force
diff --git a/arch/c6x/include/asm/bitops.h b/arch/c6x/include/asm/bitops.h
index 39ab7e8..0bec7e5 100644
--- a/arch/c6x/include/asm/bitops.h
+++ b/arch/c6x/include/asm/bitops.h
@@ -15,7 +15,6 @@

#include <linux/bitops.h>

-#include <asm/system.h>
#include <asm/byteorder.h>

/*
diff --git a/arch/c6x/kernel/soc.c b/arch/c6x/kernel/soc.c
index dd45bc3..0748c94 100644
--- a/arch/c6x/kernel/soc.c
+++ b/arch/c6x/kernel/soc.c
@@ -11,7 +11,6 @@
#include <linux/module.h>
#include <linux/ctype.h>
#include <linux/etherdevice.h>
-#include <asm/system.h>
#include <asm/setup.h>
#include <asm/soc.h>

diff --git a/arch/cris/arch-v10/drivers/ds1302.c b/arch/cris/arch-v10/drivers/ds1302.c
index 3d655dc..74f99c6 100644
--- a/arch/cris/arch-v10/drivers/ds1302.c
+++ b/arch/cris/arch-v10/drivers/ds1302.c
@@ -24,7 +24,6 @@
#include <linux/capability.h>

#include <asm/uaccess.h>
-#include <asm/system.h>
#include <arch/svinto.h>
#include <asm/io.h>
#include <asm/rtc.h>
diff --git a/arch/cris/arch-v10/drivers/gpio.c b/arch/cris/arch-v10/drivers/gpio.c
index a276f08..609d551 100644
--- a/arch/cris/arch-v10/drivers/gpio.c
+++ b/arch/cris/arch-v10/drivers/gpio.c
@@ -24,7 +24,6 @@
#include <asm/etraxgpio.h>
#include <arch/svinto.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/irq.h>
#include <arch/io_interface_mux.h>

diff --git a/arch/cris/arch-v10/drivers/i2c.c b/arch/cris/arch-v10/drivers/i2c.c
index c413539..b3d1f9e 100644
--- a/arch/cris/arch-v10/drivers/i2c.c
+++ b/arch/cris/arch-v10/drivers/i2c.c
@@ -22,7 +22,6 @@

#include <asm/etraxi2c.h>

-#include <asm/system.h>
#include <arch/svinto.h>
#include <asm/io.h>
#include <asm/delay.h>
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
index 1391b73..9da0568 100644
--- a/arch/cris/arch-v10/drivers/pcf8563.c
+++ b/arch/cris/arch-v10/drivers/pcf8563.c
@@ -29,7 +29,6 @@
#include <linux/mutex.h>

#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/rtc.h>

diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c
index 466af40..c4b7171 100644
--- a/arch/cris/arch-v10/drivers/sync_serial.c
+++ b/arch/cris/arch-v10/drivers/sync_serial.c
@@ -27,7 +27,6 @@
#include <asm/io.h>
#include <arch/svinto.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/sync_serial.h>
#include <arch/io_interface_mux.h>

diff --git a/arch/cris/arch-v10/kernel/debugport.c b/arch/cris/arch-v10/kernel/debugport.c
index 99851ba..f932c85 100644
--- a/arch/cris/arch-v10/kernel/debugport.c
+++ b/arch/cris/arch-v10/kernel/debugport.c
@@ -18,7 +18,6 @@
#include <linux/major.h>
#include <linux/delay.h>
#include <linux/tty.h>
-#include <asm/system.h>
#include <arch/svinto.h>
#include <asm/io.h> /* Get SIMCOUT. */

diff --git a/arch/cris/arch-v10/kernel/ptrace.c b/arch/cris/arch-v10/kernel/ptrace.c
index 320065f..bfddfb9 100644
--- a/arch/cris/arch-v10/kernel/ptrace.c
+++ b/arch/cris/arch-v10/kernel/ptrace.c
@@ -15,7 +15,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>

/*
diff --git a/arch/cris/arch-v32/drivers/i2c.c b/arch/cris/arch-v32/drivers/i2c.c
index ddb2399..3b2c82c 100644
--- a/arch/cris/arch-v32/drivers/i2c.c
+++ b/arch/cris/arch-v32/drivers/i2c.c
@@ -36,7 +36,6 @@

#include <asm/etraxi2c.h>

-#include <asm/system.h>
#include <asm/io.h>
#include <asm/delay.h>

diff --git a/arch/cris/arch-v32/drivers/mach-a3/gpio.c b/arch/cris/arch-v32/drivers/mach-a3/gpio.c
index c845831..0b86dee 100644
--- a/arch/cris/arch-v32/drivers/mach-a3/gpio.c
+++ b/arch/cris/arch-v32/drivers/mach-a3/gpio.c
@@ -31,7 +31,6 @@
#include <hwregs/gio_defs.h>
#include <hwregs/intr_vect_defs.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/irq.h>
#include <mach/pinmux.h>

diff --git a/arch/cris/arch-v32/drivers/mach-fs/gpio.c b/arch/cris/arch-v32/drivers/mach-fs/gpio.c
index ee90d26..a2ac091 100644
--- a/arch/cris/arch-v32/drivers/mach-fs/gpio.c
+++ b/arch/cris/arch-v32/drivers/mach-fs/gpio.c
@@ -30,7 +30,6 @@
#include <hwregs/gio_defs.h>
#include <hwregs/intr_vect_defs.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/irq.h>

#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
diff --git a/arch/cris/arch-v32/kernel/debugport.c b/arch/cris/arch-v32/kernel/debugport.c
index 794b364..610909b 100644
--- a/arch/cris/arch-v32/kernel/debugport.c
+++ b/arch/cris/arch-v32/kernel/debugport.c
@@ -4,7 +4,6 @@

#include <linux/console.h>
#include <linux/init.h>
-#include <asm/system.h>
#include <hwregs/reg_rdwr.h>
#include <hwregs/reg_map.h>
#include <hwregs/ser_defs.h>
diff --git a/arch/cris/arch-v32/kernel/fasttimer.c b/arch/cris/arch-v32/kernel/fasttimer.c
index 111caa1..ab1551e 100644
--- a/arch/cris/arch-v32/kernel/fasttimer.c
+++ b/arch/cris/arch-v32/kernel/fasttimer.c
@@ -17,7 +17,6 @@
#include <linux/delay.h>

#include <asm/irq.h>
-#include <asm/system.h>

#include <hwregs/reg_map.h>
#include <hwregs/reg_rdwr.h>
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
index 511ece9..f7ad9e8 100644
--- a/arch/cris/arch-v32/kernel/ptrace.c
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -15,7 +15,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <arch/hwregs/supp_reg.h>

diff --git a/arch/cris/arch-v32/mach-a3/dma.c b/arch/cris/arch-v32/mach-a3/dma.c
index f35e4f6..47c64bf 100644
--- a/arch/cris/arch-v32/mach-a3/dma.c
+++ b/arch/cris/arch-v32/mach-a3/dma.c
@@ -9,7 +9,6 @@
#include <hwregs/clkgen_defs.h>
#include <hwregs/strmux_defs.h>
#include <linux/errno.h>
-#include <asm/system.h>
#include <arbiter.h>

static char used_dma_channels[MAX_DMA_CHANNELS];
diff --git a/arch/cris/arch-v32/mach-fs/dma.c b/arch/cris/arch-v32/mach-fs/dma.c
index 2d970d7..fc6416a 100644
--- a/arch/cris/arch-v32/mach-fs/dma.c
+++ b/arch/cris/arch-v32/mach-fs/dma.c
@@ -9,7 +9,6 @@
#include <hwregs/config_defs.h>
#include <hwregs/strmux_defs.h>
#include <linux/errno.h>
-#include <asm/system.h>
#include <mach/arbiter.h>

static char used_dma_channels[MAX_DMA_CHANNELS];
diff --git a/arch/cris/include/asm/atomic.h b/arch/cris/include/asm/atomic.h
index bbf0938..62760f8 100644
--- a/arch/cris/include/asm/atomic.h
+++ b/arch/cris/include/asm/atomic.h
@@ -5,7 +5,6 @@

#include <linux/compiler.h>
#include <linux/types.h>
-#include <asm/system.h>
#include <arch/atomic.h>

/*
diff --git a/arch/cris/include/asm/bitops.h b/arch/cris/include/asm/bitops.h
index a78a2d7..184066c 100644
--- a/arch/cris/include/asm/bitops.h
+++ b/arch/cris/include/asm/bitops.h
@@ -19,7 +19,6 @@
#endif

#include <arch/bitops.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <linux/compiler.h>

diff --git a/arch/cris/include/asm/processor.h b/arch/cris/include/asm/processor.h
index 3f7248f..b43c9bb 100644
--- a/arch/cris/include/asm/processor.h
+++ b/arch/cris/include/asm/processor.h
@@ -10,7 +10,6 @@
#ifndef __ASM_CRIS_PROCESSOR_H
#define __ASM_CRIS_PROCESSOR_H

-#include <asm/system.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <arch/processor.h>
diff --git a/arch/cris/kernel/process.c b/arch/cris/kernel/process.c
index aa585e4..41a973b 100644
--- a/arch/cris/kernel/process.c
+++ b/arch/cris/kernel/process.c
@@ -16,7 +16,6 @@
#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/init_task.h>
diff --git a/arch/cris/kernel/ptrace.c b/arch/cris/kernel/ptrace.c
index 48b0f39..d114ad3 100644
--- a/arch/cris/kernel/ptrace.c
+++ b/arch/cris/kernel/ptrace.c
@@ -21,7 +21,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>


diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h
index 0d8a7d6..9491575 100644
--- a/arch/frv/include/asm/atomic.h
+++ b/arch/frv/include/asm/atomic.h
@@ -16,7 +16,6 @@

#include <linux/types.h>
#include <asm/spr-regs.h>
-#include <asm/system.h>

#ifdef CONFIG_SMP
#error not SMP safe
diff --git a/arch/frv/kernel/debug-stub.c b/arch/frv/kernel/debug-stub.c
index 2845139..a0228f7 100644
--- a/arch/frv/kernel/debug-stub.c
+++ b/arch/frv/kernel/debug-stub.c
@@ -17,7 +17,6 @@
#include <linux/serial_reg.h>
#include <linux/start_kernel.h>

-#include <asm/system.h>
#include <asm/serial-regs.h>
#include <asm/timer-regs.h>
#include <asm/irc-regs.h>
diff --git a/arch/frv/kernel/gdb-io.c b/arch/frv/kernel/gdb-io.c
index 2ca641d..0707d35 100644
--- a/arch/frv/kernel/gdb-io.c
+++ b/arch/frv/kernel/gdb-io.c
@@ -19,7 +19,6 @@
#include <linux/serial_reg.h>

#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/irc-regs.h>
#include <asm/timer-regs.h>
#include <asm/gdb-stub.h>
diff --git a/arch/frv/kernel/gdb-stub.c b/arch/frv/kernel/gdb-stub.c
index a6d5381..bbe78b0 100644
--- a/arch/frv/kernel/gdb-stub.c
+++ b/arch/frv/kernel/gdb-stub.c
@@ -126,7 +126,6 @@

#include <asm/asm-offsets.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/gdb-stub.h>

#define LEDS(x) do { /* *(u32*)0xe1200004 = ~(x); mb(); */ } while(0)
diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c
index 9afc2ea..2cc327a 100644
--- a/arch/frv/kernel/irq-mb93091.c
+++ b/arch/frv/kernel/irq-mb93091.c
@@ -20,7 +20,6 @@
#include <linux/bitops.h>

#include <asm/io.h>
-#include <asm/system.h>
#include <asm/delay.h>
#include <asm/irq.h>
#include <asm/irc-regs.h>
diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c
index 4d4ad09..95e4eb4 100644
--- a/arch/frv/kernel/irq-mb93093.c
+++ b/arch/frv/kernel/irq-mb93093.c
@@ -20,7 +20,6 @@
#include <linux/bitops.h>

#include <asm/io.h>
-#include <asm/system.h>
#include <asm/delay.h>
#include <asm/irq.h>
#include <asm/irc-regs.h>
diff --git a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c
index 4d034c7..ba648da 100644
--- a/arch/frv/kernel/irq-mb93493.c
+++ b/arch/frv/kernel/irq-mb93493.c
@@ -20,7 +20,6 @@
#include <linux/bitops.h>

#include <asm/io.h>
-#include <asm/system.h>
#include <asm/delay.h>
#include <asm/irq.h>
#include <asm/irc-regs.h>
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 3facbc2..2239346 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -28,7 +28,6 @@
#include <linux/atomic.h>
#include <asm/io.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
#include <asm/delay.h>
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c
index 3901df1..8b6df6f 100644
--- a/arch/frv/kernel/process.c
+++ b/arch/frv/kernel/process.c
@@ -28,7 +28,6 @@

#include <asm/asm-offsets.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/setup.h>
#include <asm/pgtable.h>
#include <asm/tlb.h>
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c
index 9d68f7f..3987ff8 100644
--- a/arch/frv/kernel/ptrace.c
+++ b/arch/frv/kernel/ptrace.c
@@ -26,7 +26,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/unistd.h>

diff --git a/arch/frv/kernel/traps.c b/arch/frv/kernel/traps.c
index 1d2dfe6..5cfd142 100644
--- a/arch/frv/kernel/traps.c
+++ b/arch/frv/kernel/traps.c
@@ -23,7 +23,6 @@
#include <asm/asm-offsets.h>
#include <asm/setup.h>
#include <asm/fpu.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/siginfo.h>
diff --git a/arch/frv/mm/fault.c b/arch/frv/mm/fault.c
index a325d57..331c1e2 100644
--- a/arch/frv/mm/fault.c
+++ b/arch/frv/mm/fault.c
@@ -20,7 +20,6 @@
#include <linux/ptrace.h>
#include <linux/hardirq.h>

-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/gdb-stub.h>
diff --git a/arch/frv/mm/init.c b/arch/frv/mm/init.c
index fbe5f0d..a19effc 100644
--- a/arch/frv/mm/init.c
+++ b/arch/frv/mm/init.c
@@ -33,7 +33,6 @@
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/virtconvert.h>
#include <asm/sections.h>
diff --git a/arch/frv/mm/kmap.c b/arch/frv/mm/kmap.c
index fb78be3..e9217e6 100644
--- a/arch/frv/mm/kmap.c
+++ b/arch/frv/mm/kmap.c
@@ -21,7 +21,6 @@
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/io.h>
-#include <asm/system.h>

#undef DEBUG

diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index f5a38c1..fbc8517 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -13,7 +13,6 @@
#define atomic_read(v) (*(volatile int *)&(v)->counter)
#define atomic_set(v, i) (((v)->counter) = i)

-#include <asm/system.h>
#include <linux/kernel.h>

static __inline__ int atomic_add_return(int i, atomic_t *v)
diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h
index e856c1b..eb34e0c 100644
--- a/arch/h8300/include/asm/bitops.h
+++ b/arch/h8300/include/asm/bitops.h
@@ -7,7 +7,6 @@
*/

#include <linux/compiler.h>
-#include <asm/system.h>

#ifdef __KERNEL__

diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index 1f67fed..2fa8ac7 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -16,7 +16,6 @@
#include <linux/irq.h>
#include <linux/interrupt.h>

-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/io.h>
#include <asm/setup.h>
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index 933bd38..c5d0ba9 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -38,7 +38,6 @@
#include <linux/slab.h>

#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/setup.h>
#include <asm/pgtable.h>
diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
index 497fa89..748cf65 100644
--- a/arch/h8300/kernel/ptrace.c
+++ b/arch/h8300/kernel/ptrace.c
@@ -27,7 +27,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/signal.h>

diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c
index dfa05bd..7833aa3 100644
--- a/arch/h8300/kernel/traps.c
+++ b/arch/h8300/kernel/traps.c
@@ -22,7 +22,6 @@
#include <linux/module.h>
#include <linux/bug.h>

-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/page.h>
diff --git a/arch/h8300/mm/fault.c b/arch/h8300/mm/fault.c
index 1d092ab..4725359 100644
--- a/arch/h8300/mm/fault.c
+++ b/arch/h8300/mm/fault.c
@@ -17,7 +17,6 @@
#include <linux/kernel.h>
#include <linux/ptrace.h>

-#include <asm/system.h>
#include <asm/pgtable.h>

/*
diff --git a/arch/h8300/mm/init.c b/arch/h8300/mm/init.c
index 7cc3380..973369c 100644
--- a/arch/h8300/mm/init.c
+++ b/arch/h8300/mm/init.c
@@ -36,7 +36,6 @@
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>

#undef DEBUG

diff --git a/arch/h8300/mm/kmap.c b/arch/h8300/mm/kmap.c
index 944a502..f79edcd 100644
--- a/arch/h8300/mm/kmap.c
+++ b/arch/h8300/mm/kmap.c
@@ -19,7 +19,6 @@
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/io.h>
-#include <asm/system.h>

#undef DEBUG

diff --git a/arch/h8300/mm/memory.c b/arch/h8300/mm/memory.c
index 5552ddf..06e3646 100644
--- a/arch/h8300/mm/memory.c
+++ b/arch/h8300/mm/memory.c
@@ -26,7 +26,6 @@
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/io.h>

diff --git a/arch/hexagon/include/asm/bitops.h b/arch/hexagon/include/asm/bitops.h
index d23461e..4caa649 100644
--- a/arch/hexagon/include/asm/bitops.h
+++ b/arch/hexagon/include/asm/bitops.h
@@ -24,7 +24,6 @@

#include <linux/compiler.h>
#include <asm/byteorder.h>
-#include <asm/system.h>
#include <asm/atomic.h>

#ifdef __KERNEL__
diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c
index bea3f08..32342de 100644
--- a/arch/hexagon/kernel/ptrace.c
+++ b/arch/hexagon/kernel/ptrace.c
@@ -29,7 +29,6 @@
#include <linux/regset.h>
#include <linux/user.h>

-#include <asm/system.h>
#include <asm/user.h>

static int genregs_get(struct task_struct *target,
diff --git a/arch/hexagon/kernel/vm_events.c b/arch/hexagon/kernel/vm_events.c
index 986a081..591fc1b 100644
--- a/arch/hexagon/kernel/vm_events.c
+++ b/arch/hexagon/kernel/vm_events.c
@@ -22,7 +22,6 @@
#include <asm/registers.h>
#include <linux/irq.h>
#include <linux/hardirq.h>
-#include <asm/system.h>

/*
* show_regs - print pt_regs structure
diff --git a/arch/ia64/dig/setup.c b/arch/ia64/dig/setup.c
index 9196b33..cdce2e2 100644
--- a/arch/ia64/dig/setup.c
+++ b/arch/ia64/dig/setup.c
@@ -22,7 +22,6 @@

#include <asm/io.h>
#include <asm/machvec.h>
-#include <asm/system.h>

void __init
dig_setup (char **cmdline_p)
diff --git a/arch/ia64/hp/sim/boot/bootloader.c b/arch/ia64/hp/sim/boot/bootloader.c
index c5e9baa..28f4b23 100644
--- a/arch/ia64/hp/sim/boot/bootloader.c
+++ b/arch/ia64/hp/sim/boot/bootloader.c
@@ -20,7 +20,6 @@ struct task_struct; /* forward declaration for elf.h */
#include <asm/pal.h>
#include <asm/pgtable.h>
#include <asm/sal.h>
-#include <asm/system.h>

#include "ssc.h"

diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index 47afcc6..be8ddc5 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -20,7 +20,6 @@
#include <linux/skbuff.h>
#include <linux/notifier.h>
#include <linux/bitops.h>
-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/hpsim.h>

diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index a06dfb1..301609c 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -32,7 +32,6 @@

#include <linux/init.h>
#include <linux/numa.h>
-#include <asm/system.h>
#include <asm/numa.h>

#define COMPILER_DEPENDENT_INT64 long
diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h
index 3fad89e..7d91166 100644
--- a/arch/ia64/include/asm/atomic.h
+++ b/arch/ia64/include/asm/atomic.h
@@ -15,7 +15,6 @@
#include <linux/types.h>

#include <asm/intrinsics.h>
-#include <asm/system.h>


#define ATOMIC_INIT(i) ((atomic_t) { (i) })
diff --git a/arch/ia64/include/asm/futex.h b/arch/ia64/include/asm/futex.h
index 8428525..0ab82cc 100644
--- a/arch/ia64/include/asm/futex.h
+++ b/arch/ia64/include/asm/futex.h
@@ -4,7 +4,6 @@
#include <linux/futex.h>
#include <linux/uaccess.h>
#include <asm/errno.h>
-#include <asm/system.h>

#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
do { \
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index e5a6c35..2c26321 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -71,7 +71,6 @@ extern unsigned int num_io_spaces;
#include <asm/intrinsics.h>
#include <asm/machvec.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <asm-generic/iomap.h>

/*
diff --git a/arch/ia64/include/asm/pgtable.h b/arch/ia64/include/asm/pgtable.h
index 1a97af3..815810c 100644
--- a/arch/ia64/include/asm/pgtable.h
+++ b/arch/ia64/include/asm/pgtable.h
@@ -16,7 +16,6 @@
#include <asm/mman.h>
#include <asm/page.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/types.h>

#define IA64_MAX_PHYS_BITS 50 /* max. number of physical address bits (architected) */
diff --git a/arch/ia64/include/asm/sal.h b/arch/ia64/include/asm/sal.h
index d19ddba..e504f38 100644
--- a/arch/ia64/include/asm/sal.h
+++ b/arch/ia64/include/asm/sal.h
@@ -40,7 +40,6 @@
#include <linux/efi.h>

#include <asm/pal.h>
-#include <asm/system.h>
#include <asm/fpu.h>

extern spinlock_t sal_lock;
diff --git a/arch/ia64/include/asm/sn/pda.h b/arch/ia64/include/asm/sn/pda.h
index 1c5108d..22ae358 100644
--- a/arch/ia64/include/asm/sn/pda.h
+++ b/arch/ia64/include/asm/sn/pda.h
@@ -10,7 +10,6 @@

#include <linux/cache.h>
#include <asm/percpu.h>
-#include <asm/system.h>


/*
diff --git a/arch/ia64/include/asm/spinlock.h b/arch/ia64/include/asm/spinlock.h
index b77768d..54ff557 100644
--- a/arch/ia64/include/asm/spinlock.h
+++ b/arch/ia64/include/asm/spinlock.h
@@ -15,7 +15,6 @@

#include <linux/atomic.h>
#include <asm/intrinsics.h>
-#include <asm/system.h>

#define arch_spin_lock_init(x) ((x)->lock = 0)

diff --git a/arch/ia64/include/asm/uv/uv.h b/arch/ia64/include/asm/uv/uv.h
index 61b5bdf..8f6cbaa 100644
--- a/arch/ia64/include/asm/uv/uv.h
+++ b/arch/ia64/include/asm/uv/uv.h
@@ -1,7 +1,6 @@
#ifndef _ASM_IA64_UV_UV_H
#define _ASM_IA64_UV_UV_H

-#include <asm/system.h>
#include <asm/sn/simulator.h>

static inline int is_uv_system(void)
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 5207035..93c6488 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -50,7 +50,6 @@
#include <asm/iosapic.h>
#include <asm/machvec.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <asm/numa.h>
#include <asm/sal.h>
#include <asm/cyclone.h>
diff --git a/arch/ia64/kernel/fsys.S b/arch/ia64/kernel/fsys.S
index 331d42b..f15d860 100644
--- a/arch/ia64/kernel/fsys.S
+++ b/arch/ia64/kernel/fsys.S
@@ -21,7 +21,6 @@
#include <asm/thread_info.h>
#include <asm/sal.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/unistd.h>

#include "entry.h"
diff --git a/arch/ia64/kernel/gate.S b/arch/ia64/kernel/gate.S
index 245d3e1..d3b33c9 100644
--- a/arch/ia64/kernel/gate.S
+++ b/arch/ia64/kernel/gate.S
@@ -11,7 +11,6 @@
#include <asm/errno.h>
#include <asm/asm-offsets.h>
#include <asm/sigcontext.h>
-#include <asm/system.h>
#include <asm/unistd.h>
#include "paravirt_inst.h"

diff --git a/arch/ia64/kernel/gate.lds.S b/arch/ia64/kernel/gate.lds.S
index d32b085..5f90a86 100644
--- a/arch/ia64/kernel/gate.lds.S
+++ b/arch/ia64/kernel/gate.lds.S
@@ -6,7 +6,6 @@
*/


-#include <asm/system.h>
#include "paravirt_patchlist.h"

SECTIONS
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S
index 17a9fba..629a250 100644
--- a/arch/ia64/kernel/head.S
+++ b/arch/ia64/kernel/head.S
@@ -30,7 +30,6 @@
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/mca_asm.h>
#include <linux/init.h>
#include <linux/linkage.h>
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index b0f9afe..ef4b5d8 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -98,7 +98,6 @@
#include <asm/machvec.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

#undef DEBUG_INTERRUPT_ROUTING

diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 782c3a35..08113b1 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -39,7 +39,6 @@
#include <asm/hw_irq.h>
#include <asm/machvec.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>

#ifdef CONFIG_PERFMON
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
index d93e396..fa25689 100644
--- a/arch/ia64/kernel/ivt.S
+++ b/arch/ia64/kernel/ivt.S
@@ -54,7 +54,6 @@
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/thread_info.h>
#include <asm/unistd.h>
#include <asm/errno.h>
diff --git a/arch/ia64/kernel/machvec.c b/arch/ia64/kernel/machvec.c
index d41a40e..f5a1e52 100644
--- a/arch/ia64/kernel/machvec.c
+++ b/arch/ia64/kernel/machvec.c
@@ -1,7 +1,6 @@
#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <asm/machvec.h>
-#include <asm/system.h>

#ifdef CONFIG_IA64_GENERIC

diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 84fb405..9198a79 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -92,7 +92,6 @@
#include <asm/meminit.h>
#include <asm/page.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/sal.h>
#include <asm/mca.h>
#include <asm/kexec.h>
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
index 09b4d68..1c2e894 100644
--- a/arch/ia64/kernel/mca_drv.c
+++ b/arch/ia64/kernel/mca_drv.c
@@ -28,7 +28,6 @@
#include <asm/machvec.h>
#include <asm/page.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/sal.h>
#include <asm/mca.h>

diff --git a/arch/ia64/kernel/patch.c b/arch/ia64/kernel/patch.c
index 68a1311..1cf0917 100644
--- a/arch/ia64/kernel/patch.c
+++ b/arch/ia64/kernel/patch.c
@@ -11,7 +11,6 @@
#include <asm/patch.h>
#include <asm/processor.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/unistd.h>

/*
diff --git a/arch/ia64/kernel/pci-dma.c b/arch/ia64/kernel/pci-dma.c
index eb11757..7cdc89b 100644
--- a/arch/ia64/kernel/pci-dma.c
+++ b/arch/ia64/kernel/pci-dma.c
@@ -12,7 +12,6 @@
#include <asm/machvec.h>
#include <linux/dma-mapping.h>

-#include <asm/system.h>

#ifdef CONFIG_INTEL_IOMMU

diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index b2c65e0..9d0fd7d 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -49,7 +49,6 @@
#include <asm/perfmon.h>
#include <asm/processor.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/delay.h>

diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
index dad9166..4265ff6 100644
--- a/arch/ia64/kernel/ptrace.c
+++ b/arch/ia64/kernel/ptrace.c
@@ -26,7 +26,6 @@
#include <asm/processor.h>
#include <asm/ptrace_offsets.h>
#include <asm/rse.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/unwind.h>
#ifdef CONFIG_PERFMON
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index cd57d73..c45e6dd 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -59,7 +59,6 @@
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/unistd.h>
#include <asm/hpsim.h>
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
index 0bd537b..e27f925 100644
--- a/arch/ia64/kernel/smp.c
+++ b/arch/ia64/kernel/smp.c
@@ -44,7 +44,6 @@
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/sal.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/unistd.h>
#include <asm/mca.h>
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 5590979..fb7927b 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -55,7 +55,6 @@
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/sal.h>
-#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/unistd.h>
#include <asm/sn/arch.h>
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 43920de..aa94bdd 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -29,7 +29,6 @@
#include <asm/ptrace.h>
#include <asm/sal.h>
#include <asm/sections.h>
-#include <asm/system.h>

#include "fsyscall_gtod_data.h"

diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index 6a867dc..a96bcf8 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -23,7 +23,6 @@
#include <linux/gfp.h>
#include <asm/page.h>
#include <asm/pal.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <linux/atomic.h>
#include <asm/tlbflush.h>
diff --git a/arch/ia64/kernel/unwind.c b/arch/ia64/kernel/unwind.c
index fed6afa..8f66195 100644
--- a/arch/ia64/kernel/unwind.c
+++ b/arch/ia64/kernel/unwind.c
@@ -41,7 +41,6 @@
#include <asm/ptrace_offsets.h>
#include <asm/rse.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/uaccess.h>

#include "entry.h"
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 53c0ba0..0ccb28f 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -1,7 +1,6 @@

#include <asm/cache.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/pgtable.h>

#include <asm-generic/vmlinux.lds.h>
diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c
index 20b3593..02d29c2 100644
--- a/arch/ia64/mm/fault.c
+++ b/arch/ia64/mm/fault.c
@@ -14,7 +14,6 @@

#include <asm/pgtable.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/uaccess.h>

extern int die(char *, struct pt_regs *, long);
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 13df239d..0eab454 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -30,7 +30,6 @@
#include <asm/pgalloc.h>
#include <asm/sal.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/tlb.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
diff --git a/arch/ia64/oprofile/backtrace.c b/arch/ia64/oprofile/backtrace.c
index f7b7989..6a219a9 100644
--- a/arch/ia64/oprofile/backtrace.c
+++ b/arch/ia64/oprofile/backtrace.c
@@ -14,7 +14,6 @@
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/ptrace.h>
-#include <asm/system.h>

/*
* For IA64 we need to perform a complex little dance to get both
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index f82f5d4..9462792 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -24,7 +24,6 @@

#include <asm/machvec.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/sal.h>
#include <asm/smp.h>
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 77db0b5..cc2667e 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -33,7 +33,6 @@
#include <asm/io.h>
#include <asm/sal.h>
#include <asm/machvec.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/vga.h>
#include <asm/sn/arch.h>
diff --git a/arch/ia64/sn/kernel/sn2/prominfo_proc.c b/arch/ia64/sn/kernel/sn2/prominfo_proc.c
index e633288..20b88cb 100644
--- a/arch/ia64/sn/kernel/sn2/prominfo_proc.c
+++ b/arch/ia64/sn/kernel/sn2/prominfo_proc.c
@@ -12,7 +12,6 @@
#include <linux/slab.h>
#include <linux/proc_fs.h>
#include <linux/nodemask.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/sn_cpuid.h>
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c
index e884ba4..68c8454 100644
--- a/arch/ia64/sn/kernel/sn2/sn2_smp.c
+++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c
@@ -26,7 +26,6 @@
#include <asm/processor.h>
#include <asm/irq.h>
#include <asm/sal.h>
-#include <asm/system.h>
#include <asm/delay.h>
#include <asm/io.h>
#include <asm/smp.h>
diff --git a/arch/ia64/sn/kernel/sn2/timer.c b/arch/ia64/sn/kernel/sn2/timer.c
index 0f8844e..abab8f9 100644
--- a/arch/ia64/sn/kernel/sn2/timer.c
+++ b/arch/ia64/sn/kernel/sn2/timer.c
@@ -14,7 +14,6 @@
#include <linux/clocksource.h>

#include <asm/hw_irq.h>
-#include <asm/system.h>
#include <asm/timex.h>

#include <asm/sn/leds.h>
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c
index c1bd1cf..26aeccb 100644
--- a/arch/ia64/sn/kernel/tiocx.c
+++ b/arch/ia64/sn/kernel/tiocx.c
@@ -14,7 +14,6 @@
#include <linux/capability.h>
#include <linux/device.h>
#include <linux/delay.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/addrs.h>
diff --git a/arch/ia64/xen/xensetup.S b/arch/ia64/xen/xensetup.S
index b820ed0..e29519e 100644
--- a/arch/ia64/xen/xensetup.S
+++ b/arch/ia64/xen/xensetup.S
@@ -7,7 +7,6 @@
#include <asm/processor.h>
#include <asm/asmmacro.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/paravirt.h>
#include <asm/xen/privop.h>
#include <linux/elfnote.h>
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
index 1e7f29f..c80b519 100644
--- a/arch/m32r/include/asm/atomic.h
+++ b/arch/m32r/include/asm/atomic.h
@@ -11,7 +11,6 @@

#include <linux/types.h>
#include <asm/assembler.h>
-#include <asm/system.h>

/*
* Atomic operations that C can't guarantee us. Useful for
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h
index 6300f22..87cd5beb 100644
--- a/arch/m32r/include/asm/bitops.h
+++ b/arch/m32r/include/asm/bitops.h
@@ -17,7 +17,6 @@

#include <linux/compiler.h>
#include <asm/assembler.h>
-#include <asm/system.h>
#include <asm/byteorder.h>
#include <asm/types.h>

diff --git a/arch/m32r/include/asm/local.h b/arch/m32r/include/asm/local.h
index 734bca8..4045db3 100644
--- a/arch/m32r/include/asm/local.h
+++ b/arch/m32r/include/asm/local.h
@@ -12,7 +12,6 @@

#include <linux/percpu.h>
#include <asm/assembler.h>
-#include <asm/system.h>
#include <asm/local.h>

/*
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 2074375..4c03361 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -29,7 +29,6 @@
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/mmu_context.h>

diff --git a/arch/m32r/kernel/traps.c b/arch/m32r/kernel/traps.c
index ee6a919..3bcb207 100644
--- a/arch/m32r/kernel/traps.c
+++ b/arch/m32r/kernel/traps.c
@@ -18,7 +18,6 @@
#include <asm/page.h>
#include <asm/processor.h>

-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <linux/atomic.h>
diff --git a/arch/m32r/mm/fault-nommu.c b/arch/m32r/mm/fault-nommu.c
index 888aab1..80f18cc 100644
--- a/arch/m32r/mm/fault-nommu.c
+++ b/arch/m32r/mm/fault-nommu.c
@@ -22,7 +22,6 @@
#include <linux/vt_kern.h> /* For unblank_screen() */

#include <asm/m32r.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
diff --git a/arch/m32r/mm/fault.c b/arch/m32r/mm/fault.c
index 2c9aeb4..3cdfa9c 100644
--- a/arch/m32r/mm/fault.c
+++ b/arch/m32r/mm/fault.c
@@ -26,7 +26,6 @@
#include <linux/module.h>

#include <asm/m32r.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/hardirq.h>
#include <asm/mmu_context.h>
diff --git a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c
index 34671d3..e2dd778 100644
--- a/arch/m32r/platforms/m32104ut/setup.c
+++ b/arch/m32r/platforms/m32104ut/setup.c
@@ -13,7 +13,6 @@
#include <linux/init.h>
#include <linux/device.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/m32700ut/setup.c b/arch/m32r/platforms/m32700ut/setup.c
index 1053e1c..9a4ba8a 100644
--- a/arch/m32r/platforms/m32700ut/setup.c
+++ b/arch/m32r/platforms/m32700ut/setup.c
@@ -16,7 +16,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c
index 35130ac..767d2f4 100644
--- a/arch/m32r/platforms/mappi/setup.c
+++ b/arch/m32r/platforms/mappi/setup.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/mappi2/setup.c b/arch/m32r/platforms/mappi2/setup.c
index f3ed6b6..76d665a 100644
--- a/arch/m32r/platforms/mappi2/setup.c
+++ b/arch/m32r/platforms/mappi2/setup.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/mappi3/setup.c b/arch/m32r/platforms/mappi3/setup.c
index 2408e35..a3646d4 100644
--- a/arch/m32r/platforms/mappi3/setup.c
+++ b/arch/m32r/platforms/mappi3/setup.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/oaks32r/setup.c b/arch/m32r/platforms/oaks32r/setup.c
index 83b46b0..f8373c0 100644
--- a/arch/m32r/platforms/oaks32r/setup.c
+++ b/arch/m32r/platforms/oaks32r/setup.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/init.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/opsput/setup.c b/arch/m32r/platforms/opsput/setup.c
index 3266070..cd01704 100644
--- a/arch/m32r/platforms/opsput/setup.c
+++ b/arch/m32r/platforms/opsput/setup.c
@@ -17,7 +17,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c
index 0c7a1e8..dcde0ec 100644
--- a/arch/m32r/platforms/usrv/setup.c
+++ b/arch/m32r/platforms/usrv/setup.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/init.h>

-#include <asm/system.h>
#include <asm/m32r.h>
#include <asm/io.h>

diff --git a/arch/m68k/amiga/amisound.c b/arch/m68k/amiga/amisound.c
index 61e5c54..2559eef 100644
--- a/arch/m68k/amiga/amisound.c
+++ b/arch/m68k/amiga/amisound.c
@@ -14,7 +14,6 @@
#include <linux/string.h>
#include <linux/module.h>

-#include <asm/system.h>
#include <asm/amigahw.h>

static unsigned short *snd_data;
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index b95a451..ee01b7a 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -29,7 +29,6 @@

#include <asm/bootinfo.h>
#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c
index 8d3eafa..0a30406 100644
--- a/arch/m68k/apollo/config.c
+++ b/arch/m68k/apollo/config.c
@@ -9,7 +9,6 @@

#include <asm/setup.h>
#include <asm/bootinfo.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/apollohw.h>
#include <asm/irq.h>
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 8048e1b..783d8f0 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -42,7 +42,6 @@
#include <linux/seq_file.h>
#include <linux/module.h>

-#include <asm/system.h>
#include <asm/traps.h>

#include <asm/atarihw.h>
diff --git a/arch/m68k/atari/atasound.c b/arch/m68k/atari/atasound.c
index d266fe8..1c1181e 100644
--- a/arch/m68k/atari/atasound.c
+++ b/arch/m68k/atari/atasound.c
@@ -25,7 +25,6 @@
#include <linux/module.h>

#include <asm/atarihw.h>
-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/atariints.h>
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index c4ac15c..d8eb327 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -39,7 +39,6 @@
#include <asm/atarihw.h>
#include <asm/atariints.h>
#include <asm/atari_stram.h>
-#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/hwtest.h>
#include <asm/io.h>
diff --git a/arch/m68k/bvme6000/config.c b/arch/m68k/bvme6000/config.c
index 8128647..0bf850a 100644
--- a/arch/m68k/bvme6000/config.c
+++ b/arch/m68k/bvme6000/config.c
@@ -28,7 +28,6 @@
#include <linux/bcd.h>

#include <asm/bootinfo.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
diff --git a/arch/m68k/bvme6000/rtc.c b/arch/m68k/bvme6000/rtc.c
index 1c4d4c7..cf12a17 100644
--- a/arch/m68k/bvme6000/rtc.c
+++ b/arch/m68k/bvme6000/rtc.c
@@ -21,7 +21,6 @@

#include <asm/io.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/setup.h>

/*
diff --git a/arch/m68k/hp300/time.c b/arch/m68k/hp300/time.c
index c87fe69..29a71be 100644
--- a/arch/m68k/hp300/time.c
+++ b/arch/m68k/hp300/time.c
@@ -15,7 +15,6 @@
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/blinken.h>

diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 4eba796..bf7c809 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -2,7 +2,6 @@
#define __ARCH_M68K_ATOMIC__

#include <linux/types.h>
-#include <asm/system.h>

/*
* Atomic operations that C can't guarantee us. Useful for
diff --git a/arch/m68k/include/asm/sun3xflop.h b/arch/m68k/include/asm/sun3xflop.h
index 32c45f8..95231e2 100644
--- a/arch/m68k/include/asm/sun3xflop.h
+++ b/arch/m68k/include/asm/sun3xflop.h
@@ -11,7 +11,6 @@

#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/sun3x.h>

diff --git a/arch/m68k/kernel/ints.c b/arch/m68k/kernel/ints.c
index 74fefac..6b32b64 100644
--- a/arch/m68k/kernel/ints.c
+++ b/arch/m68k/kernel/ints.c
@@ -15,7 +15,6 @@
#include <linux/init.h>

#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/page.h>
diff --git a/arch/m68k/kernel/irq.c b/arch/m68k/kernel/irq.c
index c73988c..9ab4f55 100644
--- a/arch/m68k/kernel/irq.c
+++ b/arch/m68k/kernel/irq.c
@@ -15,7 +15,6 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
-#include <asm/system.h>
#include <asm/traps.h>

asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
index 099283e..a4ecd7e 100644
--- a/arch/m68k/kernel/process_mm.c
+++ b/arch/m68k/kernel/process_mm.c
@@ -27,7 +27,6 @@
#include <linux/mqueue.h>

#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/machdep.h>
#include <asm/setup.h>
diff --git a/arch/m68k/kernel/process_no.c b/arch/m68k/kernel/process_no.c
index 5e1078c..2b24672 100644
--- a/arch/m68k/kernel/process_no.c
+++ b/arch/m68k/kernel/process_no.c
@@ -29,7 +29,6 @@
#include <linux/slab.h>

#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/machdep.h>
#include <asm/setup.h>
diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c
index 7bc999b..e853a05 100644
--- a/arch/m68k/kernel/ptrace_mm.c
+++ b/arch/m68k/kernel/ptrace_mm.c
@@ -23,7 +23,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>

/*
diff --git a/arch/m68k/kernel/ptrace_no.c b/arch/m68k/kernel/ptrace_no.c
index 6709fb7..92851d8 100644
--- a/arch/m68k/kernel/ptrace_no.c
+++ b/arch/m68k/kernel/ptrace_no.c
@@ -23,7 +23,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>

/*
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index daaa918..388e5cc 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -32,7 +32,6 @@

#include <asm/setup.h>
#include <asm/fpu.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/traps.h>
#include <asm/pgalloc.h>
diff --git a/arch/m68k/kernel/vectors.c b/arch/m68k/kernel/vectors.c
index 147b03f..322c977 100644
--- a/arch/m68k/kernel/vectors.c
+++ b/arch/m68k/kernel/vectors.c
@@ -25,7 +25,6 @@

#include <asm/setup.h>
#include <asm/fpu.h>
-#include <asm/system.h>
#include <asm/traps.h>

/* assembler routines */
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index f60ff5f..96fa6ed 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -30,7 +30,6 @@
#include <asm/setup.h>
#include <asm/bootinfo.h>

-#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
diff --git a/arch/m68k/mac/misc.c b/arch/m68k/mac/misc.c
index eb91555..5e08555 100644
--- a/arch/m68k/mac/misc.c
+++ b/arch/m68k/mac/misc.c
@@ -19,7 +19,6 @@
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/rtc.h>
-#include <asm/system.h>
#include <asm/segment.h>
#include <asm/setup.h>
#include <asm/macintosh.h>
diff --git a/arch/m68k/mm/fault.c b/arch/m68k/mm/fault.c
index 2db6099..6b020a8 100644
--- a/arch/m68k/mm/fault.c
+++ b/arch/m68k/mm/fault.c
@@ -13,7 +13,6 @@

#include <asm/setup.h>
#include <asm/traps.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>

diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
index 89f3b20..f77f258 100644
--- a/arch/m68k/mm/init_mm.c
+++ b/arch/m68k/mm/init_mm.c
@@ -23,7 +23,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/machdep.h>
#include <asm/io.h>
diff --git a/arch/m68k/mm/init_no.c b/arch/m68k/mm/init_no.c
index 1e33d39..345ec0d 100644
--- a/arch/m68k/mm/init_no.c
+++ b/arch/m68k/mm/init_no.c
@@ -36,7 +36,6 @@
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/machdep.h>

/*
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 1cc2bed..568cfad 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -20,7 +20,6 @@
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/io.h>
-#include <asm/system.h>

#undef DEBUG

diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c
index a5dbb74..250b8b7 100644
--- a/arch/m68k/mm/memory.c
+++ b/arch/m68k/mm/memory.c
@@ -17,7 +17,6 @@
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/machdep.h>

diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c
index 8b3db1c..0dafa69 100644
--- a/arch/m68k/mm/motorola.c
+++ b/arch/m68k/mm/motorola.c
@@ -24,7 +24,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
-#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/dma.h>
diff --git a/arch/m68k/mm/sun3mmu.c b/arch/m68k/mm/sun3mmu.c
index 1b902db..e080406 100644
--- a/arch/m68k/mm/sun3mmu.c
+++ b/arch/m68k/mm/sun3mmu.c
@@ -21,7 +21,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/io.h>

diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c
index 5de924e..a41c091 100644
--- a/arch/m68k/mvme147/config.c
+++ b/arch/m68k/mvme147/config.c
@@ -26,7 +26,6 @@
#include <linux/interrupt.h>

#include <asm/bootinfo.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index c3fb3bd..b6d7d8a 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -29,7 +29,6 @@
#include <linux/module.h>

#include <asm/bootinfo.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
diff --git a/arch/m68k/mvme16x/rtc.c b/arch/m68k/mvme16x/rtc.c
index 39c79eb..6ef7a81 100644
--- a/arch/m68k/mvme16x/rtc.c
+++ b/arch/m68k/mvme16x/rtc.c
@@ -20,7 +20,6 @@

#include <asm/io.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/setup.h>

/*
diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c
index d70bf26..856d945 100644
--- a/arch/m68k/platform/68328/config.c
+++ b/arch/m68k/platform/68328/config.c
@@ -17,7 +17,6 @@

#include <linux/types.h>
#include <linux/kernel.h>
-#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/MC68328.h>
#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
index f267886..2b4c912 100644
--- a/arch/m68k/platform/68328/timers.c
+++ b/arch/m68k/platform/68328/timers.c
@@ -21,7 +21,6 @@
#include <linux/irq.h>
#include <linux/clocksource.h>
#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/machdep.h>
#include <asm/MC68VZ328.h>
diff --git a/arch/m68k/platform/68360/config.c b/arch/m68k/platform/68360/config.c
index 9dd5bca..624dafc 100644
--- a/arch/m68k/platform/68360/config.c
+++ b/arch/m68k/platform/68360/config.c
@@ -18,7 +18,6 @@
#include <linux/irq.h>

#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/machdep.h>
#include <asm/m68360.h>
diff --git a/arch/m68k/platform/68EZ328/config.c b/arch/m68k/platform/68EZ328/config.c
index 1be1a16..080ad05 100644
--- a/arch/m68k/platform/68EZ328/config.c
+++ b/arch/m68k/platform/68EZ328/config.c
@@ -15,7 +15,6 @@

#include <linux/types.h>
#include <linux/kernel.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/machdep.h>
#include <asm/MC68EZ328.h>
diff --git a/arch/m68k/platform/68VZ328/config.c b/arch/m68k/platform/68VZ328/config.c
index eabaabe..ef4ceda 100644
--- a/arch/m68k/platform/68VZ328/config.c
+++ b/arch/m68k/platform/68VZ328/config.c
@@ -21,7 +21,6 @@
#include <linux/interrupt.h>
#include <linux/irq.h>

-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/machdep.h>
#include <asm/MC68VZ328.h>
diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
index ad10fec..4c346ec 100644
--- a/arch/m68k/q40/config.c
+++ b/arch/m68k/q40/config.c
@@ -28,7 +28,6 @@
#include <asm/io.h>
#include <asm/rtc.h>
#include <asm/bootinfo.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
diff --git a/arch/m68k/q40/q40ints.c b/arch/m68k/q40/q40ints.c
index 2b88849..513f9bb 100644
--- a/arch/m68k/q40/q40ints.c
+++ b/arch/m68k/q40/q40ints.c
@@ -18,7 +18,6 @@
#include <linux/irq.h>

#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/traps.h>

#include <asm/q40_master.h>
diff --git a/arch/m68k/sun3/intersil.c b/arch/m68k/sun3/intersil.c
index 0116d20..94fe801 100644
--- a/arch/m68k/sun3/intersil.c
+++ b/arch/m68k/sun3/intersil.c
@@ -14,7 +14,6 @@
#include <linux/rtc.h>

#include <asm/errno.h>
-#include <asm/system.h>
#include <asm/rtc.h>
#include <asm/intersil.h>

diff --git a/arch/m68k/sun3/mmu_emu.c b/arch/m68k/sun3/mmu_emu.c
index 94f81ec..8edc510 100644
--- a/arch/m68k/sun3/mmu_emu.c
+++ b/arch/m68k/sun3/mmu_emu.c
@@ -17,7 +17,6 @@

#include <asm/setup.h>
#include <asm/traps.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
diff --git a/arch/m68k/sun3/prom/console.c b/arch/m68k/sun3/prom/console.c
index 2bcb6e4..e923643 100644
--- a/arch/m68k/sun3/prom/console.c
+++ b/arch/m68k/sun3/prom/console.c
@@ -10,7 +10,6 @@
#include <linux/sched.h>
#include <asm/openprom.h>
#include <asm/oplib.h>
-#include <asm/system.h>
#include <linux/string.h>

/* Non blocking get character from console input device, returns -1
diff --git a/arch/m68k/sun3x/config.c b/arch/m68k/sun3x/config.c
index fc599fa..dd306c8 100644
--- a/arch/m68k/sun3x/config.c
+++ b/arch/m68k/sun3x/config.c
@@ -12,7 +12,6 @@
#include <linux/console.h>
#include <linux/init.h>

-#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/sun3xprom.h>
diff --git a/arch/m68k/sun3x/time.c b/arch/m68k/sun3x/time.c
index 536a04a..1d0a724 100644
--- a/arch/m68k/sun3x/time.c
+++ b/arch/m68k/sun3x/time.c
@@ -15,7 +15,6 @@

#include <asm/irq.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/sun3x.h>
#include <asm/sun3ints.h>
diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c
index 488c1ed..3a749d5 100644
--- a/arch/microblaze/kernel/cpu/pvr.c
+++ b/arch/microblaze/kernel/cpu/pvr.c
@@ -12,7 +12,6 @@

#include <linux/kernel.h>
#include <linux/compiler.h>
-#include <asm/system.h>
#include <asm/exceptions.h>
#include <asm/pvr.h>

diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index 49faeb4..bb4907c 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -18,7 +18,6 @@
#include <asm/cacheflush.h>
#include <linux/io.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <linux/ftrace.h>
#include <linux/uaccess.h>

diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 7dcb5bf..831c960 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -13,7 +13,6 @@
#include <linux/pm.h>
#include <linux/tick.h>
#include <linux/bitops.h>
-#include <asm/system.h>
#include <asm/pgalloc.h>
#include <asm/uaccess.h> /* for USER_DS macros */
#include <asm/cacheflush.h>
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 80d314e..4a764cc 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -36,7 +36,6 @@
#include <asm/processor.h>
#include <asm/irq.h>
#include <linux/io.h>
-#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/sections.h>
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 604cd9d..a953788 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -30,7 +30,6 @@
#include <asm/entry.h>
#include <asm/cpuinfo.h>

-#include <asm/system.h>
#include <asm/prom.h>
#include <asm/pgtable.h>

diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index 3cb0bf6..d3a38ec 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -27,7 +27,6 @@
#include <asm/setup.h>
#include <asm/prom.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <linux/cnt32_to_63.h>

#ifdef CONFIG_SELFMOD_TIMER
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c
index ba034d4..5541ac5 100644
--- a/arch/microblaze/kernel/traps.c
+++ b/arch/microblaze/kernel/traps.c
@@ -15,7 +15,6 @@
#include <linux/debug_locks.h>

#include <asm/exceptions.h>
-#include <asm/system.h>
#include <asm/unwind.h>

void trap_init(void)
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index 52746e7..fe9c53f 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -30,7 +30,6 @@
#include <linux/module.h>

#include <linux/string.h>
-#include <asm/system.h>

#ifdef __HAVE_ARCH_MEMCPY
#ifndef CONFIG_OPT_LIB_FUNCTION
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c
index ae97d2c..c38a265 100644
--- a/arch/microblaze/mm/fault.c
+++ b/arch/microblaze/mm/fault.c
@@ -33,7 +33,6 @@
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <linux/uaccess.h>
#include <asm/exceptions.h>

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 260b273..d3a9f012 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -24,7 +24,6 @@
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/smp-ops.h>
-#include <asm/system.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/bootinfo.h>
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index b1535fe..599a6db 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -15,7 +15,6 @@
#include <linux/module.h>

#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <asm/time.h>

#include <asm/octeon/octeon.h>
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 7abce66..5abf4e8 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -24,7 +24,6 @@
#include <asm/irq_regs.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/traps.h>

#include <asm/dec/ecc.h>
diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c
index 94d23b4..44d8a87 100644
--- a/arch/mips/dec/kn01-berr.c
+++ b/arch/mips/dec/kn01-berr.c
@@ -22,7 +22,6 @@
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/uaccess.h>

diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c
index 07ca540..ebb73c5 100644
--- a/arch/mips/dec/kn02xa-berr.c
+++ b/arch/mips/dec/kn02xa-berr.c
@@ -21,7 +21,6 @@
#include <asm/addrspace.h>
#include <asm/irq_regs.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/traps.h>

#include <asm/dec/kn02ca.h>
diff --git a/arch/mips/dec/wbflush.c b/arch/mips/dec/wbflush.c
index 925c052..46ef903 100644
--- a/arch/mips/dec/wbflush.c
+++ b/arch/mips/dec/wbflush.c
@@ -17,7 +17,6 @@
#include <linux/init.h>

#include <asm/bootinfo.h>
-#include <asm/system.h>
#include <asm/wbflush.h>

static void wbflush_kn01(void);
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 7798887..b5f0825 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -27,7 +27,6 @@
#include <linux/delay.h>

#include <asm/irq_cpu.h>
-#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c
index 29627fb..7cf80ca 100644
--- a/arch/mips/fw/arc/misc.c
+++ b/arch/mips/fw/arc/misc.c
@@ -17,7 +17,6 @@
#include <asm/fw/arc/types.h>
#include <asm/sgialib.h>
#include <asm/bootinfo.h>
-#include <asm/system.h>

VOID
ArcHalt(VOID)
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 1d93f81..802fa4d 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -19,7 +19,6 @@
#include <asm/barrier.h>
#include <asm/cpu-features.h>
#include <asm/war.h>
-#include <asm/system.h>

#define ATOMIC_INIT(i) { (i) }

diff --git a/arch/mips/include/asm/dma.h b/arch/mips/include/asm/dma.h
index 2d47da6..f5097f6 100644
--- a/arch/mips/include/asm/dma.h
+++ b/arch/mips/include/asm/dma.h
@@ -15,7 +15,6 @@
#include <asm/io.h> /* need byte IO */
#include <linux/spinlock.h> /* And spinlocks */
#include <linux/delay.h>
-#include <asm/system.h>


#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
diff --git a/arch/mips/include/asm/mach-au1x00/au1000_dma.h b/arch/mips/include/asm/mach-au1x00/au1000_dma.h
index 59f5b55..ba4cf0e 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000_dma.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000_dma.h
@@ -33,7 +33,6 @@
#include <linux/io.h> /* need byte IO */
#include <linux/spinlock.h> /* And spinlocks */
#include <linux/delay.h>
-#include <asm/system.h>

#define NUM_AU1000_DMA_CHANNELS 8

diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index c104f10..9903e4b 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -19,7 +19,6 @@
#include <asm/cpu-info.h>
#include <asm/mipsregs.h>
#include <asm/prefetch.h>
-#include <asm/system.h>

/*
* Return current * instruction pointer ("program counter").
diff --git a/arch/mips/include/asm/txx9/jmr3927.h b/arch/mips/include/asm/txx9/jmr3927.h
index a409c44..8808d7f 100644
--- a/arch/mips/include/asm/txx9/jmr3927.h
+++ b/arch/mips/include/asm/txx9/jmr3927.h
@@ -12,7 +12,6 @@

#include <asm/txx9/tx3927.h>
#include <asm/addrspace.h>
-#include <asm/system.h>
#include <asm/txx9irq.h>

/* CS */
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index f305ca1..bc794f7 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -16,7 +16,6 @@
#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>

static char bug64hit[] __initdata =
"reliable operation impossible!\n%s";
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 0bab464..5099201 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -22,7 +22,6 @@
#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>
#include <asm/watch.h>
#include <asm/elf.h>
#include <asm/spram.h>
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index a8a8977..b0662cf 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -16,7 +16,6 @@

#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>

static inline void unmask_rm7k_irq(struct irq_data *d)
{
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index 38874a4..1282b9a 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -17,7 +17,6 @@

#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>

static inline void unmask_rm9k_irq(struct irq_data *d)
{
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 7f50318..a5aa43d 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -23,7 +23,6 @@
#include <linux/ftrace.h>

#include <linux/atomic.h>
-#include <asm/system.h>
#include <asm/uaccess.h>

#ifdef CONFIG_KGDB
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 191eb52..972263b 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -35,7 +35,6 @@
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
-#include <asm/system.h>

static inline void unmask_mips_irq(struct irq_data *d)
{
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index c23d11f..7f3376b 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -13,7 +13,6 @@
#include <asm/cpu.h>
#include <asm/processor.h>
#include <linux/atomic.h>
-#include <asm/system.h>
#include <asm/hardirq.h>
#include <asm/mmu_context.h>
#include <asm/mipsmtregs.h>
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 7955409..5bfaea8 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -32,7 +32,6 @@
#include <asm/dsp.h>
#include <asm/fpu.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 7786b60..7c24c29 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -34,7 +34,6 @@
#include <asm/mipsmtregs.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/bootinfo.h>
#include <asm/reg.h>
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 32644b4..a3b0178 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -32,7 +32,6 @@
#include <asm/mipsmtregs.h>
#include <asm/pgtable.h>
#include <asm/page.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/bootinfo.h>

diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index a9d801d..b8c18dc 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -38,7 +38,6 @@
#include <linux/atomic.h>
#include <asm/cpu.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/vpe.h>
#include <asm/rtlx.h>

diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 058e964..c504b21 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -31,7 +31,6 @@
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/smp-ops.h>
-#include <asm/system.h>
#include <asm/prom.h>

struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly;
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index aae9866..e5ee38e 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -29,7 +29,6 @@
#include <asm/cacheflush.h>
#include <asm/sim.h>
#include <asm/ucontext.h>
-#include <asm/system.h>
#include <asm/fpu.h>
#include <asm/war.h>
#include <asm/vdso.h>
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index ee24d81..ae29e89 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -35,7 +35,6 @@
#include <asm/sim.h>
#include <asm/uaccess.h>
#include <asm/ucontext.h>
-#include <asm/system.h>
#include <asm/fpu.h>
#include <asm/cpu-features.h>
#include <asm/war.h>
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index d5e950a..ca67356 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -28,7 +28,6 @@
#include <asm/time.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/pmon.h>
#include <asm/cacheflush.h>
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index fe30951..e7e03ec 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -29,7 +29,6 @@
#include <asm/cacheflush.h>
#include <asm/cpu.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/hardirq.h>
#include <asm/mmu_context.h>
#include <asm/smp.h>
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index ce9e286..ff17868 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -28,7 +28,6 @@
#include <asm/cacheflush.h>
#include <asm/cpu.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/hardirq.h>
#include <asm/mmu_context.h>
#include <asm/time.h>
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 32c1e95..a37b082 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -38,7 +38,6 @@
#include <asm/cpu.h>
#include <asm/processor.h>
#include <asm/r4k-timer.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/time.h>

diff --git a/arch/mips/kernel/smtc-proc.c b/arch/mips/kernel/smtc-proc.c
index 928a5a6..145771c 100644
--- a/arch/mips/kernel/smtc-proc.c
+++ b/arch/mips/kernel/smtc-proc.c
@@ -11,7 +11,6 @@
#include <asm/cpu.h>
#include <asm/processor.h>
#include <linux/atomic.h>
-#include <asm/system.h>
#include <asm/hardirq.h>
#include <asm/mmu_context.h>
#include <asm/mipsregs.h>
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 0a42ff3..c4f75bb 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -31,7 +31,6 @@
#include <asm/cpu.h>
#include <asm/processor.h>
#include <linux/atomic.h>
-#include <asm/system.h>
#include <asm/hardirq.h>
#include <asm/hazards.h>
#include <asm/irq.h>
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 1821d12..6af08d8 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -15,7 +15,6 @@

#include <asm/fpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>
#include <asm/r4kcache.h>
#include <asm/hazards.h>

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index d79ae54..cfdaaa4 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -45,7 +45,6 @@
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/tlbdebug.h>
#include <asm/traps.h>
#include <asm/uaccess.h>
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index aedb894..9c58bdf 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -85,7 +85,6 @@
#include <asm/cop2.h>
#include <asm/inst.h>
#include <asm/uaccess.h>
-#include <asm/system.h>

#define STR(x) __STR(x)
#define __STR(x) #x
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index bfa12a4..f6f9152 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -49,7 +49,6 @@
#include <asm/cpu.h>
#include <asm/mips_mt.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/vpe.h>
#include <asm/kspd.h>

diff --git a/arch/mips/lasat/reset.c b/arch/mips/lasat/reset.c
index b1e7a89..e21f0b9 100644
--- a/arch/mips/lasat/reset.c
+++ b/arch/mips/lasat/reset.c
@@ -21,7 +21,6 @@
#include <linux/pm.h>

#include <asm/reboot.h>
-#include <asm/system.h>
#include <asm/lasat/lasat.h>

#include "picvue.h"
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c
index 3c4a8c5..384a3b0 100644
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -12,7 +12,6 @@
#include <asm/uaccess.h>
#include <asm/branch.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>
#include <asm/cacheflush.h>

#include <asm/fpu_emulator.h>
diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c
index 9150639..3c104ab 100644
--- a/arch/mips/mipssim/sim_smtc.c
+++ b/arch/mips/mipssim/sim_smtc.c
@@ -28,7 +28,6 @@
#include <asm/cpu.h>
#include <asm/processor.h>
#include <asm/smtc.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/smtc_ipi.h>

diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index cf7895d..1f9ca07 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -21,7 +21,6 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/r4kcache.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/war.h>

diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 0765583..031c4c2 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -18,7 +18,6 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <asm/isadep.h>
#include <asm/io.h>
#include <asm/bootinfo.h>
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4f9eb0b..f62d64f 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -29,7 +29,6 @@
#include <asm/pgtable.h>
#include <asm/r4kcache.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/war.h>
#include <asm/cacheflush.h> /* for run_uncached() */
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index a43c197c..87d23ca 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -18,7 +18,6 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <asm/isadep.h>
#include <asm/io.h>
#include <asm/bootinfo.h>
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 69ebd58..c14f6df 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -22,7 +22,6 @@

#include <asm/branch.h>
#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/ptrace.h>
#include <asm/highmem.h> /* For VMALLOC_END */
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 36272f7..cc0b626 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -22,7 +22,6 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/prefetch.h>
-#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/mmu_context.h>
diff --git a/arch/mips/mm/sc-ip22.c b/arch/mips/mm/sc-ip22.c
index a6bd11f..1eb708e 100644
--- a/arch/mips/mm/sc-ip22.c
+++ b/arch/mips/mm/sc-ip22.c
@@ -12,7 +12,6 @@
#include <asm/bcache.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/sgi/ip22.h>
#include <asm/sgi/mc.h>
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 9cca8de..93d937b 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -11,7 +11,6 @@
#include <asm/cacheops.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/r4kcache.h>

diff --git a/arch/mips/mm/sc-r5k.c b/arch/mips/mm/sc-r5k.c
index ae1e533..8d90ff2 100644
--- a/arch/mips/mm/sc-r5k.c
+++ b/arch/mips/mm/sc-r5k.c
@@ -12,7 +12,6 @@
#include <asm/cacheops.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/r4kcache.h>

diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c
index ed1fa46..a63d1ed 100644
--- a/arch/mips/mm/tlb-r3k.c
+++ b/arch/mips/mm/tlb-r3k.c
@@ -19,7 +19,6 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <asm/tlbmisc.h>
#include <asm/isadep.h>
#include <asm/io.h>
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 2dc6253..d2572cb 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -18,7 +18,6 @@
#include <asm/bootinfo.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/tlbmisc.h>

extern void build_tlb_refill_handler(void);
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 3d95f76..91c2499 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -17,7 +17,6 @@
#include <asm/bootinfo.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
-#include <asm/system.h>

extern void build_tlb_refill_handler(void);

diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 4b988b9..27a6cdb 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -26,7 +26,6 @@
#include <asm/bootinfo.h>
#include <asm/gt64120.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/cacheflush.h>
#include <asm/smp-ops.h>
#include <asm/traps.h>
diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c
index 49a4f6c..e52bfcb 100644
--- a/arch/mips/netlogic/common/irq.c
+++ b/arch/mips/netlogic/common/irq.c
@@ -43,7 +43,6 @@

#include <asm/errno.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/ptrace.h>
#include <asm/mipsregs.h>
#include <asm/thread_info.h>
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
index c4fa2d7..2e6f7ca 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
@@ -16,7 +16,6 @@
#include <linux/irq.h>

#include <asm/mipsregs.h>
-#include <asm/system.h>

#include <msp_cic_int.h>
#include <msp_regs.h>
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
index 98fd009..598b6a6 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
@@ -16,7 +16,6 @@
#include <linux/bitops.h>

#include <asm/mipsregs.h>
-#include <asm/system.h>

#include <msp_cic_int.h>
#include <msp_regs.h>
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
index 5bbcc47..83a1c5e 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
@@ -16,7 +16,6 @@
#include <linux/bitops.h>

#include <asm/mipsregs.h>
-#include <asm/system.h>

#include <msp_slp_int.h>
#include <msp_regs.h>
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index 25bbbf4..6590812 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -44,7 +44,6 @@
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>
#include <asm/titan_dep.h>

/* Hypertransport specific */
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index dcc926e..6a2754c 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -20,7 +20,6 @@
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/smp-ops.h>
-#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/pmon.h>

diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c
index 7fb97fb..fa9ae95 100644
--- a/arch/mips/powertv/asic/irq_asic.c
+++ b/arch/mips/powertv/asic/irq_asic.c
@@ -17,7 +17,6 @@

#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>

#include <asm/mach-powertv/asic_regs.h>

diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
index 8355228..1cf5abb 100644
--- a/arch/mips/powertv/init.c
+++ b/arch/mips/powertv/init.c
@@ -26,7 +26,6 @@

#include <asm/bootinfo.h>
#include <linux/io.h>
-#include <asm/system.h>
#include <asm/cacheflush.h>
#include <asm/traps.h>

diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
index 7c6db74..f298430 100644
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -42,7 +42,6 @@
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>

#include <asm/mach-rc32434/irq.h>
#include <asm/mach-rc32434/gpio.h>
diff --git a/arch/mips/sgi-ip22/ip22-berr.c b/arch/mips/sgi-ip22/ip22-berr.c
index 911d399..3f6ccd5 100644
--- a/arch/mips/sgi-ip22/ip22-berr.c
+++ b/arch/mips/sgi-ip22/ip22-berr.c
@@ -9,7 +9,6 @@
#include <linux/sched.h>

#include <asm/addrspace.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/branch.h>
#include <asm/irq_regs.h>
diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c
index 45b6694..20363d2 100644
--- a/arch/mips/sgi-ip22/ip22-reset.c
+++ b/arch/mips/sgi-ip22/ip22-reset.c
@@ -18,7 +18,6 @@

#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/reboot.h>
#include <asm/sgialib.h>
#include <asm/sgi/ioc.h>
diff --git a/arch/mips/sgi-ip22/ip28-berr.c b/arch/mips/sgi-ip22/ip28-berr.c
index 88c684e..0626555 100644
--- a/arch/mips/sgi-ip22/ip28-berr.c
+++ b/arch/mips/sgi-ip22/ip28-berr.c
@@ -11,7 +11,6 @@
#include <linux/seq_file.h>

#include <asm/addrspace.h>
-#include <asm/system.h>
#include <asm/traps.h>
#include <asm/branch.h>
#include <asm/irq_regs.h>
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 2364223..69a939a 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -27,7 +27,6 @@
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>

#include <asm/processor.h>
#include <asm/pci/bridge.h>
diff --git a/arch/mips/sgi-ip27/ip27-reset.c b/arch/mips/sgi-ip27/ip27-reset.c
index c170761..f347bc6 100644
--- a/arch/mips/sgi-ip27/ip27-reset.c
+++ b/arch/mips/sgi-ip27/ip27-reset.c
@@ -19,7 +19,6 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/reboot.h>
-#include <asm/system.h>
#include <asm/sgialib.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index a092860..e7d5054 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -22,7 +22,6 @@
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/ip32/crime.h>
#include <asm/ip32/mace.h>
diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c
index 9b95d80..1f823da 100644
--- a/arch/mips/sgi-ip32/ip32-reset.c
+++ b/arch/mips/sgi-ip32/ip32-reset.c
@@ -20,7 +20,6 @@
#include <asm/addrspace.h>
#include <asm/irq.h>
#include <asm/reboot.h>
-#include <asm/system.h>
#include <asm/wbflush.h>
#include <asm/ip32/mace.h>
#include <asm/ip32/crime.h>
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 09740d6..215713e 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -27,7 +27,6 @@
#include <asm/errno.h>
#include <asm/irq_regs.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/io.h>

#include <asm/sibyte/bcm1480_regs.h>
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 48853ab..e8c4538 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -53,7 +53,6 @@
#define K_INT_PERF_CNT K_BCM1480_INT_PERF_CNT
#endif

-#include <asm/system.h>
#include <asm/uaccess.h>

#define SBPROF_TB_MAJOR 240
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 45274bd..86e6e54 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -30,7 +30,6 @@
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/proc_fs.h>
-#include <asm/system.h>
#include <asm/io.h>

#include <asm/sibyte/sb1250.h>
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 76ee045..340aaf6 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -26,7 +26,6 @@

#include <asm/errno.h>
#include <asm/signal.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/io.h>

diff --git a/arch/mips/sni/reset.c b/arch/mips/sni/reset.c
index 79f8d70..244f942 100644
--- a/arch/mips/sni/reset.c
+++ b/arch/mips/sni/reset.c
@@ -5,7 +5,6 @@
*/
#include <asm/io.h>
#include <asm/reboot.h>
-#include <asm/system.h>
#include <asm/sni.h>

/*
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index fad2bef..ae0e4ee 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -22,7 +22,6 @@
#include <linux/irq.h>

#include <asm/irq_cpu.h>
-#include <asm/system.h>
#include <asm/vr41xx/irq.h>

typedef struct irq_cascade {
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index 692b4e8..9fbf5f0 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -30,7 +30,6 @@
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/reboot.h>
-#include <asm/system.h>

#define PMU_TYPE1_BASE 0x0b0000a0UL
#define PMU_TYPE1_SIZE 0x0eUL
diff --git a/arch/mn10300/include/asm/dma.h b/arch/mn10300/include/asm/dma.h
index 098df2e..10b77d4 100644
--- a/arch/mn10300/include/asm/dma.h
+++ b/arch/mn10300/include/asm/dma.h
@@ -11,7 +11,6 @@
#ifndef _ASM_DMA_H
#define _ASM_DMA_H

-#include <asm/system.h>
#include <linux/spinlock.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 3e3620d..8e11f9f 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -15,7 +15,6 @@
#include <linux/sys.h>
#include <linux/linkage.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/irqflags.h>
#include <asm/thread_info.h>
#include <asm/intctl-regs.h>
diff --git a/arch/mn10300/kernel/fpu.c b/arch/mn10300/kernel/fpu.c
index bb5fa7d..064fa19 100644
--- a/arch/mn10300/kernel/fpu.c
+++ b/arch/mn10300/kernel/fpu.c
@@ -12,7 +12,6 @@
#include <asm/fpu.h>
#include <asm/elf.h>
#include <asm/exceptions.h>
-#include <asm/system.h>

#ifdef CONFIG_LAZY_SAVE_FPU
struct task_struct *fpu_state_owner;
diff --git a/arch/mn10300/kernel/gdb-io-serial.c b/arch/mn10300/kernel/gdb-io-serial.c
index f28dc99..df51242 100644
--- a/arch/mn10300/kernel/gdb-io-serial.c
+++ b/arch/mn10300/kernel/gdb-io-serial.c
@@ -18,7 +18,6 @@
#include <linux/nmi.h>

#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/gdb-stub.h>
#include <asm/exceptions.h>
#include <asm/serial-regs.h>
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
index c859cac..caae8ca 100644
--- a/arch/mn10300/kernel/gdb-io-ttysm.c
+++ b/arch/mn10300/kernel/gdb-io-ttysm.c
@@ -17,7 +17,6 @@
#include <linux/init.h>
#include <linux/tty.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/gdb-stub.h>
#include <asm/exceptions.h>
#include <unit/clock.h>
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
index 522eb8a..a128c57 100644
--- a/arch/mn10300/kernel/gdb-stub.c
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -130,7 +130,6 @@
#include <linux/bug.h>

#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/gdb-stub.h>
#include <asm/exceptions.h>
#include <asm/debugger.h>
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index 94901c5..339cef4 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -36,7 +36,6 @@ static const char serial_revdate[] = "2007-11-06";
#include <linux/console.h>
#include <linux/sysrq.h>

-#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/bitops.h>
diff --git a/arch/mn10300/kernel/mn10300-watchdog.c b/arch/mn10300/kernel/mn10300-watchdog.c
index a45f0c7..db64a71 100644
--- a/arch/mn10300/kernel/mn10300-watchdog.c
+++ b/arch/mn10300/kernel/mn10300-watchdog.c
@@ -18,7 +18,6 @@
#include <linux/kernel_stat.h>
#include <linux/nmi.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/intctl-regs.h>
#include <asm/rtc-regs.h>
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
index 28eec31..906cd47 100644
--- a/arch/mn10300/kernel/process.c
+++ b/arch/mn10300/kernel/process.c
@@ -27,7 +27,6 @@
#include <linux/slab.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/mmu_context.h>
diff --git a/arch/mn10300/kernel/ptrace.c b/arch/mn10300/kernel/ptrace.c
index 5c0b07e..5bd5851 100644
--- a/arch/mn10300/kernel/ptrace.c
+++ b/arch/mn10300/kernel/ptrace.c
@@ -21,7 +21,6 @@
#include <linux/tracehook.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cacheflush.h>
#include <asm/fpu.h>
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
index 9e7a320..33c3bd1 100644
--- a/arch/mn10300/kernel/setup.c
+++ b/arch/mn10300/kernel/setup.c
@@ -26,7 +26,6 @@
#include <asm/processor.h>
#include <linux/console.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/smp.h>
diff --git a/arch/mn10300/kernel/smp-low.S b/arch/mn10300/kernel/smp-low.S
index 72938ce..f1845e9 100644
--- a/arch/mn10300/kernel/smp-low.S
+++ b/arch/mn10300/kernel/smp-low.S
@@ -13,7 +13,6 @@
#include <linux/sys.h>
#include <linux/linkage.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/thread_info.h>
#include <asm/cpu-regs.h>
#include <proc/smp-regs.h>
diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c
index 9242e9f..910dddf 100644
--- a/arch/mn10300/kernel/smp.c
+++ b/arch/mn10300/kernel/smp.c
@@ -25,7 +25,6 @@
#include <linux/profile.h>
#include <linux/smp.h>
#include <asm/tlbflush.h>
-#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/processor.h>
#include <asm/bug.h>
diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c
index 9220a75..94a9c6d 100644
--- a/arch/mn10300/kernel/traps.c
+++ b/arch/mn10300/kernel/traps.c
@@ -27,7 +27,6 @@
#include <linux/bug.h>
#include <linux/irq.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <linux/uaccess.h>
#include <asm/io.h>
#include <linux/atomic.h>
diff --git a/arch/mn10300/lib/bitops.c b/arch/mn10300/lib/bitops.c
index a66c6cd..37309cd 100644
--- a/arch/mn10300/lib/bitops.c
+++ b/arch/mn10300/lib/bitops.c
@@ -10,7 +10,6 @@
*/
#include <linux/module.h>
#include <asm/bitops.h>
-#include <asm/system.h>

/*
* try flipping a bit using BSET and BCLR
diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c
index 0945409..90f346f 100644
--- a/arch/mn10300/mm/fault.c
+++ b/arch/mn10300/mm/fault.c
@@ -24,7 +24,6 @@
#include <linux/init.h>
#include <linux/vt_kern.h> /* For unblank_screen() */

-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
#include <asm/hardirq.h>
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c
index 1380182..e57e5bc 100644
--- a/arch/mn10300/mm/init.c
+++ b/arch/mn10300/mm/init.c
@@ -29,7 +29,6 @@
#include <linux/gfp.h>

#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c
index f9bb8cb..b9920b1 100644
--- a/arch/mn10300/mm/misalignment.c
+++ b/arch/mn10300/mm/misalignment.c
@@ -23,7 +23,6 @@
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <linux/atomic.h>
diff --git a/arch/mn10300/mm/pgtable.c b/arch/mn10300/mm/pgtable.c
index 450f7ba..4ebf117 100644
--- a/arch/mn10300/mm/pgtable.c
+++ b/arch/mn10300/mm/pgtable.c
@@ -21,7 +21,6 @@
#include <linux/spinlock.h>
#include <linux/quicklist.h>

-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/tlb.h>
diff --git a/arch/mn10300/mm/tlb-smp.c b/arch/mn10300/mm/tlb-smp.c
index 9a77749..3e57faf 100644
--- a/arch/mn10300/mm/tlb-smp.c
+++ b/arch/mn10300/mm/tlb-smp.c
@@ -24,7 +24,6 @@
#include <linux/profile.h>
#include <linux/smp.h>
#include <asm/tlbflush.h>
-#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/processor.h>
#include <asm/bug.h>
diff --git a/arch/mn10300/proc-mn2ws0050/proc-init.c b/arch/mn10300/proc-mn2ws0050/proc-init.c
index fe6e249..ee6d03d 100644
--- a/arch/mn10300/proc-mn2ws0050/proc-init.c
+++ b/arch/mn10300/proc-mn2ws0050/proc-init.c
@@ -15,7 +15,6 @@
#include <linux/interrupt.h>

#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <linux/atomic.h>
diff --git a/arch/openrisc/kernel/idle.c b/arch/openrisc/kernel/idle.c
index e5fc7887..7d618fe 100644
--- a/arch/openrisc/kernel/idle.c
+++ b/arch/openrisc/kernel/idle.c
@@ -31,7 +31,6 @@

#include <asm/pgtable.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/mmu.h>
diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c
index e4209af..55210f3 100644
--- a/arch/openrisc/kernel/process.c
+++ b/arch/openrisc/kernel/process.c
@@ -38,7 +38,6 @@

#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/spr_defs.h>
diff --git a/arch/openrisc/kernel/prom.c b/arch/openrisc/kernel/prom.c
index 3d4478f..5869e3f 100644
--- a/arch/openrisc/kernel/prom.c
+++ b/arch/openrisc/kernel/prom.c
@@ -42,7 +42,6 @@
#include <asm/processor.h>
#include <asm/irq.h>
#include <linux/io.h>
-#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/sections.h>
diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c
index 7259047..967d499 100644
--- a/arch/openrisc/kernel/ptrace.c
+++ b/arch/openrisc/kernel/ptrace.c
@@ -33,7 +33,6 @@
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>

/*
* Copy the thread state to a regset that can be interpreted by userspace.
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index 1422f74..ad2c290 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -41,7 +41,6 @@
#include <linux/of_platform.h>

#include <asm/segment.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/types.h>
#include <asm/setup.h>
diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c
index a4ec44a..52ca32b 100644
--- a/arch/openrisc/kernel/traps.c
+++ b/arch/openrisc/kernel/traps.c
@@ -33,7 +33,6 @@
#include <linux/kallsyms.h>
#include <asm/uaccess.h>

-#include <asm/system.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/pgtable.h>
diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c
index 359dcb2..1cf3a8a 100644
--- a/arch/openrisc/mm/init.c
+++ b/arch/openrisc/mm/init.c
@@ -33,7 +33,6 @@
#include <linux/pagemap.h>
#include <linux/memblock.h>

-#include <asm/system.h>
#include <asm/segment.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
diff --git a/arch/openrisc/mm/tlb.c b/arch/openrisc/mm/tlb.c
index 56b0b89..683bd4d 100644
--- a/arch/openrisc/mm/tlb.c
+++ b/arch/openrisc/mm/tlb.c
@@ -26,7 +26,6 @@
#include <linux/mm.h>
#include <linux/init.h>

-#include <asm/system.h>
#include <asm/segment.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 4054b31..3ae5607 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -6,7 +6,6 @@
#define _ASM_PARISC_ATOMIC_H_

#include <linux/types.h>
-#include <asm/system.h>

/*
* Atomic operations that C can't guarantee us. Useful for
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index 7213ec9..1f9e484 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -16,7 +16,6 @@
#include <asm/pdc.h>
#include <asm/ptrace.h>
#include <asm/types.h>
-#include <asm/system.h>
#include <asm/percpu.h>

#endif /* __ASSEMBLY__ */
diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h
index 74036f4..804aa28 100644
--- a/arch/parisc/include/asm/spinlock.h
+++ b/arch/parisc/include/asm/spinlock.h
@@ -1,7 +1,6 @@
#ifndef __ASM_SPINLOCK_H
#define __ASM_SPINLOCK_H

-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/spinlock_types.h>

diff --git a/arch/parisc/include/asm/timex.h b/arch/parisc/include/asm/timex.h
index 3b68d77..2bd51f6 100644
--- a/arch/parisc/include/asm/timex.h
+++ b/arch/parisc/include/asm/timex.h
@@ -6,7 +6,6 @@
#ifndef _ASMPARISC_TIMEX_H
#define _ASMPARISC_TIMEX_H

-#include <asm/system.h>

#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */

diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h
index ff4cf9d..9ac0660 100644
--- a/arch/parisc/include/asm/uaccess.h
+++ b/arch/parisc/include/asm/uaccess.h
@@ -5,7 +5,6 @@
* User space memory access functions
*/
#include <asm/page.h>
-#include <asm/system.h>
#include <asm/cache.h>
#include <asm/errno.h>
#include <asm-generic/uaccess-unaligned.h>
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 83335f3..9d18189 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -22,7 +22,6 @@
#include <asm/cache.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
-#include <asm/system.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/processor.h>
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index 4896ed0..f65fa48 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -67,7 +67,6 @@
#include <asm/page.h>
#include <asm/pdc.h>
#include <asm/pdcpat.h>
-#include <asm/system.h>
#include <asm/processor.h> /* for boot_cpu_data */

static DEFINE_SPINLOCK(pdc_lock);
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 9efd974..4f0cf0c 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -16,7 +16,6 @@
#include <linux/types.h>

#include <asm/io.h>
-#include <asm/system.h>
#include <asm/superio.h>

#define DEBUG_RESOURCES 0
diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c
index 2905b1f..857c2f5 100644
--- a/arch/parisc/kernel/ptrace.c
+++ b/arch/parisc/kernel/ptrace.c
@@ -22,7 +22,6 @@

#include <asm/uaccess.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/asm-offsets.h>

diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 32d5884..5006e8e 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -32,7 +32,6 @@
#include <linux/bitops.h>
#include <linux/ftrace.h>

-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/current.h>
#include <asm/delay.h>
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c
index f19e660..45ba99f 100644
--- a/arch/parisc/kernel/traps.c
+++ b/arch/parisc/kernel/traps.c
@@ -27,7 +27,6 @@
#include <linux/bug.h>

#include <asm/assembly.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
diff --git a/arch/parisc/lib/bitops.c b/arch/parisc/lib/bitops.c
index a8bffd8..1871188 100644
--- a/arch/parisc/lib/bitops.c
+++ b/arch/parisc/lib/bitops.c
@@ -8,7 +8,6 @@

#include <linux/kernel.h>
#include <linux/spinlock.h>
-#include <asm/system.h>
#include <linux/atomic.h>

#ifdef CONFIG_SMP
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 02e41b5..357a3ef 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -11,7 +11,6 @@
#include <linux/compiler.h>
#include <asm/synch.h>
#include <asm/asm-compat.h>
-#include <asm/system.h>

#define ATOMIC_INIT(i) { (i) }

diff --git a/arch/powerpc/include/asm/dma.h b/arch/powerpc/include/asm/dma.h
index a7e06e2..2f3511a 100644
--- a/arch/powerpc/include/asm/dma.h
+++ b/arch/powerpc/include/asm/dma.h
@@ -24,7 +24,6 @@

#include <asm/io.h>
#include <linux/spinlock.h>
-#include <asm/system.h>

#ifndef MAX_DMA_CHANNELS
#define MAX_DMA_CHANNELS 8
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index 80fd4d2..bc4f7ef 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -35,7 +35,6 @@ struct arch_hw_breakpoint {

#include <linux/kdebug.h>
#include <asm/reg.h>
-#include <asm/system.h>

struct perf_event;
struct pmu;
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 8184ee9..5aad9aa 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -21,7 +21,6 @@
#include <linux/mm.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/cache.h>
#include <asm/cputable.h>
#include <asm/emulated_ops.h>
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index abef751..b6b6fba 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -27,7 +27,6 @@
#include <asm/kdump.h>
#include <asm/prom.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/setjmp.h>

/*
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 0a48bf5..b84d0a4 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -26,7 +26,6 @@
#include <linux/sysctl.h>
#include <linux/tick.h>

-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/time.h>
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 01e2877..422d87c 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -57,7 +57,6 @@
#include <linux/of_irq.h>

#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index bc47352..e88c643 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -35,7 +35,6 @@
#include <asm/cacheflush.h>
#include <asm/sstep.h>
#include <asm/uaccess.h>
-#include <asm/system.h>

#ifdef CONFIG_PPC_ADV_DEBUG_REGS
#define MSR_SINGLESTEP (MSR_DE)
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 578f35f..4190e80 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -31,7 +31,6 @@
#include <asm/hvcall.h>
#include <asm/firmware.h>
#include <asm/rtas.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/prom.h>
#include <asm/vdso_datapage.h>
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index d3114a7..298eb9d 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -26,7 +26,6 @@
#include <linux/cuda.h>
#include <linux/pmu.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/pci-bridge.h>
#include <asm/irq.h>
#include <asm/pmac_feature.h>
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index d817ab0..d76021d 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -41,7 +41,6 @@

#include <asm/pgtable.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/mmu.h>
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index abe405d..7f4eb14 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -41,7 +41,6 @@
#include <asm/io.h>
#include <asm/kdump.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/paca.h>
#include <asm/pgtable.h>
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index eca626e..ba30059 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -35,7 +35,6 @@
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/pci.h>
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 5b43325..4b9f5a3 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -36,7 +36,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>

#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 69c4be9..24352e2 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -32,7 +32,6 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#in